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8183881 Configuration memory as buffer memory for an integrated circuit  
Method and apparatus for using configuration memory for buffer memory is described. Drivers associated with a portion of the configuration memory are rendered incapable of creating a contentious...
8171267 Method and apparatus for migrating task in multi-processor system  
A method and apparatus for migrating a task in a multi-processor system. The method includes examining whether a second process has been allocated to a second processor, the second process having a...
8145883 Preloading instructions from an instruction set other than a currently executing instruction set  
A preload instruction in a first instruction set is executed at a processor. The preload instruction causes the processor to preload one or more instructions into an instruction cache. The...
8145888 Data processing circuit with a plurality of instruction modes, method of operating such a data circuit and scheduling method for such a data circuit  
A data processing circuit has an execution circuit (18) with a plurality of functional units (20). An instruction decoder (17) is operable in a first and a second instruction mode. In the first...
8146093 Computer multiple operation system switching method  
A computer multi-OS switching method, in which a data exchange region for storing OS running environment information is provided, wherein the method includes: A. saving running information of...
8135941 Vector morphing mechanism for multiple processor cores  
One embodiment of the invention provides a processor. The processor generally includes a first and second processor core, each having a plurality of pipelined execution units for executing an issue...
8127296 Virtual machine migration between processors having VM migration registers controlled by firmware to modify the reporting of common processor feature sets to support the migration  
A system and method for performing a VM migration which manages a cluster of machines in a pool for live migration to the same feature set or behavior. In certain embodiments, machines within the...
8122229 Dispatch mechanism for dispatching instructions from a host processor to a co-processor  
A dispatch mechanism is provided for dispatching instructions of an executable from a host processor to a heterogeneous co-processor. According to certain embodiments, cache coherency is maintained...
8108879 Method and apparatus for context switching of multiple engines  
A processor having multiple independent engines can concurrently support a number of independent processes or operation contexts. The processor can independently schedule instructions for execution...
8086763 Changing class of device  
A class changing apparatus includes a link unit configured to be linked with a client device to transmit and receive data. The class change apparatus also includes a storage unit configured to...
8082427 Multithread handling  
A system, apparatus and method for multithread handling on a multithread processing device are described herein. Embodiments of the present invention provide a multithread processing device for...
8074055 Altering data storage conventions of a processor when execution flows from first architecture code to second architecture code  
A computer. A processor pipeline alternately executes instructions coded for first and second different computer architectures or coded to implement first and second different processing...
8032737 Methods and apparatus for handling switching among threads within a multithread processor  
A system, apparatus and method for handling switching among threads within a multithread processor are described herein. Embodiments of the present invention provide a method for multithread...
8001540 System, method and program product for control of sequencing of data processing by different programs  
Generally, piping applications defined by combining stages of programming with a sequence control program and specifying to the sequence control program piping commands. The stages may be functions...
7996684 Apparatus and method for a programmable security processor  
A digital logic circuit comprises a programmable logic device and a programmable security circuit. The programmable security circuit stores a set of authorized configuration security keys. The...
7996659 Microprocessor instruction that allows system routine calls and returns from all contexts  
An apparatus comprises register means for storing a return context upon initiation of a supervisor call instruction and restoring means to restore a privilege level and status register upon...
7971043 Electronic system and method for changing number of operation stages of a pipeline  
An electronic system includes a pipeline having a first number of pipeline stages coupled in series, a pipeline control unit, and a logic engine, wherein each pipeline stage in the pipeline is for...
7949866 Exception types within a secure processing system  
An apparatus for processing data includes a processor operable in a plurality modes including at least one secure mode being a mode in a secure domain and at least one non-secure mode being a mode...
7925866 Data processing apparatus and method for handling instructions to be executed by processing circuitry  
A data processing apparatus and method are provided for handling instructions to be executed by processing circuitry. The processing circuitry has a plurality of processor states, each processor...
7904704 Instruction dispatching method and apparatus  
A system, apparatus and method for instruction dispatch on a multi-thread processing device are described herein. The instruction dispatching method includes, in an instruction execution period...
7890740 Processor comprising a first and a second mode of operation and method of operating the same  
A processor comprises a first mode of operation and a second mode of operation. A state of the processor in the first mode of operation comprises a first plurality of variables. The first plurality...
7865703 Method and apparatus for executing instrumentation code within alternative processor resources  
A computer implemented method, apparatus, and computer program product for executing instructions. A determination is made as to whether a processor executing a plurality of instructions is in an...
7856546 Configurable processor module accelerator using a programmable logic device  
A configurable processor module accelerator using a programmable logic device is described. According to one embodiment, the accelerator module includes a circuit board having coupled thereto a...
7853776 Handover between software and hardware accelerator  
A bytecode accelerator which translates stack-based intermediate language (bytecodes) into register-based CPU instructions transfers plural pieces of internal information from a register file of a...
7840783 System and method for performing a register renaming operation utilizing hardware which is capable of operating in at least two modes utilizing registers of multiple widths  
A system, method, and computer program product are provided for performing a register renaming operation utilizing hardware which operates in at least two modes. In operation, hardware is operated...
7836277 Pre-tracing instructions for CGA coupled processor in inactive mode for execution upon switch to active mode and continuing pre-fetching cache miss instructions  
A method of managing an instruction cache and a process of using the method are provided. The processor may comprise a processor core which is operated either during an active mode or during an...
7836284 Microprocessor with automatic selection of processing parallelism mode based on width data of instructions  
Automatic selective power and energy control of one or more processing elements matches a degree of parallelism to a monitored condition, in a highly parallel programmable data processor. For...
7836316 Conserving power in processing systems  
A network device may comprise an auxiliary processor to conserve the power of the network device. The auxiliary processor may modify one or more definition parameters of the programmable processing...
7805709 System and method for bypassing execution of an algorithm  
A system and a method for bypassing execution of an algorithm are provided. The method includes associating a first algorithm of a first computer with a second algorithm of a second computer,...
7802252 Method and apparatus for selecting the architecture level to which a processor appears to conform  
A method and system for selecting the architecture level to which a processor appears to conform within a computing environment when executing specific logical partitions or programs and performing...
7757070 Methods, apparatuses, and system for facilitating control of multiple instruction threads  
A system, apparatus and method for multithread handling on a multithread processing device are described herein. Embodiments of the present invention provide a multithread processing device for...
7747839 Data processing apparatus and method for handling instructions to be executed by processing circuitry  
A data processing apparatus and method are provided for handling instructions to be executed by processing circuitry. The processing circuitry has a plurality of processor states, each processor...
7725682 Method and apparatus for sharing storage and execution resources between architectural units in a microprocessor using a polymorphic function unit  
Methods and apparatus are provided for sharing storage and execution resources between architectural units in a microprocessor using a polymorphic function unit. A method for executing instructions...
7721077 Performing endian conversion  
A computing system may support an endian toggle register (ETR) and the endianess of the endian toggle register may be designated using a set endian bit (SEB) or a clear endian bit (CEB)...
7716638 Methods for describing processor features  
A machine readable description of a new feature of a processor is provided by a processor vendor. Control code executing on a processor, such as a traditional operating system kernel, a...
7716673 Tasks distribution in a multi-processor including a translation lookaside buffer shared between processors  
A system comprises a first processor, a second processor coupled to the first processor, an operating system that executes exclusively only on the first processor and not on the second processor,...
7676649 Computing machine with redundancy and related systems and methods  
According to an embodiment of the invention, a computing machine comprises a pipeline accelerator, a host processor coupled to the pipeline accelerator, and a redundant processor, a redundant...
7669204 Autonomic SMT System tuning  
Methods, systems, and media are disclosed for autonomic system tuning of simultaneous multithreading (“SMT”). In one embodiment, the method for autonomic tuning of at least one SMT setting for an ...
7664931 Scalable and configurable multimedia system for a vehicle  
A scalable and fully configurable computing architecture for a mobile multimedia architecture used in a vehicle includes a head unit having a processor, a field programmable gate array and a...
7627739 Optimization of a hardware resource shared by a multiprocessor  
Embodiments include a device and a method. In an embodiment, a method applies a first resource management strategy to a first resource associated with a first processor and executes an instruction...
7627770 Apparatus and method for automatic low power mode invocation in a multi-threaded processor  
A processor comprises a processor core executing multiple threads. A bifurcated thread scheduler includes an internal processor core component and an external processor core component. The...
7610466 Data processing system using independent memory and register operand size specifiers and method thereof  
Various load and store instructions may be used to transfer multiple vector elements between registers in a register file and memory. A cnt parameter may be used to indicate a total number of...
7603566 Authenticated process switching on a microprocessor  
A microprocessor includes a first information holding unit, a second information holding unit, and a switching authorization unit. The first information holding unit holds process identification...
7596683 Switching processor threads during long latencies  
In one embodiment, the present invention includes an apparatus to determine whether execution of an instruction of a first thread may require a long latency and switch to a second thread if the...
7577823 Wake-up and sleep conditions of processors in a multi-processor system  
The present invention relates to a multi-processor computer system comprising at least two processors for parallel execution of processes,at least two cache memory units, each being associated with...
7568083 Memory mapped register file and method for accessing the same  
A register file for a data processing system comprises a memory unit, input ports, and output ports. The memory unit includes a plurality of memory locations. Each memory location is addressable by...
7529916 Data processing apparatus and method for controlling access to registers  
A data processing apparatus and method are provided for controlling access to registers. The data processing apparatus comprises a processing unit for performing data processing operations on data...
7526693 Initial decision-point circuit operation mode  
A circuit that includes a controller and at least one control I/O pin. When the controller is placed into an initial state, the controller initializes the circuit into an initial operation mode....
7526632 System, apparatus and method for implementing multifunctional memory in reconfigurable data path processing  
A system, apparatus and a method for implementing multifunctional memories is disclosed. The multifunctional memories perform a variety of functions during execution of extended instructions in a...
7509480 Selection of ISA decoding mode for plural instruction sets based upon instruction address  
An apparatus and method are provided that enable a multiple instruction set architecture (ISA) central processing unit (CPU) to distinguish between different program instructions corresponding to...
Matches 1 - 50 out of 265 1 2 3 4 5 6 >