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7613901 |
Comparators in IC with programmably controlled positive / negative hysteresis level and open-drain / push-pull output coupled to crossbar switch or rising / falling edge interrupt generation
An integrated circuit package includes a processing core for operating on a set of instructions to carry out predefined processes. A plurality of comparators perform compare operations within the...
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7603540 |
Using field programmable gate array (FPGA) technology with a microprocessor for reconfigurable, instruction level hardware acceleration
A method for dynamically programming Field Programmable Gate Arrays (FPGAs) in a coprocessor, the coprocessor coupled to a processor, includes: beginning an execution of an application by the...
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7587578 |
Processing only those that need processing among divided portions of input data and binding with unprocessed portions while allowing reconfiguration of processing logic device for next input
Provided is a reconfigurable processor or apparatus capable of changing a logic without any loss of input data and without any deterioration of data computing processing performance, which is...
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7577822 |
Parallel task operation in processor and reconfigurable coprocessor configured based on information in link list including termination information for synchronization
A reconfigurable processor (VPU) is designed for a technical environment having a standard processor (CPU) which has, for example, a DSP, RISC, CISC processor or a (micro)controller. The VPU and...
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7577779 |
Method and system for a RFIC master
Methods and systems for a RFIC master are disclosed. Aspects of one method may include configuring an on-chip programmable device that may function as a master on a bus that has at least one device...
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7568085 |
Scalable FPGA fabric architecture with protocol converting bus interface and reconfigurable communication path to SIMD processing elements
A field programmable gate array includes a virtual bus interface that receives a control word from a host processor over a standard I/O bus. A configurable very long instruction word (VLIW)...
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7543294 |
Dynamic priority inheritance algorithm for scheduling dynamic configurable devices
Disclosed is a device architecture for running applications. The device architecture includes an operating system (OS) having an OS scheduler, a Dynamic Configurable Hardware Logic (DCHL) layer...
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7543283 |
Flexible instruction processor systems and methods
The present invention relates to the design-time and run-time environments of instruction processors implemented in re-programmable hardware. In one aspect the present invention provides a design...
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7539993 |
Tiered multi-media acceleration scheduler architecture for dynamic configurable devices
Disclosed is a device architecture for running applications. The device architecture includes an operating system (OS) having an OS scheduler, a Dynamic Configurable Hardware Logic (DCHL) layer...
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7539848 |
Configurable logic fabric including two fixed logic processors with individual interface to receive availability signal from custom operation code configured processor
A system is disclosed comprising a logic circuit in an integrated circuit device, wherein the logic circuit comprises a logic fabric that includes a plurality of configurable logic blocks,...
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7529910 |
Series and parallel operation of reconfigurable circuits with selection and timing buffers assembly for processing and binding divided data portions in matched timing
A reconfigurable processor equipped with reconfigurable circuits (RCs) comprises unit A for dividing data input to the processor, and outputting a part of pieces of divided data to a RC, unit B for...
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7529909 |
Security verified reconfiguration of execution datapath in extensible microcomputer
Described is microprocessor architecture that includes at least one reconfigurable execution path (e.g., implemented via FPGAs or CPLDs). When an instruction is fetched, a mechanism determines...
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7515453 |
Integrated memory core and memory interface circuit
A memory device comprises a first and second integrated circuit dies. The first integrated circuit die comprises a memory core as well as a first interface circuit. The first interface circuit...
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7509479 |
Reconfigurable global cellular automaton with RAM blocks coupled to input and output feedback crossbar switches receiving clock counter value from sequence control unit
The invention relates to a computer containing a RAM-based primary part (Ht) with a stucturable RAM unit ( 2 ). On the input side, a first crossbar switch ( 1 ) is located upstream of said unit and...
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7500083 |
Accelerated processing with scheduling to configured coprocessor for molecular data type by service and control coprocessor upon analysis of software code
An accelerated processing system includes one or more conventional processors, one or more coprocessors, and high speed data links between the processors, coprocessors and memory. In an embodiment,...
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7493473 |
Method of executing instructions using first and second control units that share a state register
A method is provided for using a reconfigurable control structure that includes a hard-wired control unit configured to execute a pre-defined instruction set and a programmable control unit...
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7493455 |
Memory writing device for an electronic device
To provide a memory-writing device which can simply and reliably write desired data to a nonvolatile memory of an electronic device, connection is made with an ECU to perform write processing to...
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7489779 |
Hardware implementation of the secure hash standard
An integrated circuit for implementing the secure hash algorithm is provided. According to one aspect of the integrated circuit, the integrated circuit includes a data path and a controller...
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7480786 |
Methods and cores using existing PLD processors to emulate processors having different instruction sets and bus protocols
Methods and cores using an existing processor implemented in a Programmable Logic Device (PLD) to emulate a target processor, where the existing and target processors support different instruction...
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7409531 |
Integrated micro-controller and programmable device
A single-IC subsystem controller for controlling electronic devices and subsystems within computer systems and other large electronic systems. The single-IC subsystem controller includes a...
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7373432 |
Programmable circuit and related computing machine and method
A programmable circuit receives configuration data from an external source, stores the firmware in a memory, and then downloads the firmware from the memory. Such a programmable circuit allows a...
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7356672 |
Warp processor for dynamic hardware/software partitioning
A warp processor includes a microprocessor, profiler, dynamic partitioning module, and warp configurable logic architecture. The warp processor initially executes a binary for an application...
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7350013 |
Bus communication apparatus for programmable logic devices and associated methods
A programmable logic device (PLD) includes programmable logic circuitry and a bridge circuitry. The bridge circuitry includes a first interface circuitry and a first signal select circuitry. The...
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7337301 |
Designing configurable processor with hardware extension for instruction extension to replace searched slow block of instructions
A design apparatus for designing a configurable processor for an application, includes an analysis unit that analyzes the content of a program to be executed by the processor; a hardware extension...
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7325123 |
Hierarchical interconnect for configuring separate interconnects for each group of fixed and diverse computational elements
An integrated circuit having computational elements. As least one of the computational elements has a fixed architecture. An interconnection network is coupled to a first group of the computational...
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7299342 |
Complex vector executing clustered SIMD micro-architecture DSP with accelerator coupled complex ALU paths each further including short multiplier/accumulator using two's complement
A programmable digital signal processor including a clustered SIMD microarchitecture includes a plurality of accelerator units, a processor core and a complex computing unit. Each of the...
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7249279 |
Multiprocessor code fix using a local cache
Operating code fixes are supplied to multiple processors utilizing the same operating code by storing the correction code fixes in a central RAM, and distributing the code fixes over a dedicated...
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7231508 |
Configurable finite state machine for operation of microinstruction providing execution enable control value
A microprocessor architecture including a finite state machine in combination with a microcode instruction cache for executing microinstructions. Microinstructions which would normally result in...
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7225321 |
Reprogrammable microprogram based reconfigurable multi-cell logic concurrently processing configuration and data signals
A digital logic unit can be reconfigured and includes: a plurality of logic cells ( 19, 26 ) that have configurable properties; a memory ( 13 ) with a plurality of microprograms ( 14, 16 ) that...
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7206914 |
Non-volatile memory system having a programmably selectable boot code section size
A non-volatile memory system is presented having a boot code section, wherein the size of the boot code section may be programmably selected. One embodiment of the non-volatile memory system...
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7194600 |
Method and apparatus for processing data with a programmable gate array using fixed and programmable processors
A method and apparatus for processing data within a programmable gate array comprise a first fixed logic processor and a second fixed logic processor that are embedded within the programmable gate...
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7191312 |
Configurable interconnection of multiple different type functional units array including delay type for different instruction processing
An integrated circuit device with a data processing block is provided, the data processing block including a plurality of operation units that are arranged in a matrix, a plurality of first wire...
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7180776 |
Systems and methods for programming a secured CPLD on-the-fly
On-the-fly reconfiguration of a secured CPLD. In one embodiment, a CPLD includes a novel security circuit that provides two different security control signals: an EEPROM/SRAM security signal and an...
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7159099 |
Streaming vector processor with reconfigurable interconnection switch
A re-configurable, streaming vector processor ( 100 ) is provided which includes a number of function units ( 102 ), each having one or more inputs for receiving data values and an output for...
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7127708 |
Concurrent in-system programming of programmable devices
A method for programming of a plurality of programmable devices arranged in a JTAG boundary scan chain takes advantage of knowledge of a target system. The method speeds device programming and...
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7126375 |
Floor plan for scalable multiple level tab oriented interconnect architecture
A multiple level routing architecture for a programmable logic device having logical blocks, each logical block comprising a plurality of cells, with a first level routing resources coupling the...
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7114055 |
Reduced instruction set computer architecture with duplication of bit values from an immediate field of an instruction multiple times in a data word
A reduced instruction set computer architecture implemented on a field programmable gate array includes a parallel bit shifter capable of reversible shifts and bit reversals, a Reed-Muller Boolean...
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7111150 |
Data processor
To obtain a correct vector address even if an interrupt occurs during erasing or programming of the data in a built-in ROM 18 by moving a part of a built-in RAM 13 to a vector address area by a...
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7100020 |
Digital communications processor
An integrated circuit ( 203 ) for use in processing streams of data generally and streams of packets in particular. The integrated circuit ( 203 ) includes a number of packet processors ( 307, 313,...
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7024539 |
Resistor identification configuration circuitry and associated method
Programmable on-chip identification circuitry and associated method are disclosed that provide integrated circuits with the ability to select and report from multiple different vendor and system...
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7020764 |
Semiconductor processing device
A useful semiconductor processing device (LSI) is capable of implementing the precise setting of signals at the final stage of user system development and enabling the user to build a logic circuit...
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7009422 |
Floor plan for scalable multiple level tab oriented interconnect architecture
A programmable logic device which incorporates an innovative routing hierarchy consisting of the multiple levels of routing lines, connector tab networks and turn matrices, enables an innovative,...
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6988182 |
Method for upgrading firmware in an electronic device
An improved method of upgrading the firmware of an electronic device is disclosed. The method is executed over a communications link. The method includes compression of a portion of the new...
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6973357 |
Method and configuration system for producing an application-specific functional module for a programmable controller
A method and configuration system are used for producing an application-specific functional module from a predefined functional module for a programmable controller. In this context, a marking...
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6963966 |
Accumulator-based load-store CPU architecture implementation in a programmable logic device
Methods and structures for efficiently implementing an accumulator-based load-store CPU architecture in a programmable logic device (PLD). The PLD includes programmable logic blocks, each logic...
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6959365 |
Microcomputer including a flash memory and a flash memory rewrite program stored therein
A microcomputer with a built-in flash memory is obtained in which the flash memory can be properly rewritten with a rewrite program kept placed on the flash memory and without requiring additional...
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6948005 |
Peripheral device for programmable controller
A storage unit stores ranges of devices allocated for each sequence program. A device range checking unit sequentially extracts device notations indicating consecutive areas and commands specifying...
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6928532 |
Logic integrated circuit, and recording medium readable by a computer, which stores a source of CPU core on said logic integrated circuit
In a logic integrated circuit such as an FPGA, a controller reads in an instruction, and then directly transmits ON/OFF information for each of bits composing microcode included in the instruction,...
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6928510 |
Method and arrangement for programming and verifying EEPROM pages and a corresponding computer software product and a corresponding computer-readable storage medium
The invention relates to a method and arrangement for programming and verifying EEPROM pages and a corresponding computer software product and a corresponding computer-readable storage medium,...
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6925554 |
Method of programming USB microcontrollers
An apparatus comprising a microcontroller configured to (i) send or receive data over one or more data lines when in a first mode and (ii) be programmed through said data lines when in a second mode.
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