Matches 51 - 100 out of 231 < 1 2 3 4 5 >
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6959376 Integrated circuit containing multiple digital signal processors  
The present invention is an integrated circuit containing multiple digital signal processors (DSPs). A single host processor interface is also placed on the chip to connect the multiple DSPs to the...
6948050 Single integrated circuit embodying a dual heterogenous processors with separate instruction handling hardware  
A single integrated circuit includes first and second data processors operating on different instruction sets independently operating on disjoint programs and data. The single integrated circuit...
6941418 Integrated circuit and method outputting data  
A circuit according to an embodiment of the present invention can load data in parallel to a barrel shifter, and output data to a pipelined multiplexer stage. The multiplexer is used to direct data...
6941449 Method and apparatus for performing critical tasks using speculative operations  
Method and apparatus for performing a critical task using a load that is speculative. Specifically, a method of computation for performing critical tasks with speculative operations is described in...
6931513 Data converter with statistical domain output  
An integrated circuit having statistical processing capability. The integrated circuit has an input for receiving input data in a first data domain. A data converter is provided for converting...
6915517 Digital signal processor  
A digital signal processor comprises an arithmetic device 12 wherein a reservation processing register 26 , to which setting to which from the arithmetic device 11 is possible and which has a...
6912596 Automatic resume from suspend for IEEE-1394 PHY  
A system and process are disclosed for automatically resuming data communication using an IEEE-1394 PHY when communication is suspended because input bias is momentarily lost. The PHY determines...
6904512 Data flow processor  
A data flow processor includes a number of hardware units each having more than one mode. A plurality of hardware units may be connected together to implement a flow made up of a series of...
6898657 Autonomous signal processing resource for selective series processing of data in transit on communications paths in multi-processor arrangements  
A multi-processor arrangement having an interprocessor communication path between each of every possible pair of processors, in addition to I/O paths to and from the arrangement, having signal...
6895479 Multicore DSP device having shared program memory with conditional write protection  
A multi-core digital signal processor is disclosed having a shared program memory with conditional write protection. In one embodiment, the digital signal processor includes a shared program...
6874079 Adaptive computing engine with dataflow graph based sequencing in reconfigurable mini-matrices of composite functional blocks  
Aspects of a method and system for digital signal processing within an adaptive computing engine are described. These aspects include a mini-matrix, the mini-matrix comprising a set of composite...
6848042 Integrated circuit and method of outputting data from a FIFO  
A method of outputting data from a FIFO incorporated in an integrated circuit generally determines whether input data is valid during a first clock cycle. The method then outputs data from a...
6842844 Parameter memory for hardware accelerator  
The present invention provides a hardware accelerator of a DSP with a parameter RAM memory for storing the parameters required for the various operating conditions of the accelerator. The hardware...
6842845 Methods and apparatuses for signal processing  
An application specific signal processor (ASSP) performs vectorized and nonvectorized operations. Nonvectorized operations may be performed using a saturated multiplication and accumulation...
6842728 Time-multiplexing data between asynchronous clock domains within cycle simulation and emulation environments  
An apparatus and method utilize a buffer interposed in a common signal path between asynchronous clock domains in a hardware-based logic emulation environment to manage the communication of...
6832306 Method and apparatus for a unified RISC/DSP pipeline controller for both reduced instruction set computer (RISC) control instructions and digital signal processing (DSP) instructions  
Disclosed is a method and apparatus for a unified RISC/DSP pipeline controller to control the execution of both reduced instruction set computer (RISC) control instructions and digital signal...
6826679 Processor with pointer tracking to eliminate redundant memory fetches  
A processor is provided that is a programmable digital signal processor (DSP) with variable instruction length, offering both high code density and easy programming. Architecture and instruction...
6820189 Computation core executing multiple operation DSP instructions and micro-controller instructions of shorter length without performing switch operation  
A computation core for executing programmed instructions includes an execution block for performing digital signal processor operations in response to digital signal processor instructions and for...
6816750 System-on-a-chip  
A system 100 fabricated on a single integrated circuit chip includes a microprocessor 101 operating from a high speed bus 102 and a peripheral bus 103 operating in conjunction with high...
6789183 Apparatus and method for activation of a digital signal processor in an idle mode for interprocessor transfer of signal groups in a digital signal processing unit  
In a digital processing unit having a plurality of digital signal processors, a first digital signal processor can request a direct transfer of a signal group stored in the memory unit of a second...
6772319 Dyadic instruction processing instruction set architecture with 20-bit and 40-bit DSP and control instructions  
An instruction set architecture (ISA) to convert voice and data samples into packets for transmission over a network and to convert packets received from the network into voice and data samples. In...
6766423 Message-based memory system for DSP storage expansion  
A message-based memory system for Digital Signal Processor (DSP) storage expansion has a shared memory device connected to a number of DSPs through a packet communication bus. Each of the DSPs has...
6763450 Processor  
The objective of the invention is to improve the processing efficiency of a system that repeatedly executes one instruction over multiple clock cycles. The SVP core 12 of this SVP (Scan-line...
6754805 Method and apparatus for configurable multi-cell digital signal processing employing global parallel configuration  
An improved mechanism for performing different types of digital signal processing functions, including correlation, sorting, and filtering operations. The mechanism includes a plurality of...
6748521 Microprocessor with instruction for saturating and packing data  
A data processing system is provided with a digital signal processor which has an instruction for saturating multiple fields of a selected set of source operands and storing the separate saturated...
6748507 Single-chip microcomputer with integral clock generating unit providing clock signals to CPU, internal circuit modules and synchronously controlling external dynamic memory  
A single-chip microcomputer comprising: a first bus having a central processing unit and a cache memory connected therewith; a second bus having a dynamic memory access control circuit and an...
6748472 Method and system for an interrupt accelerator that reduces the number of interrupts for a digital signal processor  
A circuit arrangement reduces the number of interrupts to a DSP required to transfer digital samples between external I/O devices and a data memory, thus allowing the DSP to perform additional...
6748516 Method and apparatus for instruction set architecture to perform primary and shadow digital signal processing sub-instructions simultaneously  
Disclosed is a method, apparatus, and an instruction set architecture (ISA) for an application specific signal processor (ASSP) tailored to digital signal processing (DSP) applications. A single...
6745314 Circular buffer control circuit and method of operation thereof  
A circular buffer control circuit, a method of controlling a circular buffer and a digital signal processor (DSP) incorporating the circuit or the method. In one embodiment, the circuit includes:...
6745319 Microprocessor with instructions for shuffling and dealing data  
A data processing system is provided with a digital signal processor (DSP) which has a shuffle instruction for shuffling a source operand ( 600 ) and storing the shuffled result in a selected...
6735708 Apparatus and method for a combination personal digital assistant and network portable device  
A portable system is provided with both an ISPCA processing section, a non-standard personal computer architecture (NSPCA) processing section and a common section including apparatus common to both...
6725355 Arithmetic processing architecture having a portion of general-purpose registers directly coupled to a plurality of memory banks  
A microprocessor having an internal memory for storing data to be process, a data pointer register for storing an address on the internal memory, a decoder 36 for decoding an instruction, a...
6725360 Selectively processing different size data in multiplier and ALU paths in parallel  
An integrated circuit which has two separate paths for two different data widths. The first processing path processes data up to n bits in a n multiplier. A second path operates in parallel with...
6711667 Microprocessor configured to translate instructions from one instruction set to another, and to store the translated instructions  
A microprocessor including an instruction translation unit and a storage control unit is provided. The instruction translation unit scans the instructions to be executed by the microprocessor. The...
6708235 Multi-modem implementation with host based and digital signal processor based modems  
A plurality of modems or modem types can run on a host processor, a digital signal processor or both, either concurrently or selectively. Modules of more than one modem program can be swapped in...
6704853 Digital signal processing apparatus and method for controlling the same  
The present invention provides a digital signal processing apparatus and a method for controlling the apparatus that allow for a reduction of circuit size to minimize an increase in power...
6701424 Method and apparatus for efficient loading and storing of vectors  
A method and apparatus for loading and storing vectors from and to memory, including embedding a location identifier in bits comprising a vector load and store instruction, wherein the location...
6678765 Embedded modem  
An embedded system that has a general purpose central processing unit CPU and a digital signal processor DSP, the CPU is adapted to perform various tasks such as code consuming tasks associated to...
6671799 System and method for dynamically sizing hardware loops and executing nested loops in a digital signal processor  
There is disclosed, for use in a digital signal processor, an apparatus for dynamically sizing a hardware loop that executes a plurality of instruction sequences forming a plurality of instruction...
6667636 DSP integrated with programmable logic based accelerators  
A heterogeneous integrated circuit having a digital signal processor and at least one programmable logic core. An AMBA AHB couples the cores and most other functional units on the IC. The PLCs are...
6668244 Method and means of voice control of a computer, including its mouse and keyboard  
New method and means for controlling the environment of disabled individuals through their voice, which includes the operation of lights or any number of appliances and a personal computer wherein...
6661848 Integrated audio and modem device  
An audio modem provides both the functionality needed for audio processing and that needed for implementing one or more modems. A digital signal processor utilizes a plurality of serial ports to...
6643768 Dyadic DSP instruction processor with main and sub-operation functional blocks selected from each set of multiplier and adder  
A dyadic digital signal processing (DSP) instruction processor including a first DSP functional block to execute a main operation of a dyadic DSP instruction and a second DSP functional block to...
6643713 Apparatus has a microprocessor including DSP and a CPU integrated with each other as a single bus master  
A low cost, a low power consumption and a small size are three very important factors for a mobile communication terminal. A great problem is posed by the conventional technique using a DSP and a...
6636828 Symbolic calculation system, symbolic calculation method and parallel circuit simulation system  
The coefficient matrix, corresponding to the simultaneous linear equations to be solved, is divided into a plurality of row sets. The row sets as divided are processed in a parallel fashion, and...
6633975 Data processing system having plurality of processors and executing series of processings in prescribed order  
A data processing system has the following construction in order to achieve high speed data processing with reduced memory capacity. There are provided a memory to store a plurality of pieces of...
6631461 Dyadic DSP instructions for digital signal processors  
An instruction set architecture (ISA) for application specific signal processor (ASSP) is tailored to digital signal processing applications. The instruction set architecture implemented with the...
6625672 Divided buffer  
The present invention relates to a buffer device of the first-in-first-out type. The buffer device comprises a data inlet, a data outlet and a storage buffer. The buffer device also comprises an...
6615341 Multiple-data bus architecture for a digital signal processor using variable-length instruction set with single instruction simultaneous control  
A digital signal processor (DSP) employs a variable-length instruction set. A portion of the variable-length instructions may be stored in adjacent locations within memory space with the beginning...
6606700 DSP with dual-mac processor and dual-mac coprocessor  
The invention is a digital signal processor architecture that is designed to speed up frequently-used signal processing computations, such as FIR filters, correlations, FFTs, and DFTs. The...
Matches 51 - 100 out of 231 < 1 2 3 4 5 >