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8171259 Multi-cluster dynamic reconfigurable circuit for context valid processing of data by clearing received data with added context change indicative signal  
A dynamic reconfigurable circuit includes multiple clusters each including a group of reconfigurable processing elements. The dynamic reconfigurable circuit is capable of dynamically changing a...
8161307 Reducing power consumption while synchronizing a plurality of compute nodes during execution of a parallel application  
Methods, apparatus, and products are disclosed for reducing power consumption while synchronizing a plurality of compute nodes during execution of a parallel application that include: beginning, by...
8161268 Performing an allreduce operation on a plurality of compute nodes of a parallel computer  
Methods, apparatus, and products are disclosed for performing an allreduce operation on a plurality of compute nodes of a parallel computer. Each compute node includes at least two processing...
8151245 Application-based specialization for computing nodes within a distributed processing system  
A distributed processing system is described that employs “application-based” specialization. In particular, the distributed processing system is constructed as a collection of computing nodes in ...
8140828 Handling transaction buffer overflow in multiprocessor by re-executing after waiting for peer processors to complete pending transactions and bypassing the buffer  
There is disclosed a method and apparatus for handling transaction buffer overflow in a multi-processor system as well as a transaction memory system in a multi-processor system. The method...
8103856 Performance monitoring for new phase dynamic optimization of instruction dispatch cluster configuration  
In a processor having multiple clusters which operate in parallel, the number of clusters in use can be varied dynamically. At the start of each program phase, the configuration option for an...
8095811 Reducing power consumption while synchronizing a plurality of compute nodes during execution of a parallel application  
Methods, apparatus, and products are disclosed for reducing power consumption while synchronizing a plurality of compute nodes during execution of a parallel application that include: beginning, by...
8095759 Error management firewall in a multiprocessor computer  
A multiprocessor computer system comprises a plurality of processors and a plurality of nodes, each node comprising one or more processors. A local memory in each of the plurality of nodes is...
8086828 Multiprocessor computing systems with heterogeneous processors  
Heterogeneous processors can cooperate for distributed processing tasks in a multiprocessor computing system. Each processor is operable in a “compatible” mode, in which all processors within a fam...
8081181 Prefix sum pass to linearize A-buffer storage  
The architecture implements A-buffer in hardware by extending hardware to efficiently store a variable amount of data for each pixel. In operation, a prepass is performed to generate the counts of...
8074054 Processing system having multiple engines connected in a daisy chain configuration  
A processing system includes a group of processing units (“PUs”) arranged in a daisy chain configuration or a sequence capable of parallel processing. The processing system, in one embodiment, inc...
8065503 Iteratively processing data segments by concurrently transmitting to, processing by, and receiving from partnered process  
Methods, systems and computer programs for distributing a computing operation among a plurality of processes and for gathering results of the computing operation from the plurality of processes are...
8019978 Unit status reporting protocol  
A unit status reporting protocol may also be used for context switching, debugging, and removing deadlock conditions in a processing unit. A processing unit is in one of five states: empty, active,...
8001360 Method and software for partitioned group element selection operation  
A system and software for improving the performance of processors by incorporating an execution unit operable to decode and execute single instructions specifying a data selection operand and a...
8001206 Broadcasting data in a hybrid computing environment  
Methods, apparatus, and products for broadcasting data in a hybrid computing environment that includes a host computer, a number of accelerators, the host computer and the accelerators adapted to...
7971029 Barrier synchronization method, device, and multi-core processor  
A barrier synchronization device for realizing barrier synchronization of at least 2 processor cores belonging to a same synchronization group among a plurality of processor cores is included in a...
7962720 Distributed processing system, distributed processing method and computer program  
A distributed processing system includes at least two processing elements (100 and 200) which are mutually connected, and each processing element having at least a processing section, a memory...
7913063 System and method for performance based call distribution  
A first performance indicator associated with a first agent is received from a workforce management system. A second performance indicator associated with a second agent is also received from the...
7849289 Distributed memory type information processing system  
In parallel computers, sorting and calculation of large-scale data are realized while large-scale data is held in the respective processors without sharing the large-scale data between the...
7840780 Shared resources in a chip multiprocessor  
In one embodiment, a node comprises a plurality of processor cores and a node controller configured to receive a first read operation addressing a first register. The node controller is configured...
7822889 Direct/indirect transmission of information using a multi-tiered full-graph interconnect architecture  
A mechanism is provided for transmitting data in a data network. A first processor of the data network receives data to be transmitted to a second processor within the data network. A determination...
7805591 Method and system for dual-core processing  
This invention describes a baseband dual-core signal processing in mobile communication systems operating according to GSM, GPRS, or EDGE comprising a first digital signal processor adapted to...
7797514 Scalable multi-threaded sequencing/synchronizing processor architecture  
A high performance sequencer/synchronizer controls multiple concurrent data processors and dedicated coprocessors and their interaction with multiple shared memories. This sequencer/synchronizer...
7779230 Data flow execution of methods in sequential programs  
Distant parallelization of sequential programs is obtained by making parallelization decisions at the boundaries between program methods (e.g., functions and sub-routines). Experimentation suggests...
7774189 System and method for simulating data flow using dataflow computing system  
A system and method for implementing a unified model for integration systems is presented. A user provides inputs to an integrated language engine for placing operator components and arc components...
7671863 Method and graphic engine chip for drawing processing  
Architectures for graphic engine chips with minimum impact on other resources are disclosed. According to one embodiment, a graphic engine architecture includes a scheduler that is configured to...
7669036 Direct path monitoring by primary processor to each status register in pipeline chained secondary processors for task allocation via downstream communication  
Resource management techniques in multi-processor systems are described. Embodiments include a multi-processor system having a primary processor for communication with pipelined secondary...
7600095 Executing scatter operation to parallel computer nodes by repeatedly broadcasting content of send buffer partition corresponding to each node upon bitwise OR operation  
Executing a scatter operation on a parallel computer includes: configuring a send buffer on a logical root, the send buffer having positions, each position corresponding to a ranked node in an...
7594250 Method and system of program transmission optimization using a redundant transmission sequence  
A system and method of optimizing transmission of a program to multiple users over a distribution system, with particular application to video-on-demand for a CATV network. The system includes, at...
7523293 Spawn-join instruction set architecture for providing explicit multithreading  
The invention presents a unique computational paradigm that provides the tools to take advantage of the parallelism inherent in parallel algorithms to the full spectrum from algorithms through...
7506138 Launching applications on compute and service processors running under different operating systems in scalable network of processor boards with routers  
A multiple processor computing apparatus includes a physical interconnect structure that is flexibly configurable to support selective segregation of classified and unclassified users. The physical...
7454595 Distributed processor allocation for launching applications in a massively connected processors complex  
A compute processor allocator architecture for allocating compute processors to run applications in a multiple processor computing apparatus is distributed among a subset of processors within the...
7447676 Method and system of collecting execution statistics of query statements  
A method and system of collecting execution statistics of query statements is disclosed. An execution plan is generated for a query statement in one embodiment of the invention. The execution plan...
7437534 Local and global register partitioning technique  
A Very Long Instruction Word (VLIW) processor having a plurality of functional units includes a multi-ported register file that is divided into a plurality of separate register file segments, each...
7401333 Array of parallel programmable processing engines and deterministic method of operating the same  
The present invention provides an array of parallel programmable processing engines interconnected by a switching network. At least some of the processing engines execute a thread, and at least...
7356819 Task distribution  
Methods, signals, devices and systems are provided for matching tasks with processing units. A region within a multi-faceted task space is allocated to a processing unit. A point in the...
7281118 Sending thread message generated using DCR command pointed message control block storing message and response memory address in multiprocessor  
A method and system for messaging between processors and co-processors connected through a bus. The method permits a multi-thread system processor to request the services of a processor or...
7162615 Data transfer bus communication using single request to perform command and return data to destination indicated in context to allow thread context switch  
Systems and methods that allow for performing a single transaction that both instructs a device to perform an operation and return the resulting data to a processor without the processor having to...
7103752 Method and apparatus for broadcasting messages with set priority to guarantee knowledge of a state within a data processing system  
A method, apparatus, and computer instructions for broadcasting information. A change in data used by a number of processors in the data processing system is identified. A message is sent to the...
7093104 Processing modules for computer architecture for broadband networks  
A computer architecture and programming model for high speed processing over broadband networks are provided. The architecture employs a consistent modular structure, a common computing module and...
7000098 Passing a received packet for modifying pipelining processing engines' routine instructions  
In one embodiment, a method is provided. The method of this embodiment includes generating, by a processor that includes a plurality of processing engines capable of executing program instructions,...
6981074 Descriptor-based load balancing  
A multiprocessor switching device substantially implemented on a single CMOS integrated circuit is described in connection with a descriptor-based packet processing mechanism for use in efficiently...
6952713 Information processing device  
The invention relates to an information processing device (1), including a user control unit (2) for the selection of units of primary information to be processed and functions to be invoked. The...
6922736 Computer system and data processing method  
A computer system has a node and a service processor (SVP) connected together via a diagnosis section. An input/output (I/O) unit is connected to the SVP. The diagnosis section has a serial...
6892286 Shared memory multiprocessor memory model verification system and method  
A system and method for verifying a memory consistency model for a shared memory multiprocessor computer systems generates random instructions to run on the processors, saves the results of the...
6789182 System and method for logging computer event data and physical components of a complex distributed system  
A system for collecting events relating to multiple distributed physical systems includes multiple event collection cards (100), each receiving events from one of the distributed physical systems....
6754892 Instruction packing for an advanced microprocessor  
A process for packing an instruction word including providing a word value representing an instruction word into which an operation is to be fit be equal to some initial value having a plurality of...
6721813 Computer system implementing a system and method for tracking the progress of posted write transactions  
A computer system is presented which implements a system and method for tracking the progress of posted write transactions. In one embodiment, the computer system includes a processing subsystem...
6691220 Multiprocessor speculation mechanism via a barrier speculation flag  
A method of operation within a processor that permits load instructions following barrier instructions in an instruction sequence to be issued speculatively. The barrier instruction is executed and...
6671565 Electronic control apparatus having mode check function  
An electronic control apparatus for a control object makes a mode check before each program part is retrieved even at a predetermined start timing, and inhibits a retrieval of program parts...
Matches 1 - 50 out of 135 1 2 3 >