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7620678 Method and system for reducing the time-to-market concerns for embedded system design  
Aspects for reducing the time-to-market concerns for embedded system design are described. The aspects include providing an infrastructure to support a plurality of heterogeneous processing nodes...
7613900 Systems and methods for selecting input/output configuration in an integrated circuit  
An integrated circuit with selectable input/output includes a first processor configured to execute instructions, an input/output interface configured to receive and transmit standard input/output...
7596650 Increasing availability of input/output (I/O) interconnections in a system  
In one embodiment, the present invention includes an apparatus having a first interface to process data for communication according to at least first and second protocols, a second interface to...
7516303 Field programmable gate array and microcontroller system-on-a-chip  
A system-on-a-chip integrated circuit has a field programmable gate array core having logic clusters, static random access memory modules, and routing resources, a field programmable gate array...
7509399 Programmable communication interface  
A device comprises a programmable communication interface and a processor. The programmable communication interface communicates data via a set of signals. The processor configures the programmable...
7489779 Hardware implementation of the secure hash standard  
An integrated circuit for implementing the secure hash algorithm is provided. According to one aspect of the integrated circuit, the integrated circuit includes a data path and a controller...
7450255 Photograph record authoring system  
Authoring a plurality of digital image records, each digital image record corresponding to a separate customer order, in a digital image record authoring system including a dedicated computer,...
7308558 Multiprocessor data processing system having scalable data interconnect and data routing mechanism  
The data interconnect and routing mechanism reduces data communication latency, supports dynamic route determination based upon processor activity level/traffic, and implements an architecture that...
7275117 Fast pattern processor including a function interface system  
A fast pattern processor having an internal function bus and an external function bus. In one embodiment, a fast pattern processor includes: (1) an internal function bus, (2) an external function...
7272458 Control system setting device  
A control system with a plurality of devices connected through a network may be started up by connecting a control system setting device including a computer accessible to profile data which...
7228401 Interfacing a processor to a coprocessor in which the processor selectively broadcasts to or selectively alters an execution mode of the coprocessor  
The present invention relates generally to interfacing a processor with at least one coprocessor. One embodiment relates to a processor having a set of broadcast specifiers which it uses to...
7200703 Configurable components for embedded system design  
A system and method of designing an accelerator for a processor-based system. The accelerator design problem is partitioned into a data communicate module design problem and a data compute core...
7191329 Automated resource management using perceptron prediction  
A system and method for automatically identifying a desirable reconfiguration of computer system resources, using a perceptron to determine whether one resource configuration will likely be more...
7171421 System for automating operating parameter list process  
A system for automating an operating parameter list process includes a web-based interface for accessing OPL data. Databases are provided for storing updated OPL parameter values for use in...
7162615 Data transfer bus communication using single request to perform command and return data to destination indicated in context to allow thread context switch  
Systems and methods that allow for performing a single transaction that both instructs a device to perform an operation and return the resulting data to a processor without the processor having to...
7152151 Signal processing resource for selective series processing of data in transit on communications paths in multi-processor arrangements  
A multi-processor arrangement having an interprocessor communication path between each of every possible pair of processors, in addition to I/O paths to and from the arrangement, having signal...
7127590 Reconfigurable VLIW processor  
Disclosed is a computer processor ( 300 ) comprising a plurality of processing units (FU_n) and communication means ( 302 ) by which the plurality of processing units are interconnected. The...
7107382 Virtual peripheral component interconnect multiple-function device  
A peripheral component interconnect (PCI) device comprising a bus interface coupled to a component interconnect bus, a plurality of configuration space register sets, and virtual multiple-function...
7103752 Method and apparatus for broadcasting messages with set priority to guarantee knowledge of a state within a data processing system  
A method, apparatus, and computer instructions for broadcasting information. A change in data used by a number of processors in the data processing system is identified. A message is sent to the...
7072647 System and method for pre-programming a cellular phone  
A system and method for parallel programming an electronic device's memory during manufacturing. In one embodiment, the electronic device is programmed in parallel with test code and a portion of...
7058461 Page back system and method for remote paging in a control system  
The invention comprises a modem apparatus adapted to provide full messaging and communications interface between a control device and a communications medium such as a telephone line. The modem can...
7051188 Dynamically redistributing shareable resources of a computing environment to manage the workload of that environment  
Allocation of shareable resources of a computing environment are dynamically adjusted to balance the workload of that environment. Workload is managed across two or more partitions of a plurality...
7043562 Irregular network  
Irregularities are provided in at least one dimension of a torus or mesh network for lower average path length and lower maximum channel load while increasing tolerance for omitted end-around...
7032099 Parallel processor, parallel processing method, and storing medium  
A parallel processor capable of establishing synchronization among programs executed in parallel, wherein a processor element suspends its processing and enters a waiting state when a wait...
7016984 System controller using plural CPU's  
In a system controller in which a plurality of CPUs connected through a shared bus are connected to a plurality of memory units or IO devices through a bus for separate transfer of a read...
7007276 Method, system and program products for managing groups of partitions of a computing environment  
Groups of partitions of a computing environment are managed. At least one group of the computing environment includes a plurality of partitions of the computing environment. Shareable resources are...
7007128 Multiprocessor data processing system having a data routing mechanism regulated through control communication  
A data interconnect and routing mechanism reduces data communication latency, supports dynamic route determination based upon processor activity level/traffic, and implements an architecture that...
7000034 Function interface system and method of processing issued functions between co-processors  
A function interface system for use with a fast pattern processor having an internal function bus and an external function bus and a method of operating the same. In one embodiment, the function...
6981074 Descriptor-based load balancing  
A multiprocessor switching device substantially implemented on a single CMOS integrated circuit is described in connection with a descriptor-based packet processing mechanism for use in efficiently...
6965960 xDSL symbol processor and method of operating same  
A logical pipeline or logical hybrid pipeline is used for an xDSL communication system, and particularly for processing DMT symbols. This flexible arrangement permits easy and efficient sequencing...
6954844 Microprocessor architecture capable of supporting multiple heterogeneous processors  
A memory control unit for controlling access, by one or more devices within a processor, to a memory array unit external to the processor via one or more memory ports of the processor. The memory...
6931512 Method and apparatus for selectively retrieving information from a source computer using a terrestrial or satellite interface  
A requesting terminal includes an interface that allows a user to select whether data downloaded from a network (such as the Internet) is transmitted to the requesting terminal via a high-speed...
6894914 Nonvolatile memory device with parallel and serial functioning mode and selectable communication protocol  
An architecture of a nonvolatile memory device, though not requiring dedicated pins and by introducing circuit modifications that require a negligible additional silicon area in the serial...
6842728 Time-multiplexing data between asynchronous clock domains within cycle simulation and emulation environments  
An apparatus and method utilize a buffer interposed in a common signal path between asynchronous clock domains in a hardware-based logic emulation environment to manage the communication of...
6839829 Routing protocol based redundancy design for shared-access networks  
A protection CMTS is available to immediately service a cable modem should that modem's service from a working CMTS fail for any reason. To speed the service transfer (cutover) from the working...
6836839 Adaptive integrated circuitry with heterogeneous and reconfigurable matrices of diverse and adaptive computational units having fixed, application specific computational elements  
The present invention concerns a new category of integrated circuitry and a new methodology for adaptive or reconfigurable computing. The preferred IC embodiment includes a plurality of...
6789182 System and method for logging computer event data and physical components of a complex distributed system  
A system for collecting events relating to multiple distributed physical systems includes multiple event collection cards ( 100 ), each receiving events from one of the distributed physical...
6745090 Page back system and method for remote paging in a control system  
The invention comprises a modem apparatus adapted to provide full messaging and communications interface between a control device and a communications medium such as a telephone line. The modern...
6721872 Reconfigurable network interface architecture  
A network interface architecture includes a processor having an associated program memory, and a programmable logic device coupled to the processor. A connection port of the logic device is adapted...
6684321 Unified memory architecture for use by a main processor and an external processor and method of operation  
There is disclosed a processing system comprising: 1) a first data processor comprising a unified memory architecture for receiving memory access requests from an external bus coupled to the first...
6678722 Interprocessor communication system for parallel processing  
The present invention is directed to providing an interprocessor communication system capable of obviating degradation of the performance in an interprocessor communication caused by the processing...
6665745 Method and system for peripheral ordering  
The present invention is directed to a system and method of retaining peripheral ordering. A method for retaining peripheral ordering in an information handling system may include reading an...
6651157 Multi-processor system and method of accessing data therein  
A multi-processor system ( 10 ) includes a plurality of processors ( 12 ). Each processor ( 12 ) has an integrated memory ( 16 ) operable to provide, receive, and store data. Each processor ( 12 )...
6643763 Register pipe for multi-processing engine environment  
Method, system and program storage device are provided for implementing a register pipe between processing engines of a multiprocessor computing system. A register pipe includes at least one first...
6629232 Copied register files for data processors having many execution units  
Interconnect-dominated large register files are reduced in chip area and delay time. A register file in a processor having a number of execution units is divided into multiple copies. Different...
6601159 Dynamically-switched supplemental information support system for a copier system  
An integrated information support system (IISS) uses a stand-alone, large capacity memory device, such as a CD ROM, to enhance the user interface of a copier system. The IISS, providing system...
6587938 Method, system and program products for managing central processing unit resources of a computing environment  
Central processing unit (CPU) resources are managed within a computing environment. When the allocation of CPU resources to a partition of the computing environment is to be adjusted, the...
6542953 Method for configuring peer-to-peer bus bridges in a computer system using shadow configuration registers  
A method of configuring a computer system having a processor coupled by a host bus to first and second bus devices causes the processor to transmit on the host bus one or more configuration write...
6507273 Network-based remotely-controlled power switch device  
A networked-based remotely-controlled power switch device is proposed, which can be coupled to an electricity-powered system, such as a personal computer (PC), a TV, or a video recorder, to allow...
6473849 Implementing locks in a distributed processing system  
A messaging scheme to synchronize processes within a distributed memory multiprocessing computer system having two or more processing nodes interconnected using an interconnect structure of...
Matches 1 - 50 out of 144 1 2 3 >