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7644255 |
Method and apparatus for enable/disable control of SIMD processor slices
Methods and apparatus provide for disabling at least some data path processing circuits of a SIMD processing pipeline, in which the processing circuits are organized into a matrix of slices and...
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7493469 |
Performance evaluation apparatus, performance evaluation method, program and computer readable recording medium
From an application program described in the form of a flow graph, input and output arcs are extracted. Packet rates on the input and output arcs are extracted, and it is determined whether the...
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7490218 |
Building a wavecache
A microarchitecture and instruction set that supports multiple, simultaneously executing threads. The approach is disclosed in regard to its applicability in connection with a recently developed...
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7406685 |
System and method for whole-system program analysis
Defect detection in a software system made of multiple computer program programs is facilitated by using information about cross-program interactions and dependency relationships between programs...
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7383425 |
Massively reduced instruction set processor
This invention is directed to a method and apparatus for providing low, predictable latencies in processing IP packets. The apparatus provides a specialized microprocessor or hardwired circuitry to...
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7373481 |
Distributed-structure-based parallel module structure and parallel processing method
A Distributed-Structure-based parallel module structure and parallel processing method. One object is to provide a novel sequence-net computer architecture. A parallel operating structure with N+1...
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7340586 |
Data transfer for debugging in data driven type processor processing data packet with data flow program including transfer control bit setting instruction
A data-driven type information processor includes a ifinction processor manipulating contents in a data packet, a program storage unit storing a data flow program used by the function processor,...
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7280539 |
Data driven type information processing apparatus
In order to perform functional packet copying to read a large amount of data of an unspecified length from a memory at high speed and to prevent the packet copying operation from affecting other...
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7237089 |
SIMD operation method and SIMD operation apparatus that implement SIMD operations without a large increase in the number of instructions
An operation method has processing for applying a same type of operation in parallel to N M-bit operands to obtain N M-bit operation results executed on a computer. Here, N is an integer equal to...
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7130986 |
Determining if a register is ready to exchange data with a processing element
According to some embodiments, it is determined if a register is ready to exchange data with a processing element.
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7127589 |
Data processor
A data processor capable of executing sequential processing efficiently while retaining the advantages of a prior art data-driven processor. The data processor includes: an instruction fetch unit...
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7089407 |
Packet processing device processing input packet data in a packet routing device
A packet processing device which can reserve a calculation time for each instruction procedure execution unit independent of the data length of a packet by sequentially selecting an instruction...
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7082515 |
Data driven type information processing apparatus having deadlock breaking function
A C element controls a pipeline register and successively transfers data packets. When a dead-lock state occurs, a data packet in the pipeline register is erased by a master reset signal, a host...
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7057763 |
Multi-mode print data processing
Executing a plurality of print jobs in a job queue by a computing architecture, each print job including at least one instruction for processing print data, including accessing one of the print...
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7035996 |
Generating data type token value error in stream computer
A stream computer comprises a plurality of interconnected functional units. The functional units are responsive to a data- stream containing data and tokens. The data is to be operated on by one or...
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7028108 |
System and method for controlling data transfer for data array control unit having first and second selector with data shift register
A data register which outputs an input data as is when the input data fulfills a set data width for outputting, and holds the input data until a bit width of the input data is equal to or more than...
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7000022 |
Flow of streaming data through multiple processing modules
Frame-based streaming data flows through a graph of multiple interconnected processing modules. The modules have a set of performance parameters whose values specify the sensitivity of each module...
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7000098 |
Passing a received packet for modifying pipelining processing engines' routine instructions
In one embodiment, a method is provided. The method of this embodiment includes generating, by a processor that includes a plurality of processing engines capable of executing program instructions,...
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6993639 |
Processing instruction addressed by received remote instruction and generating remote instruction to respective output port for another cell
Embodiments of the invention relate to a processing cell for use in computing systems. Generally, a processing cell generates remote instructions to be received and processed by at least one other...
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6959004 |
Data driven information processing apparatus
A data packet, having a flag for determination of its processing content, a tag field and a data field, is sequentially transferred between pipeline registers according to pulses from C elements. A...
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6954843 |
Data driven information processor capable of internally processing data in a constant frequency irrespective of an input frequency of a data packet from the outside
A packet generation unit divides a plurality of generated clocks to generate clocks with different frequencies, selects any of the frequencies, sets destination information and data depending on a...
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6941448 |
Data-driven processor having multiple-precision data processing function and data processing method thereof
When a prescribed operation is performed on 1024-bit multiple-precision data in a data-driven processor, the multiple-precision data is treated as a plurality of single-precision data obtained by...
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6925549 |
Asynchronous pipeline control interface using tag values to control passing data through successive pipeline stages
An apparatus and method for externally managing data within an asynchronous pipeline. The asynchronous pipeline over which control is sought includes a data path and a control path. In accordance...
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6922736 |
Computer system and data processing method
A computer system has a node and a service processor (SVP) connected together via a diagnosis section. An input/output (I/O) unit is connected to the SVP. The diagnosis section has a serial...
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6823443 |
Data driven type apparatus and method with router operating at a different transfer rate than system to attain higher throughput
A router is formed by an M-input, 1-output junction unit and a 1-input, N-output branching unit. Where M and N satisfy the relation of (M>N), the transfer rate of a path between the junction...
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6813703 |
Emulation system for data-driven processor
An emulation system for data-driven processors aims at shortening the emulation time by employing parallel processing techniques without increasing overhead. The emulation system emulates virtual...
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6792522 |
Data driven information processor carrying out processing using packet stored with plurality of operand data
In a data driven information processor, an operation apparatus includes a data select unit and a flag select unit selecting information according to the value of flag data in an input data packet....
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6775788 |
Method for providing a synchronous communication and transaction between functions on an integrated circuit therefore the functions operate independently at their own optimized speeds
The invention relates to the field of system on a chip, SoC, information processing architecture and particularly to the use of a homogenous, concurrent-communication interconnection architecture...
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6766437 |
Composite uniprocessor
Instruction and data registers of processors of a multiprocessing computing system are joined and forked to allow processing in multiple modes of operation. When joined, the registers of the...
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6748516 |
Method and apparatus for instruction set architecture to perform primary and shadow digital signal processing sub-instructions simultaneously
Disclosed is a method, apparatus, and an instruction set architecture (ISA) for an application specific signal processor (ASSP) tailored to digital signal processing (DSP) applications. A single...
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6732140 |
System and method for dynamic allocation of software resources
A system, method and computer program that configures software threads ( 95 ) at the time requested using only the required software resource elements ( 70 ) necessary to perform a specific...
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6715061 |
Multimedia-instruction acceleration device for increasing efficiency and method for the same
The present invention proposes a multimedia-instruction acceleration device for increasing efficiency and a method for the same, which uses instruction strings having a floating-point value check...
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6708272 |
Information encryption system and method
An encryption system permits end-to-end encryption of information over an untrusted interconnection network. The information encryption system includes at least one client for processing...
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6654646 |
Enhanced memory addressing control
A processing or control system having arrangements for separately and simultaneously generating instruction addresses and data addresses having two bus systems for accessing instruction and data...
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6615341 |
Multiple-data bus architecture for a digital signal processor using variable-length instruction set with single instruction simultaneous control
A digital signal processor (DSP) employs a variable-length instruction set. A portion of the variable-length instructions may be stored in adjacent locations within memory space with the beginning...
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6530011 |
Method and apparatus for vector register with scalar values
A method and an apparatus for implementing mixed scalar and vector values in a digital processing system. In one embodiment, a digital processing system, which contains processing unit and...
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6526500 |
Data driven type information processing system consisting of interconnected data driven type information processing devices
The data driven type information processing system has a branch unit and a junction unit in the input and output stages thereof, and includes a plurality of data driven type processors between the...
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6502180 |
Asynchronous circuits with pipelined completion process
An asynchronous circuit having a pipelined completion mechanism to achieve improved throughput.
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6487617 |
Source-destination re-timed cooperative communication bus
A source module, a destination module, or both modules, that are used in a data transfer, signal over an internal communication bus to a bus master when the addressed storage location in the data...
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6460131 |
FPGA input output buffer with registered tristate enable
In accordance with the present invention, an FPGA input/output buffer including a tristate enable register is provided. A bus line provides the FPGA output through a tristate buffer to the pad or...
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6446034 |
Processor emulation virtual memory address translation
When emulating a Target architecture on a Host system having a different architecture, virtual to real address translation is typically expensive in terms of computer cycles. The cost can be...
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6339807 |
Multiprocessor system and the bus arbitrating method of the same
An arbitrator provided to a processor element requests the utilization of a bus sends a bus request signal and a bus request value according to a priority level of the processor element to the bus,...
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6275928 |
Microprocessor instruction pipeline having inhibit logic at each stage
The disclosure relates to microprocessors and, more particularly, to a system for organizing and a method for the sequencing of the circuits of a microprocessor. The instruction registers are...
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6243800 |
Computer
The invention relates to computer science, in particular, to a computer system comprising a processor, an input-output switch, an instruction loading switch, instruction memory, and a data access...
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6195628 |
Waveform manipulation in time warp simulation
A system and method for manipulating waveforms, including transaction cancellation, in parallel time-warp simulation of circuits, such as those modeled in VHDL. Events waveforms for each output of...
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6157995 |
Circuit and method for reducing data dependencies between instructions
A circuit and method is disclosed which reduces data dependencies between instructions within an application program thereby reducing time delays associated therewith. In one embodiment, a data...
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6145073 |
Data flow integrated circuit architecture
Pre-designed and verified data-driven hardware cores (intellectual property, functional blocks) are assembled to generate large systems on a single chip. Token transfer between cores is achieved...
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6115803 |
Parallel computer which verifies direct data transmission between local memories with a send complete flag
A parallel computer including a plurality of processing elements, each of processing elements comprising a flag address holding unit for temporarily holding an address of a send complete flag of a...
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6098162 |
Vector shift functional unit for successively shifting operands stored in a vector register by corresponding shift counts stored in another vector register
Vector shifting elements of a vector register by varying amounts in a single process is achieved in a vector supercomputer processor. A first vector register contains a set of operands, and a...
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6092212 |
Method and apparatus for driving a strobe signal
A method and strobe circuit are provided for maintaining a strobe signal at a valid voltage level. The method includes driving the strobe signal at the valid voltage level using a first strobe...
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