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9038074 System, method and computer program product for recursively executing a process control operation to use an ordered list of tags to initiate corresponding functional operations  
In accordance with embodiments, there are provided mechanisms and methods for controlling a process using a process map. These mechanisms and methods for controlling a process using a process map...
9003420 Resolving RCU-scheduler deadlocks  
A technique for resolving deadlocks between an RCU subsystem and an operating system scheduler. An RCU reader manipulates a counter when entering and exiting an RCU read-side critical section. At...
8997110 Resolving RCU-scheduler deadlocks  
A technique for resolving deadlocks between an RCU subsystem and an operating system scheduler. An RCU reader manipulates a counter when entering and exiting an RCU read-side critical section. At...
8990547 Systems and methods for re-ordering instructions  
Systems, methodologies, computer-readable media, and other embodiments associated with ordering instructions are described. One exemplary system embodiment can include an analysis logic configured...
8868890 No-delay microsequencer  
An apparatus generally including a memory and a circuit is disclosed. The memory may be configured to store a plurality of instructions. Each of the instructions generally includes a corresponding...
8856500 Obfuscating program by scattering sequential instructions into memory regions such that jumps occur with steps of both signs in equal frequency  
A program is obfuscated by reordering its instructions. Original instruction addresses are mapped to target addresses in an irregular way, with position dependent address steps between the...
8793689 Redundant multithreading processor  
A redundant multithreading processor is presented. In one embodiment, the processor performs execution of a thread and its duplicate thread in parallel and determines, when in a redundant...
8762996 Program and information processing apparatus determining an execution order of sequentially executing processes on a target information based on possibilities of success of execution  
A computer readable medium includes: storing an evaluation value and relating, to a plurality of evaluating target information, the evaluation value indicative of a possibility that a second...
8762620 Multiprocessor storage controller  
A storage controller containing multiple processors. The processors are divided into groups, each of which handles a different stage of a pipelined process of performing host reads and writes. In...
8752064 Optimizing communication of system call requests  
Provided herein is a method for optimizing communication for system calls. The method includes storing a system call for each work item in a wavefront and transmitting said stored system calls to...
8640129 Hardware multithreading systems and methods  
According to some embodiments, a multithreaded microcontroller includes a thread control unit comprising thread control hardware (logic) configured to perform a number of multithreading system...
8607031 Hardware device for processing the tasks of an algorithm in parallel  
A hardware device for concurrently processing a fixed set of predetermined tasks associated with an algorithm which includes a number of processes, some of the processes being dependent on binary...
8555045 Electronic meter for concurrently updating firmware and collecting meter usage with a micro controller calculates the usage when a reset time is longer than a predetermined period of storing time  
There are provided an electronic apparatus and a meter which are operable during the updating of an operating program and firmware. The electronic apparatus operable during program updating...
8508782 Method of securing printers against malicious software  
A method for securing a computer device against malicious code, the method including the steps of: executing a computer program on the computer device, the computer device having a central...
8418156 Two-stage commit (TSC) region for dynamic binary optimization in X86  
Generally, the present disclosure provides systems and methods to generate a two-stage commit (TSC) region which has two separate commit stages. Frequently executed code may be identified and...
8347069 Information processing device, information processing method and computer readable medium for determining a processing sequence of processing elements  
A storage part stores correspondence information on incorporation or change in processing sequence of processing elements. An acquiring part acquires a target processing element group. An...
8327123 Maximized memory throughput on parallel processing devices  
In parallel processing devices, for streaming computations, processing of each data element of the stream may not be computationally intensive and thus processing may take relatively small amounts...
8176301 Millicode assist instructions for millicode store access exception checking  
Millicode store access checking instructions are provided via an operand access control register (OACR) including a test modifier indicator, which is communicatively coupled to an instruction unit...
8161274 Command selection method and its apparatus  
When selecting one command within a processor from a plurality of command queues vested with order of priority, the order of priority assigned to the plurality of command queues is dynamically...
8099587 Compressing and accessing a microcode ROM  
An arrangement is provided for compressing microcode ROM (“uROM”) in a processor and for efficiently accessing a compressed “uROM”. A clustering-based approach may be used to effectively compress...
8082430 Representing a plurality of instructions with a fewer number of micro-operations  
A micro-operation (uop) fusion technique. More particularly, embodiments of the invention relate to a technique to fuse two or more uops originating from two or more instructions.
8074061 Executing micro-code instruction with delay field and address of next instruction which is decoded after indicated delay  
A microsequencer is disclosed that controls the order in which microcode instructions are fetched from a microcode ROM. Each microcode instruction includes an execution command for execution by...
8069340 Microprocessor with microarchitecture for efficiently executing read/modify/write memory operand instructions  
A microprocessor instruction translator translates a macroinstruction into three microinstructions to perform a read/modify/write operation on a memory operand. A first microinstruction instructs...
8055807 Transport control channel program chain linking including determining sequence order  
A method, apparatus, and computer program product for processing a chain linked transport control channel program in an I/O processing system is provided. The method includes receiving a first...
8036770 Numerical control unit with set amount of execution  
A numerical control apparatus with a single block function is provided including a start button (3), an execution amount setting unit (13), and a machining program execution controller (4). Once...
8001365 Exchange of processing metric information between nodes  
Method and nodes are provided for propagating between the nodes information about processing capacity of peer nodes. Two types of signals are sent from propagating nodes towards their peer nodes....
8001540 System, method and program product for control of sequencing of data processing by different programs  
Generally, piping applications defined by combining stages of programming with a sequence control program and specifying to the sequence control program piping commands. The stages may be...
7991986 Microprocessor starting to execute a computer program at a predetermined interval  
A microprocessor which is adapted to start a second task at a predetermined time when a first task is running if a current time becomes to be equal to the predetermined time is disclosed. The...
7978374 Printing system to optimize printing workflow  
In print processing performed for a print document based on a print instruction that instructs plural processes applied to the print document, a process that uses resource information embedded in...
7949866 Exception types within a secure processing system  
An apparatus for processing data includes a processor operable in a plurality modes including at least one secure mode being a mode in a secure domain and at least one non-secure mode being a mode...
7930520 Processor and program execution method capable of efficient program execution  
A processor for sequentially executing a plurality of programs using a plurality of register value groups stored in a memory that correspond one-to-one with the programs. The processor includes a...
7890729 Memory card and host device thereof  
A memory card is attached to a host device, and includes a data control circuit which transfers data with respect to the host device in synchronism with a rise edge and a fall edge of a clock signal.
7886123 Memory card and host device thereof  
A memory card is attached to a host device, and includes a data control circuit which transfers data with respect to the host device in synchronism with a rise edge and a fall edge of a clock signal.
7852846 Method and apparatus for out-of-order processing of packets  
A method and apparatus for out-of-order processing of packets are described. In one embodiment, the method includes receiving packets in a global order, the packets being designated for different...
7831794 Memory card and host device thereof  
A memory card is attached to a host device, and includes a data control circuit which transfers data with respect to the host device in synchronism with a rise edge and a fall edge of a clock signal.
7831819 Filter micro-coded accelerator  
Method and apparatus for a filter micro-code accelerator are described.
7808999 Method and apparatus for out-of-order processing of packets using linked lists  
These and other aspects of the present invention will be better described with reference to the Detailed Description and the accompanying figures. A method and apparatus for out-of-order...
7735090 On demand software contract modification and termination in running component assemblies  
A method, apparatus and article of manufacture to dynamically modify, terminate, or replace software components and connections (i.e., contracts) between components in a running assembly....
7725698 Operation apparatus having sequencer controlling states of plurality of operation units and operation apparatus control method therefor  
An operation apparatus includes a plurality of operation device units; a configuration memory storing setting information provided for each predetermined state of the plurality of operation device...
7694110 System and method of implementing microcode operations as subroutines  
Various embodiments of methods and systems for implementing a set of microcode operations corresponding to a microcoded instruction as a microcode subroutine are disclosed. In one embodiment, a...
7680909 Method for configuration of a processing unit  
A method for configuration of an Auxiliary Processing Unit (APU) of multiprocessor system is presented. The multiprocessor system has at least a Main Processing Unit (MPU) coupled to the APU via a...
7669042 Pipeline controller for context-based operation reconfigurable instruction set processor  
An instruction execution pipeline for use in a data processor. The instruction execution pipeline comprises: 1) an instruction fetch stage; 2) a decode stage; 3) an execution stage; and 4) a...
7650484 Array—type computer processor with reduced instruction storage  
An array-type computer processor including a data path unit communicating with a state control unit obtains data of a predetermined number of cooperative partial instruction codes, and operates...
7650487 Method and structure for coordinating instruction execution in out-of-order processor execution using an instruction including an artificial register dependency  
A technique for coordinating execution of instructions in a processor that allows instructions to execute out-of-order includes decoding a particular instruction that is defined in accordance with...
7634640 Data processing apparatus having program counter sensor  
Data processing apparatus having an execution unit, a flow controller having a program counter, and a program counter sensor, which is connected to a data bus and to the program counter. The...
7613907 Embedded software camouflage against code reverse engineering  
Methods and apparatus for identifying a first flow control instruction in an executing program, the first instruction being associated with a first program address at which program execution will...
7610476 Multiple control sequences per row of microcode ROM  
Various embodiments of methods and systems for storing multiple groups of microcode operations and corresponding control sequences per row of microcode ROM are disclosed. In one embodiment, an...
7602399 Method and apparatus for generating a pixel using a conditional IF—NEIGHBOR command  
A device and method for controlling generation of a final pixel utilizes a conditional statement, referred to as an IF_NEIGHBOR statement, which when compiled, causes a programmable pixel shader...
7526638 Hardware alteration of instructions in a microcode routine  
Processor logic gates are used to modify microcode instructions, while they are being executed. The results of previous operations are used by the hardware to modify subsequent instructions in a...
7519799 Apparatus having a micro-instruction queue, a micro-instruction pointer programmable logic array and a micro-operation read only memory and method for use thereof  
Embodiments of the present invention relate to high-performance processors, and more specifically, to processors that store all operation information associated with each instruction in a single...