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5752271 Method and apparatus for using double precision addressable registers for single precision data  
Utilizing a register file only addressable as double precision registers for part of the register file for storing single precision register results. In particular, groups of data in addressable...
5732251 DSP with register file and multi-function instruction sequencer for vector processing by MACU  
A DSP including a register file connected to data memories and functional units is provided. Functional units read operands from the register file and store results into the register file. Various...
5729723 Data processing unit  
A data processing unit which can access a greater number of registers than registers addressable by an instruction to realize high-speed execution of a program. To this end, the data processing...
5706460 Variable architecture computer with vector parallel processor and using instructions with variable length fields  
A variable vectored architecture digital computer provides real-time cont computations for a rocket control system by executing efficient variable-length instructions optimized for such an...
5689653 Vector memory operations  
The op-code bandwidth limitation of computer systems is alleviated by providing one or more vector buffers. Data is transferred between memory and processor registers in a two part process using...
5687340 Reduced area floating point processor control logic utilizing a decoder between a control unit and the FPU  
A control logic unit outputs a group of encoded control signals that have less redundancy than the FPU signals needed to control a floating point processor, thus requiring fewer signal lines using...
5687359 Floating point processor supporting hexadecimal and binary modes using common instructions with memory storing a pair of representations for each value  
A computer system having multiple floating point modes and common instructions for each mode in order to implement operations in a mode independent manner. A computer system includes two floating...
5678016 Processor and method for managing execution of an instruction which determine subsequent to dispatch if an instruction is subject to serialization  
A method and apparatus are disclosed for managing the execution of a floating-point store instruction within a data processing system including a memory and a superscalar processor having a number...
5673407 Data processor having capability to perform both floating point operations and memory access in response to a single instruction  
A data processor includes both integer and floating point operation units and operates as a reduced instruction set computer (RISC). A modification of the normal load/store RISC operations includes...
5673426 Processor structure and method for tracking floating-point exceptions  
An out of program control order execution data processor that comprises an issue unit, execution means, a floating point exception unit a precise state unit, a floating point status register, and...
5669013 System for transferring M elements X times and transferring N elements one time for an array that is X*M+N long responsive to vector type instructions  
A plurality of special multi-element registers, called "vector registers" herein, are incorporated into a scalar computer. The vector registers are controlled to sequence the transfer of vector...
5669010 Cascaded two-stage computational SIMD engine having multi-port memory and multiple arithmetic units  
A two-stage cascaded processor engine for Digital Signal Processing (DSP) utilizing parallel multi-port memories and a plurality of arithmetic units, including adders and multiplier-accumulators...
5668984 Variable stage load path and method of operation  
A floating point processing system and method of operation are disclosed. Single word precision denormalized operands and also misaligned operands are detected while such operands are being loaded...
5640524 Method and apparatus for chaining vector instructions  
A vector processing system includes a main memory, vector registers, vector resources for accessing memory to transfer vector data between main memory and the vector registers and to perform...
5634118 Splitting a floating-point stack-exchange instruction for merging into surrounding instructions by operand translation  
A stack-register swap or exchange instruction is executed by splitting the exchange into two halves, and then each half is absorbed into a surrounding instruction by translating its source or...
5623616 Floating point operaton throughput control  
A circuit and method degrades throughput of floating point operations within a computing system. At the time of manufacture a preprogrammed value is stored. This may be done, for example, using...
5604913 Vector processor having a mask register used for performing nested conditional instructions  
In a computer equipped with a mask register in which is stored mask data indicating, for each array element, whether or not a statement such as an IF statement or an ELSE statement should be...
5600811 Vector move instruction in a vector data processing system and method therefor  
A "vnmvh" instruction reduces a substantial number of instructions and the temporary use of a register in a software code which executes nested conditional constructs in a vector data processor...
5598547 Vector processor having functional unit paths of differing pipeline lengths  
A vector processor includes functional unit paths, each having an input and an output, and with at least one functional unit path including a plurality of pipelined functional elements coupled to...
5590365 Pipeline information processing circuit for floating point operations  
Disclosed is a pipeline information processing circuit which comprises a register control unit for outputting a plurality of data held in registers at a time; an arithmetic operation unit for...
5544337 Vector processor having registers for control by vector resisters  
The present invention is an improved high performance scalar/vector processor. In the preferred embodiment, the scalar/vector processor is used in a multiprocessor system. The scalar/vector...
5542057 Method for controlling vector data execution  
An information processing apparatus includes an arithmetic operation executing unit, a memory unit, a memory control unit, a resource managing unit, and an execution designating unit. The...
5537606 Scalar pipeline replication for parallel vector element processing  
A central processor (which may be entirely contained in a single semiconductor chip), that performs vector operations using scalar machine resources. The processor incorporates multiple parallel...
5530881 Vector processing apparatus for processing different instruction set architectures corresponding to mingled-type programs and separate-type programs  
A vector processor system for processing vector instructions and scaler instructions fetched from storages includes a memory storage, a first and a second scaler processing units connected to the...
5481686 Floating-point processor with apparent-precision based selection of execution-precision  
A floating-point processor comprises an input format converter, operand registers, a mode selector, an execution unit, and a result format converter. Inputs to the processor include first and...
5450607 Unified floating point and integer datapath for a RISC processor  
A 64-bit wide unified integer and floating-point datapath for a RISC processor. The unified datapath allows for the sharing of some of the major hardware resources within the integer and...
5438669 Data processor with improved loop handling utilizing improved register allocation  
A plurality of physical registers greater in number than can be addressed by instructions are provided. The physical registers are divided into a plurality of partial groups or windows. Each of the...
5410657 Method and system for high speed floating point exception enabled operation in a multiscalar processor system  
A method and system are disclosed for implementing floating point exception enabled operation without substantial performance degradation. In a multiscalar processor system, multiple instructions...
5396603 Data processor having resources and execution start control for starting execution of succeeding instruction in resource before completion of preceding instruction  
A data processor having memory requesters to execute instructions, an instruction hold unit disposed for each resource to hold an instruction being executed in the resource and instructions to be...
5390352 Vector processing device comprising a single supplying circuit for use in both stride and indirect vector processing modes  
A device for processing vector data for a memory device into indirect memory input data and an indirect address signal or stride vector input data and a stride address signal depending on whether...
5375212 System for re-execution of instruction after exception handling in first processing path while concurrently executing instructions in second processing path  
A method of handling a fault associated with a first floating point instruction upon reaching the next sequential floating point instruction is described. The first floating point instruction is...
5299320 Program control type vector processor for executing a vector pipeline operation for a series of vector data which is in accordance with a vector pipeline  
In a program control type processor for executing plural instructions including a vector pipeline instruction including a data processor for executing a pipeline operation, there is provided a...
5261113 Apparatus and method for single operand register array for vector and scalar data processing operations  
In a data processing system in which a processing unit can execute both scalar and vector instructions, the use of a single operand register file to store both the scalar operation operands and the...
5197138 Reporting delayed coprocessor exceptions to code threads having caused the exceptions by saving and restoring exception state during code thread switching  
Save-Exception-State and Restore-Exception-State primitives are defined in the operating system and are used to confine the reporting of delayed asynchronous coprocessor exceptions to the...
5134693 System for handling occurrence of exceptions during execution of microinstructions while running floating point and non-floating point instructions in parallel  
A method of handling a fault associated with a first floating point instruction upon reaching the next sequential floating point instruction is described. The first floating point instruction is...
5123095 Integrated scalar and vector processors with vector addressing by the scalar processor  
A vector processor is closely integrated with a scalar processor. The scalar processor provides virtual-to-physical memory translation for both scalar and vector operations. In vector operations, a...
5043867 Exception reporting mechanism for a vector processor  
A data process system capable of executing vector instructions and scalar instructions detects the occurrence of arithmetic exception conditions and allows subsequent scalar instruction processing...
5027272 Method and apparatus for performing double precision vector operations on a coprocessor  
This invention relates to a system having a coprocessor being utilized by a processor for floating point double precision operations. The coprocessor utilizes one format for storing double...
4949250 Method and apparatus for executing instructions for a vector processing system  
A data processing system containing a vector processor and a scalar processor executes scalar and vector instructions which both comprise an operation portion and an operand pointer portion. In the...
4901235 Data processing system having unique multilevel microcode architecture  
A data processing system which includes a central processor unit which has an arithmetic logic unit (ALU) for performing fixed point arithmetic operations and a separate floating point unit (FPU)...
4868739 Fixed clock rate vector processor having exclusive time cycle control programmable into each microword  
A method is provided for optimizing performance in a fixed clock rate computer system. A control word is provided having a control portion for operational instructions and a programmable timing...
4845659 Accelerated validity response permitting early issue of instructions dependent upon outcome of floating point operations  
Apparatus and method for accelerating a validity response provided by a floating point unit assures the validity of the present state of a condition code and an interrupt signal before the...
4823260 Mixed-precision floating point operations from a single instruction opcode  
Apparatus for performing mixed precision calculations in the floating point unit of a microprocessor from a single instruction opcode. 80-bit floating-point registers (44) may be specified as the...
4819155 Apparatus for reading to and writing from memory streams of data while concurrently executing a plurality of data processing operations  
A pair of arithmetic logic units for receiving instruction to perform data transformations are positioned in tandem relation between an input bus and an output bus which are both connected to a...
4812974 Data processing apparatus for processing list vector instructions  
List operation on a vector in which the number of an element of a vector operand is represented by an element of another vector operand is to be performed with a general-purpose computer system...
4809157 Dynamic assignment of affinity for vector tasks  
A method for dynamically assigning and removing task affinity for a resource is disclosed and claimed. A first interrupt handler recognizes a special task interrupt condition which is generated by...
4740893 Method for reducing the time for switching between programs  
The invention relates to vector registers (VRs) which have associated therewith a vector status register (VSR) that includes VR status information in the form of vector in-use and change bits for...
4725973 Vector processor  
A vector processor for executing vector instructions comprises a plurality of vector registers and a plurality of pipeline arithmetic logic units. The vector registers are constructed with a...
4675809 Data processing system for floating point data having a variable length exponent part  
An execution processing device for executing variable length floating-point data of exponent part designated by two or more kinds of representation systems and fixed length floating-point data of...
4541046 Data processing system including scalar data processor and vector data processor  
A vector processor comprises a main storage for storing scalar instruction chains and vector instruction chains for executing desired operations, and a scalar processing unit and a vector...
Matches 201 - 250 out of 261 < 1 2 3 4 5 6 >