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7610371 Mediation system and method with real time processing capability  
A mediation method and a mediation system divided into independent node components that process event records independently of the other components of the system. In addition, the system is...
7593947 System, method and program for grouping data update requests for efficient processing  
A system, method and program product for processing a multiplicity of data update requests made by a customer. All of the data update requests are grouped into a plurality of blocks for execution...
7512724 Multi-thread peripheral processing using dedicated peripheral bus  
One embodiment of the present invention performs peripheral operations in a multi-thread processor. A peripheral bus is coupled to a peripheral unit to transfer peripheral information including a...
7340591 Providing parallel operand functions using register file and extra path storage  
A number of architectural and implementation approaches are described for using extra path (Epath) storage that operate in conjunction with a compute register file to obtain increased instruction...
7313646 Interfacing of functional modules in an on-chip system  
An electronic system comprises an initiator module and a target module addressable by the initiator module, and an interface and control module for interfacing between respective communication...
7124318 Multiple parallel pipeline processor having self-repairing capability  
A multiple parallel pipeline digital processing apparatus has the capability to substitute a second pipeline for a first in the event that a failure is detected in the first pipeline. Preferably, a...
7035991 Surface computer and computing method using the same  
A surface computer includes an address generator for generating an address for adjusting surface region data concerning at least a storage region and a concurrent computer, provided at a subsequent...
6993639 Processing instruction addressed by received remote instruction and generating remote instruction to respective output port for another cell  
Embodiments of the invention relate to a processing cell for use in computing systems. Generally, a processing cell generates remote instructions to be received and processed by at least one other...
6950893 Hybrid switching architecture  
A hybrid switching module includes a hybrid switching module processor data channel; a hybrid switching module main data channel; an input/output link data channel; a switch coupled to the hybrid...
6925548 Data processor assigning the same operation code to multiple operations  
A data processor can assign a greater number of operations to instruction codes with shorter length, thereby implementing high performance, high code efficiency and low cost data processor. The...
6915410 Compiler synchronized multi-processor programmable logic device with direct transfer of computation results among processors  
A system for designing and implementing digital integrated circuits utilizing a set of synchronized sequencers that permit quick and efficient parallel processing of system level designs. The...
6829697 Multiple logical interfaces to a shared coprocessor resource  
An embedded processor complex contains multiple protocol processor units (PPUs). Each unit includes at least one, and preferably two independently functioning core language processors (CLPs). Each...
6826522 Methods and apparatus for improved efficiency in pipeline simulation and emulation  
Techniques for achieving the effects of significantly reducing the amount of computer memory needed to simulate the behavior of a multi-stage pipelined processor, as well as, significantly...
6820188 Method and apparatus for varying instruction streams provided to a processing device using masks  
A circuit is provided to provide instruction streams to a processing device: embodiments of the circuit are appropriate for use with RISC CPUs, whereas other embodiments are useable with other...
6820187 Multiprocessor system and control method thereof  
A multiprocessor system including a master processor, a plurality of processor elements, each of which is provided with a local memory, the processor elements being controlled in accordance with...
6795909 Methods and apparatus for ManArray PE-PE switch control  
Processing element to processing element switch connection control is described using a receive model that precludes communication hazards from occurring in a synchronous MIMD mode of operation....
6766437 Composite uniprocessor  
Instruction and data registers of processors of a multiprocessing computing system are joined and forked to allow processing in multiple modes of operation. When joined, the registers of the...
6728862 Processor array and parallel data processing methods  
An array of processor elements has multiple instruction streams and multiple data streams broadcast to all of the processor elements. The processor elements are each connected to multiple...
6578133 MIMD array of single bit processors for processing logic equations in strict sequential order  
A system for designing and implementing digital integrated circuits utilizing a set of synchronized sequencers that permit quick and efficient parallel processing of system level designs. The...
6513108 Programmable processing engine for efficiently processing transient data  
A programmable processing engine processes transient data within an intermediate network station of a computer network. The engine comprises an array of processing elements symmetrically arrayed as...
6453412 Method and apparatus for reissuing paired MMX instructions singly during exception handling  
In a computer having a single execution pipeline, the invention provides a method for executing paired MMX-type instructions. The method includes executing two MMX-type instructions as paired MMX...
6446191 Methods and apparatus for efficient synchronous MIMD operations with iVLIW PE-to-PE communication  
A SIMD machine employing a plurality of parallel processor (PEs) in which communications hazards are eliminated in an efficient manner. An indirect Very Long Instruction Word instruction memory...
6404439 SIMD control parallel processor with simplified configuration  
According to the SIMD control parallel processing method for performing common operation in parallel in a plurality of elements, comprising first retaining means for retaining operation data...
6341343 Parallel processing instructions routed through plural differing capacity units of operand address generators coupled to multi-ported memory and ALUs  
Three parallel instruction processing pipelines of a microprocessor share two data memory ports for obtaining operands and writing back results. Since a significant proportion of the instructions...
6219776 Merged array controller and processing element  
A highly parallel data processing system includes an array of n processing elements (PEs) and a controller sequence processor (SP) wherein at least one PE is combined with the controller SP to...
6192384 System and method for performing compound vector operations  
A processor particularly useful in multimedia applications such as image processing is based on a stream programming model and has a tiered storage architecture to minimize global bandwidth...
6161159 Multimedia computer with integrated circuit memory  
An alternate route to improved multimedia performance without replacing the central processor unit (CPU) is presented, through the utilization of general-purpose components available in a computer....
6158000 Shared memory initialization method for system having multiple processor capability  
A multiprocessor computer system is provided with a BIOS that allows parallel execution of system initialization tasks by at least two processors to reduce system boot-up time. At power-on, one of...
6128720 Distributed processing array with component processors performing customized interpretation of instructions  
A multi-processor array organization is dynamically configured by the inclusion of a configuration topology field in instructions broadcast to the processors in the array. Each of the processors in...
6067610 Method and data processor for synchronizing multiple masters using multi-bit synchronization indicators  
A method and apparatus for syncing multiple bus masters (110, 120, 130, 140) utilize a sync bus (160) to communicate synchronization information between a plurality of bus masters. For each bus...
6049861 Locating and sampling of data in parallel processing systems  
A method is disclosed for reproducible sampling of data items of a dataset which is shared across a plurality of nodes of a parallel data processing system. In data mining of large databases,...
6041400 Distributed extensible processing architecture for digital signal processing applications  
A circuit arrangement and method utilize a distributed extensible processing architecture to allocate various DSP functions or operations between multiple processing cores disposed on an integrated...
6038651 SMP clusters with remote resource managers for distributing work to other clusters while reducing bus traffic to a minimum  
A remote resource management system for managing resources in a symmetrical multiprocessing comprising a plurality of clusters of symmetric multiprocessors having interfaces between cluster nodes...
6038584 Synchronized MIMD multi-processing system and method of operation  
There is disclosed a multi-processor system arranged, in one embodiment, as an image and graphics processor. The processor is structured with several individual processors all having communication...
5892890 Computer system with parallel processor for pixel arithmetic  
A pixel processor, for use in conjunction with a color video monitor or an all points addressable color print engine, includes brush logic, mask logic, clip logic, and a multi-pixel logic unit to...
5815680 SIMD multiprocessor with an interconnection network to allow a datapath element to access local memories  
Datapath elements 1 1 to 1 N can exchange data respectively with local memories 2 1 to 2 N through data buses 6 1 to 6 N , so that parallel operations can be performed. The data bus 6 1 ,...
5781775 Parallel process scheduling method in a parallel computer and a processing apparatus for a parallel computer  
A method and a processing apparatus for use in a parallel computer realizing a coordinate scheduling which does not degrade a throughput performance of a system. According to this invention, if a...
5765037 System for executing instructions with delayed firing times  
A system and method reorder instructions for effecting faster branch execution. A processor element is coupled to receive stored instructions in a first order, and to process the received...
5708835 Dual-directional parallel processor  
A dual-directional parallel processor. The inventive processor (10) includes an array (20) of processing elements (30). Each processing element has a first circuit (31) for inputting and outputting...
5701482 Modular array processor architecture having a plurality of interconnected load-balanced parallel processing nodes  
A modular array processor architecture (10) comprising a plurality of interconnected parallel processing node (11)s that each comprise a control processor (12), an arithmetic processor (13) having...
5701416 Adaptive routing mechanism for torus interconnection network  
A routing mechanism includes two acyclic non-adaptive virtual channels having two types of virtual channel buffers to store packets along deterministic virtual paths between nodes in an...
5682491 Selective processing and routing of results among processors controlled by decoding instructions using mask value derived from instruction tag and processor identifier  
An array processor topology reconfiguration system and method enables processor elements in an array to dynamically reconfigure their mutual interconnection for the exchange of arithmetic results...
5673423 Method and apparatus for aligning the operation of a plurality of processors  
A method and apparatus are disclosed for aligning a plurality of multi-processors. The apparatus preferably comprises an alignment unit associated with each processor and a logic network for...
5630129 Dynamic load balancing of applications  
An application-level method for dynamically maintaining global load balance on a parallel computer, particularly on massively parallel MIMD computers. Global load balancing is achieved by...
5517656 Multicomputer system and method  
A multicomputer system and method for automatic sequential-to-parallel program partition, scheduling and execution. The plurality of computer are connected via a uni-directional slotted ring...
5475856 Dynamic multi-mode parallel processing array  
A Parallel RISC computer system is provided by a multi-mode dynamic multi-mode parallel processor array with one embodiment illustrating a tightly coupled VLSI embodiment with an architecture which...
5465375 Multiprocessor system with cascaded modules combining processors through a programmable logic cell array  
In a multiprocessor data processing system, modules are cascaded by means of intermodule buses. Each module comprises a data processing unit, a first memory, a logic cell array programmable into...
5418970 Parallel processing system with processor array with processing elements addressing associated memories using host supplied address value and base register content  
A highly-parallel processing system in which a number of processing elements are interconnected by a network, and are also connected to a system bus and controlled by a central processing unit....
5408658 Self-scheduling parallel computer system and method  
An incremental method is described for distributing the instructions of an execution sequence among a plurality of processing elements for execution in parallel. The distribution is based upon...
5388230 Parallel processor having multi-processing units either connected or bypassed in either series or parallel by the use of bus switching  
A parallel process which includes a plurality of processing units connected to each other via input/output ports. Each of the plurality of processing units includes a memory for storing a program...
Matches 1 - 50 out of 71 1 2 >