Matches 301 - 343 out of 343 < 1 2 3 4 5 6 7
Match Document Document Title
5668737 High-speed data processor and coding method  
A high-speed data processor and data compression method includes an input module for receiving an input data stream from an input port. An encoder is coupled to the input module and performs...
5669012 Data processor and control circuit for inserting/extracting data to/from an optional byte position of a register  
A data processor being provided with a microdecoder which decodes instruction codes comprising two operation code parts, a source operand specifying part and a destination operand specifying part,...
5666548 Process of extracting and processing information in a vertical interval of a video signal transmitted over a personal computer bus  
A computer implemented process for extracting and processing information in a vertical interval of a video signal comprising a plurality of video lines selects a portion of the vertical interval...
5666544 Method and system for communicating data between independent controllers  
A system for communicating data between two control units each capable of executing independent operations and having a memory for operations, the system is provided with a new data generator on...
5666490 Computer network system and method for managing documents  
An electronic document management system converts documents into electronic images which can be sequentially routed to individual users in a network system. The network system includes at least two...
5655134 Network structure storing and retrieval method for a data processor  
A link information storer stores link connection information and a node information storer stores node label information by sequentially searching links from the beginning of a network when data in...
5649226 Processor having multiple instruction registers  
A program is stored alternately in the memories 1A and 1B one word at a time. One execution circuit 5 is induced to select and execute the outputs of instruction decoders 4A and 4B alternately....
5649227 System for supporting a conversion between abstract syntax and transfer syntax  
The system for supporting input or reference of a data value or a structure value which is a component of a PDU (Protocol Data Unit). The abstract syntax of PDU is defined in accordance with...
5649233 Apparatus for flexibly selecting primary and secondary connectors and master and slave cascaded disk drives of an IDE interface  
An apparatus for selecting the primary/secondary and the master/slave configuration of an enhanced IDE interface. The apparatus has a first and a second connector, each for connecting to a cascade...
5623684 Application specific processor architecture comprising pre-designed reconfigurable application elements interconnected via a bus with high-level statements controlling configuration and data routing  
The architecture and design method of an application specific processor ("ASP") is disclosed. The ASP is designed by integrating selected pre-designed application elements contained in a library....
5606712 Information managing apparatus capable of utilizing related information in different function modes  
A plurality of memory areas which store various type of information having different formats such as address information, schedule information, memo information in units of type of information are...
5603043 System for compiling algorithmic language source code for implementation in programmable hardware  
A configurable hardware system for implementing an algorithmic language program, including at least two programmable logic devices (PLD), a private hardware resource connectible to one PLD, and a...
5596756 Sub-bus activity detection technique for power management within a computer system  
The computer system includes an integrated processor coupled to a power management unit and at least one peripheral device. The integrated processor includes a bus interface unit that provides an...
5596759 Method for initializing a multiple processor computer system using a common ROM  
Two design variations which allow multiple processors to start up using a single ROM are disclosed. In each design, a single, primary processor is allowed to perform a complete POST while the...
5537605 Method and apparatus for controlling at least one piece of equipment  
An arrangement is provided which enables one or more controllable pieces of equipment to be controlled by a control unit. Each piece of controllable equipment includes a control structure...
5513363 Scalable register file organization for a computer architecture having multiple functional units or a large register file  
A scalable register file including first and second micro-register files organized in a pipelined fashion to minimize the access time of the register file where there are a large number of...
5490279 Method and apparatus for operating a single CPU computer system as a multiprocessor system  
A method and apparatus for upgrading a uniprocessor system to a multiprocessing system simply by the insertion of a second microprocessor integrated circuit. The computer system is provided with an...
5450608 Programmable logic having selectable output states for initialization and resets asynchronously using control bit associated with each product term  
A programmable logic device having the capability of initializing and resetting to a specified digital state. One or more clear/preset product terms are available for initializing and resetting the...
5437043 Information processing apparatus having a register file used interchangeably both as scalar registers of register windows and as vector registers  
An arrangement having a register file having registers greater in number than those which are designated by an instruction, a pipeline ALU, a current window pointer and window number modifier...
5392448 Real-time operating system and virtual digital signal processor for the control of a computer  
A data processor, such as a digital signal processor, that has augmented memory, I/O and math units for real-time performance of complex functions, is placed under the control of a group of...
5317754 Method and apparatus for enabling an interpretive execution subset  
An apparatus and method are established for recognizing guest virtual machines which require only a subset of interpretive execution facilities. The interpretive execution initialization process...
5301338 System including central processing unit  
A central processing unit includes a programmable logic array, a timing control unit, a predecoder, a data input/output part, and a processing part. The processing part carries out a predetermined...
5179734 Threaded interpretive data processor  
A threaded interpretive processor includes an input/output (I/O) bus (10) and an address bus (12) for carrying data thereon. An internal ROM/RAM (80) is interfaced with the I/O bus (10) and is...
5175864 Central processing unit in a computer system for controlling a manufacturing line  
In a line computer used for controlling a manufacturing line control system, in which a high speed CPU and low speed I/O devices are used, optimum bus timing for signal transmission is generated,...
5084815 Sorting and merging of files in a multiprocessor  
In a multiprocessor system (FIG. 1), file sorting and merging operations are broken down into a series of partial-file sorts and partial-file merges which are executed in parallel by a plurality of...
4875156 Computer having a protection device to selectively block incorrect control signals  
In a computer having a program including a first type of instruction and a second type of instruction, a program memory has a first area for storing the first type of instruction and a second area...
4839851 Programmable data path device  
A programmable data path device capable of operating as a general purpose hardware accelerator. The device includes a plurality of processing cells, memory such as RAM or EPROM for storing data...
4805133 Processor memory element and a new computer architecture  
A Processor Memory Element [PMEL] is described which includes a method for eliminating the von Neumann bottleneck for executing instructions, resulting in improved performance for executing...
4791555 Vector processing unit  
A functional unit designed with arithmetic pipelining for vector processing is attached to a base data processor from which it receives vector instructions and operands for processing. Stepping of...
4787031 Computer with virtual machine mode and multiple protection rings  
A computer system including a processor and memory, the processor having a virtual mode of operation in which it uses a virtual machine monitor which allows it to service a plurality of users...
4780820 Control flow computer using mode and node driving registers for dynamically switching between parallel processing and emulation of von neuman processors  
A parallel processing computer comprises at least a memory for storing program as well as data and instructions for executing the program, a plurality of functional units, a node driving register...
4636978 Programmable status register arrangement  
A programmable status register arrangement which enables the status of a plurality of status registers in a system to be checked simultaneously including fusible links connected to the outputs of...
4507728 Data processing system for parallel processing of different instructions  
The present invention is a data processing system which has plural operation units which can execute plural instructions in parallel. The system also has plural instruction control units each of...
4354230 Synchronized, fail-operational, fail-safe multi-computer control system  
For each of two computer systems, logic flowcharts describe background program in which highly detailed memory checksum tests of fixed memory and complementary tests of variable memory are...
4339795 Microcontroller for controlling byte transfers between two external interfaces  
A microcontroller is disclosed for controlling the bidirectional transfer of data between two external units. The external units supply data to the microcontroller selectively on a plurality of...
4040035 Microprocessor having index register coupled to serial-coupled address bus sections and to data bus  
A microprocessor includes a data bus and an address bus. The address bus has first and second sections coupled together in series by bus switch circuitry. The microprocessor also includes control...
4030079 Processor including incrementor and program register structure  
A processor including a first bus, a second bus, and a control circuit for producing control signals includes a counter having a plurality of inputs and outputs responsive to the control circuit...
3631401 DIRECT FUNCTION DATA PROCESSOR  
A direct function data-processing system employing a number of functional elements all connected to either an input or output data bus or both so as to function as a data source of a data user or...
3315235 Data processing system  
3278906 Dual channel mode  
3266023 Parallel program data system  
3202970 Scatter read/write operation using plural control words  
3012723 Electronic computer system  
Matches 301 - 343 out of 343 < 1 2 3 4 5 6 7