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9021213 System and method for sharing media in a computer network  
A computerized method for sharing removable storage media in a network, the method comprising associating, in an index entry, a first piece of removable storage media in a first storage device...
9009441 Memory channel selection in a multi-channel memory  
In general, this disclosure describes techniques for selecting a memory channel in a multi-channel memory system for storing data, so that usage of the memory channels is well-balanced. A request...
8972697 Gather using index array and finite state machine  
Methods and apparatus are disclosed for using an index array and finite state machine for scatter/gather operations. Embodiment of apparatus may comprise: decode logic to decode a scatter/gather...
8954711 Address generation in a data processing apparatus  
A data processing apparatus is provided comprising processing circuitry and an instruction decoder responsive to program instructions to control processing circuitry to perform the data...
8938469 Dynamically adjusting hash table capacity  
An example hashing unit includes a plurality of hardware-based hash tables, wherein each of the hash tables comprises a plurality of buckets, and wherein the plurality of hash tables comprise a...
8930675 Transactional memory that performs a TCAM 32-bit lookup operation  
A transactional memory (TM) receives a lookup command across a bus from a processor. The command includes a memory address. In response to the command, the TM pulls an input value (IV). The memory...
8930671 Logical address offset in response to detecting a memory formatting operation  
The present disclosure includes methods, devices, and systems for a logical address offset. One method embodiment includes detecting a memory unit formatting operation. Subsequently, in response...
8886900 Legacy data management  
Various systems, processes, products, and techniques may be used to manage legacy data. In one general implementation, a system, process, and/or product for managing legacy data may include the...
8886914 Multiplex restore using next relative addressing  
According to one embodiment of the present disclosure, a method for multiplex restore using next relative address may be provided. The method may include identifying an address of a first data...
8879435 Memory access system and method  
Various embodiments of systems and methods for memory access are provided. In one embodiment, a data segment is stored in a plurality of memory segments of at least one memory bank. The data...
8880848 Memory control and data processing using memory address generation based on differential addresses  
A memory control device that transfers data from an external memory to a data processing unit having plural processing mechanisms, includes an absolute address storage unit that stores an absolute...
8868822 Data-processing method, program, and system  
A data-processing method in a flash memory with a plurality of sectors, the method includes arranging first data which is not updated in a first sector at a leading portion of a second sector and...
8832391 Semiconductor device, controller associated therewith, system including the same, and methods of operation  
In one embodiment, the semiconductor device includes a data control unit configured to selectively process data for writing to a memory. The data control unit is configured to enable a processing...
8798085 Techniques to process network protocol units  
Techniques are described herein that can be used to process inbound network protocol units. In some implementations, the techniques may process inbound DDP segments. In some implementations, a...
8762686 Multimode accessible storage facility  
A multimode accessible storage facility (10) is described that allows block access in a block access mode and row access in a row access mode. The facility comprises—a memory unit (20) comprising...
8751771 Efficient implementation of arrays of structures on SIMT and SIMD architectures  
One embodiment of the present invention sets forth a technique providing an optimized way to allocate and access memory across a plurality of thread/data lanes. Specifically, the device driver...
8738889 Generating multiple address space identifiers per virtual machine to switch between protected micro-contexts  
Embodiments of an invention for generating multiple address space identifiers per virtual machine to switch between protected micro-contexts are disclosed. In one embodiment, a method includes...
8732415 Write data mask method and system  
In various embodiments, dedicated mask pins are eliminated by sending a data mask on address lines of the interface. A memory controller receives a request for a memory write operation from a...
8719588 Memory address obfuscation  
Apparatus, systems, and methods may operate to provide, to a memory device, an obfuscated clear-page address derived from a clear-page address that is not the same as a key-page address and/or...
8713285 Address generation unit for accessing a multi-dimensional data structure in a desired pattern  
An apparatus, system, and method for providing a multi-dimensional data structure and address generation unit configured to calculate real addresses in order to access the multi-dimensional data...
8700877 Address mapping for a parallel thread processor  
A method for thread address mapping in a parallel thread processor. The method includes receiving a thread address associated with a first thread in a thread group; computing an effective address...
8700883 Memory access techniques providing for override of a page table  
A memory access technique that provides for overriding a translation lookaside buffer and page table data structure, in accordance with one embodiment of the present invention, includes...
8683113 Concurrently searching multiple devices of a non-volatile semiconductor memory  
A non-volatile semiconductor memory is disclosed comprising N memory devices each comprising a plurality of blocks, wherein each block comprises a plurality of memory segments accessed through an...
8683177 Content addressable memory (CAM) device and method for updating data  
A content addressable memory (CAM) (100) can include a CAM memory array (102) having both a data field (102-0) and a mask field (102-1). A multiplexer (MUX) (108) can selectively load data from...
8671264 Storage control device and storage system  
A storage control device for controlling the storage device including a medium for storing data, logical address information, and address translation information and a memory for storing the...
8656121 Facilitating data coherency using in-memory tag bits and tag test instructions  
Fine-grained detection of data modification of original data is provided by associating separate guard bits with granules of memory storing original data from which translated data has been...
8645644 Facilitating data coherency using in-memory tag bits and tag test instructions  
A method is provided for fine-grained detection of data modification of original data by associating separate guard bits with granules of memory storing original data from which translated data...
8645633 Facilitating data coherency using in-memory tag bits and faulting stores  
Fine-grained detection of data modification of original data is provided by associating separate guard bits with granules of memory storing the original data from which translated data has been...
8645665 Virtualizing physical memory in a virtual machine system utilizing multilevel translation table base registers to map guest virtual addresses to guest physical addresses then to host physical addresses  
A processor including a virtualization system of the processor with a memory virtualization support system to map a reference to guest-physical memory made by guest software executable on a...
8635430 Translation of input/output addresses to memory addresses  
An address provided in a request issued by an adapter is converted to an address directly usable in accessing system memory. The address includes a plurality of bits, in which the plurality of...
8631222 Translation of input/output addresses to memory addresses  
An address provided in a request issued by an adapter is converted to an address directly usable in accessing system memory. The address includes a plurality of bits, in which the plurality of...
8607022 Processing quality-of-service (QoS) information of memory transactions  
Systems and methods for processing quality-of-service (QoS) information of memory transactions are described. In an embodiment, a method comprises receiving identification information and...
8607028 Enhanced addressability for serial non-volatile memory  
A method and a memory device are provided for accessing a storage location. The method includes storing an extended address value in a register in a non-volatile memory device. The method further...
8599859 Iterative parsing and classification  
Some of the embodiments of the present disclosure provide a method comprising performing, by an iterative parser and classifier engine, a first parsing and classification cycle on a data packet,...
8595465 Virtual address to physical address translation using prediction logic  
Some of the embodiments of the present disclosure provide a method for predicting, for a first virtual address, a first descriptor based at least in part on the one or more past descriptors...
8549218 Low cost implementation for small content-addressable memories  
A content-addressable memory (CAM) for managing the reallocation of erasable objects within a non-volatile memory is conceptually separated into two tables: a first table provides verification of...
8533428 Translating a guest virtual address to a host physical address as guest software executes on a virtual machine  
A processor including a virtualization system of the processor with a memory virtualization support system to map a reference to guest-physical memory made by guest software executable on a...
8520791 STTC encoder for single antenna WAVE transceivers  
An encoder in a transmitter uses space-time trellis coding. An input bitstream is multiplexed to produce in parallel a set of output bitstreams. A multiplier applies a code generating weight to...
8520852 Method and apparatus for store and replay functions in a digital radio broadcasting receiver  
A method includes: receiving a plurality of audio frames, assembling groups of the audio frames into logical recording units, storing a plurality of the logical recording units, retrieving the...
8510516 Systems and methods for sharing media in a computer network  
A computerized method for sharing removable storage media in a network, the method comprising associating, in an index entry, a first piece of removable storage media in a first storage device...
8504799 ROM data patch circuit, embedded system including the same and method of patching ROM data  
A read only memory (ROM) data patch circuit replaces ROM data stored in N modified ROM data blocks with patch data stored in N random access memory (RAM) patch blocks based on patch information....
8489856 System and article of manufacture for providing an address format compatible with different addressing formats used for addressing different sized address spaces  
Provided are a system and article of manufacture for providing an address format compatible with different addressing formats used for addressing different sized address spaces. An address format...
8458440 Deferred complete virtual address computation for local memory space requests  
One embodiment of the present invention sets forth a technique for computing virtual addresses for accessing thread data. Components of the complete virtual address for a thread group are used to...
8452943 Apparatus and method for address generation for array processor and array processor  
In address generation processors, the start and the end of the processing for address generation need to be controlled in addition to controlling the processing for base address generation. A...
8448239 Secure controller for block oriented storage  
A storage controller includes a command pointer register. The command pointer register points to a chain of commands in memory, and also includes a security status field to indicate a security...
8447949 Detection of zero address events in address formation  
One or more registers used to form an address usable in accessing storage are examined to determine if a zero address event has occurred in forming the address. In response to an indication that a...
8433881 Programmable signal processing circuit and method of interleaving  
A programmable signal processing circuit is used to (de-)interleave a data stream. Data from the signal stream is stored in a data memory (28) and read in a different sequence. The programmable...
8423682 Address space emulation  
Apparatus and systems, as well as methods and articles, may operate to detect an input/output access operation associated with a configuration memory address and a first memory address bit size....
8423748 Register control circuit and register control method  
A register control circuit that controls a register specified by an inputted address includes a signal output that outputs a first control signal and a second control signal based on the inputted...
8392690 Management method for reducing utilization rate of random access memory (RAM) used in flash memory  
A management method for reducing the utilization rate of random access memory (RAM) while reading data from or writing data to the flash memory is disclosed. A physical memory set is constructed...