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5148530 Method for reexecuting instruction by altering high bits of instruction address based upon result of a subtraction operation with stored low bits  
In a data processing system using a virtual memory adressing scheme, certain software instructions call for the virtual address to be stored in a base register. The virtual address stored in the...
5142636 Memory bank address calculation with reduced instruction execution cycles  
A microcomputer in which a higher address must be corrected according to a carry or borrow signal generated during address computation for memory reference based on each addressing mode. The...
5136699 Logical address generating device for an instruction specifying two words, each divided into two parts  
On generating a logical address from first through third words where the third word has a predetermined word length and the first and the second words are longer, a lower sum is calculated...
5134694 Method and device for the processing of address words  
Process for the management of address words which determines destination addresses for the switching of data on the basis of input address words of (M+N) bits. The process includes the following...
5101338 Memory access control device which can be formed by a reduced number of LSI's  
In an access control device (30) for use in combination with first through (2√óm)-th memory units (m: 2, 3, . . . ) each of which is assigned with at least one of addresses consecutively numbered...
5093783 Microcomputer register bank accessing  
The microcomputer has a plurality of register banks, each having a plurality of registers for containing data therein, a bank address register for holding the address of one of the register banks...
5041970 Cell processor and memory-managed computer system using same  
A cell processor and memory-managed computer system using the same includes a processor module for interacting with a memory module. Within the memory module a plurality of groups of information...
5032981 Method for increasing effective addressable data processing system memory space  
An addressing technique for transparently managing assignment of memory storage locations in a memory having a total capacity of T bytes for a computer operating system, the operating system...
4984213 Memory block address determination circuit  
An adder and a comparator form portions of a modular memory address block determination circuit. The starting address of the first block and the enable signal of the first block are added to...
4967391 Data string retrieval apparatus for IC card  
Two access buses are arranged such that one access bus connects a memory section from which data is retrieved to a retrieval section, and the other access bus is connected to a control section....
4882672 System for initialization of channel controllers utilizing address pointers calculated from multiplying sizes of data fields with device numbers  
A system for initializing a set of channel controllers in an information processing system reduces the time of initialization, the number of steps used in a microprogram, and necessary hardware....
4870569 Vector access control system  
A vector access control system for a computer system is provided, including vector registers and a memory access pipeline function unit having an indirect address match checking circuit for...
4852049 Vector mask operation control unit  
A vector mask control unit and method of operating same prevents the unnecessary reading or arithmetic operation of operands corresponding to mask inhibitory bits by generating a total address...
4837738 Address boundary detector  
An address boundary detector is disclosed that functions with an arithmetic logic unit (ALU) in a computer processor while the ALU generates addresses by adding an offset or displacement to a base...
4819165 System for performing group relative addressing  
An address generation system that generates a second address relative to a first address by either incrementing, decrementing, or passing unchanged, as determined by the control digits in a LIT...
4803619 Digital data processing system incorporating apparatus for resolving names  
Apparatus in a digital computer system capable of performing a call operation and a return operation for obtaining addresses of data from names representing the data. Each name is permanently...
4799187 Memory address generator with device address type specifier  
Address generating apparatus for use in a computer system which includes a bus processor, a memory requiring 24-bit addresses, and a plurality of I/O processors, some of which generates 22-bit...
4797816 Virtual memory supported processor having restoration circuit for register recovering  
A register recovering system for a data processor having a group of general-purpose registers includes a saving register for saving the content of the general-purpose register; a control register...
4792894 Arithmetic computation modifier based upon data dependent operations for SIMD architectures  
Arithmetic Units in an SIMD processor are configurated so that status is computed based upon arithmetic conditions. This status could reflect conditions such as "A greater than B", "A equal to...
4775933 Address generation system  
An address generation system comprising a decoder for decoding an addressing field of a given instruction code, and a control circuit connected to the decoder to cause a register to be read out in...
4754435 Semiconductor device having a memory circuit  
A semiconductor device having a memory array on a semiconductor chip includes an internal address producing circuit on the same semiconductor chip. The internal address producing circuit produces...
4748556 Variable tracking word recognizer for detecting the occurrence of a dynamic-variable address  
A variable tracking word recognizer generates an indicating signal when a microprocessor has accessed a memory stack location storing a dynamically addressed variable, the address of the variable...
4704680 Address computation system for updating starting addresses of data arrays in an array processor within an instruction cycle  
An address computation system for updating starting addresses of data arrays in an array processor within an instruction cycle. A first set of registers is provided for storing starting addresses...
4704679 Addressing environment storage for accessing a stack-oriented memory  
An address environment storage unit for a stack-oriented data processor for operating in data sets arranged as structured blocks, or nested pushdown stacks. The address environment storage employs...
4654782 Variable segment size plural cache system with cache memory unit selection based on relative priorities of accessed encached programs  
A cache memory control system has a segment descriptor with a 1-bit cache memory unit designation field, and a register for storing data representing the cache memory unit designation field. An...
4652995 Encachement apparatus using multiple caches for providing multiple component values to form data items  
Encachement apparatus for use in a processing unit which is responsive to data items which include first and second component values, while values change in response to first and second...
4620274 Data available indicator for an exhausted operand string  
The present invention relates to an apparatus for providing a data available indication while inhibiting the reading of operand data beyond the last word of an operand data string. The data...
4618942 Address indication circuit capable of relatively shifting channel addresses relative to memory addresses  
In an address indication circuit for use in indicating memory addresses of a random access memory to provide delays necessary for successive channels, channel addresses are determined relative to...
4602350 Data reordering memory for use in prime factor transform  
A data reordering memory for writing data into the memory in one order and reading data out of the memory in a different order. The data reordering facilitates the processing of the data by a...
4594687 Address arithmetic circuit of a memory unit utilized in a processing system of digitalized analogue signals  
A signal address arithmetic circuit is used for performing address arithmetic required for executing such analog signal algorithms as adaptive predicative coding, adaptive bit allocation in...
4570236 Multi-dimensional parallel storage device  
Disclosed is a multi-dimensional parallel storing device, particularly for use in digital storing of picture elements scanned according to a scanning pattern. The device includes a plurality of...
4531199 Binary number substitution mechanism in a control store element  
A binary number substitution mechanism includes first and second storage arrays addressed by first and second portions, respectively, of an input binary number, producing a substitute output...
4531200 Indexed-indirect addressing using prefix codes  
Multi-level indexed indirect addressing is provided with matched pairs of prefix bytes and suffix values which can surround any instruction. Each prefix code is distinguishable from an instruction...
4521858 Flexible addressing and sequencing system for operand memory and control store using dedicated micro-address registers loaded solely from alu  
A microprocessor computer includes a control store ROM, which is flexibly addressed, using a sequence register and base register, both of which are loaded from the microprocessor data loop. The...
4511962 Memory control unit  
A memory control unit for a computer has the function of extracting or synthesizing only a necessary portion from or to two-dimensional image scan data, in addition to a conventional main memory...
4511983 Apparatus for controlling microinstructions stored in a data processing unit memory  
A controller for microinstructions grouped into microprogram segments, each of which defines a base of a microprogram segment which is to be executed, includes a bank of addressable base...
4491913 Address generating device for a communication line scanning device  
The address generating device is provided for a communication line scanning device. The lines are connected to the scanning device through n line interface circuits, n varying in accordance with...
4484265 Corner turn memory address generator  
An address generator for corner turn memories which are dimensioned in integral powers of two is disclosed. A binary adder is utilized to combine the current address with a binary number which...
4467443 Bit addressable variable length memory system  
Disclosed is a memory system for reading and writing variable length data fields. Each of the data fields are addressed by the combination of a word address, a bit address, and a field length....
4459657 Data processing system having re-entrant function for subroutines  
A data processing system is disclosed which includes a memory having a plurality of addressable register banks and for memory areas for performing a re-entrant function of a subroutine. The memory...
4456953 Apparatus for and method of addressing data elements in a table having several entries  
A data byte element E located at position d in entry i of memory section Ma having reference entry TR is addressed. Memory section Ma is one section of a table in a data processory memory, such...
4450522 Apparatus for deriving addresses of data using displacements from base addresses which change only on call and return  
In the digital computer system of the present invention, data items called immediate names represent other data items. The immediate name specifies either the address of the represented data item...
4449185 Implementation of instruction for a branch which can cross one page boundary  
In a data processing system having a memory and employing N-bit bytes and two byte addresses, a branch instruction which can cross one page boundary is executed without having to use calculations...
4428045 Apparatus for specifying and resolving addresses of operands in a digital data processing system  
Improved apparatus for specifying and resolving addresses of operands in a digital data processing system. Instructions executed by the system are contained in procedures. Addresses are calculated...
4414622 Addressing system for a computer, including a mode register  
For generating a working address in a central processing unit of a computer by combining the content of a specified one of a plurality of relocation registers with the content of one of a...
4413315 Addressing system  
An addressing system for use with a computer system having a plurality of processing units connected to independent address buses and a plurality of memories connectable to any of the address...
4400770 Cache synonym detection and handling means  
The disclosure detects and handles synonyms for a store-in-cache (SIC). A processor cache directory (PD) is searched in a principle class addressed by a subset of bits taken from a processor...
4377844 Address translator  
A memory addressing apparatus (1,20,90) is described comprising a circuit (5,26,96) responsive to a current external memory address on an input line (2,21,91) and a signal generated by an...
4373182 Indirect address computation circuit  
This invention relates to a system for determining an effective address based upon a calculation performed on address information. Depending upon the result of the calculation firmware or hardware...
4370733 Pattern generation system  
A display system employs electronic components for deriving and supplying display control signals, preferably in the form of multi-bit display control words, to control a display device. The...