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6192455 Apparatus and method for preventing access to SMRAM space through AGP addressing  
A method for preventing access to a system management random access memory (SMRAM) space is disclosed. The method intercepts access to an accelerated graphics port (AGP) aperture memory space and...
6189077 Two computer access circuit using address translation into common register file  
An access circuit for data swapping between two computers and a computer system including the access circuit. Each computer including an address bus for supplying addresses and a data bus for...
6128664 Address-translating connection device  
An address-translating connection device which makes it possible to dynamically assign an IP address to a private address when a connection is made to inside of a LAN from outside. When an inquiry...
6128684 Bus bridge  
Disclosed is a bus bridge for mutually connecting a memory bus having memories connected thereto and an I/O bus having plural I/O devices connected thereto, which comprises a conversion table in...
6122646 Method and apparatus for management of information where sub directory information in a directory identifies the relative recording location of the sub directory  
In this invention, data track of a magneto-optical disc is divided into a volume management area and an extent area to record data of file into the extent area, and to record directory management...
6119206 Design of tags for lookup of non-volatile registers  
Stack tracebacks are performed in debugging and exception handling routines, and involve providing the values of non-volatile registers at the time of entry into each function in a call chain. One...
6119214 Method for allocation of address space in a virtual memory system  
A memory manager for a virtual memory system maintains three lists of virtual addresses: those which are free to be mapped to a program, those which are currently mapped but no longer being used,...
6108722 Direct memory access apparatus for transferring a block of data having discontinous addresses using an address calculating circuit  
A method and arrangement for a dma transfer mode having multiple transactions is provided. The invention generates a set of transaction entries for a DMA transfer each of which contains...
6092157 Processing method, apparatus and system for memory management using shared memories with common data areas  
An information processing system using a plurality of nodes is disclosed, in which each of the nodes is capable of accessing its own internal memory, as well as memory of the other nodes. In...
6088758 Method and apparatus for distributing data in a digital data processor with distributed memory  
A digital data processing system and method with shared, distributed memory transfers data between corresponding data sets within memory. The digital data processing system includes a plurality of...
6073227 Circuit for moving data between remote memories and a computer  
In order to move data blocks from a source memory unit (8, 9, 12) to a target memory unit (12, 8, 9) by means of a data path (5, 6, 7), wherein the blocks moved are not necessarily framed in the...
6073224 Network interface circuit with replacement circuitry and method for segregating memory in an address translation unit with locked and unlocked regions  
A circuit and method for segregating address entries of memory, internal to an address translation unit, into locked and unlocked regions. The locked region is a portion of the memory that can be...
6065104 Method of embedding page address translation entries within a sequentially accessed digital audio data stream  
A data stream accessed in a sequential manner is stored in a plurality of pages in a main memory of a computer system. The pages are contiguous in virtual memory but not in physical memory. The...
6061773 Virtual memory system with page table space separating a private space and a shared space in a virtual memory  
A virtual memory system includes a virtual address space including a process private space, a shared space, and a page table space located between the process private space and the shared space....
6058463 Paged memory data processing system with overlaid memory control registers  
A data processing system has a CPU (12) that accesses memory (16-18) through a memory management interface (14). The memory management interface (14) supports paging of modules of nonvolatile...
6055617 Virtual address window for accessing physical memory in a computer system  
Physical memory is accessed by associating identified memory with a window of virtual address space whose size and location are specified by an application program. In the typical application of...
6055602 Logical positioning within a storage device by a storage controller  
A logical positioning mechanism is provided within a storage controller, thus enabling the storage controller to determine which logical position in a storage device is to be accessed next. The...
6049852 Preserving cache consistency in a computer system having a plurality of memories with overlapping address ranges  
A means for preserve cache consistency is provided for a system comprising a central processing unit, a first physical memory, a second physical memory for which the address is common to the first...
6044445 Data transfer method and memory management system utilizing access control information to change mapping between physical and virtual pages for improved data transfer efficiency  
A data transfer method and a memory management system capable of improving a data transfer efficiency for data transfer between a device interface and a user space. A data transfer method and a...
6041397 Efficient transmission buffer management system  
A system is configured to provide an efficient management or control of a buffer memory system. The system can also be used to transmit data between communicating components of a computer system....
6041396 Segment descriptor cache addressed by part of the physical address of the desired descriptor  
A structure for, and a method of operating, a descriptor cache to store segment descriptors retrieved from memory. In one embodiment, the descriptor cache is direct-mapped and addressed by a first...
6016522 System for switching between buffers when receiving bursty audio by computing loop jump indicator plus loop start address for read operations in selected buffer  
Method and apparatus for wavetable style playback of audio data received from a bursty source is disclosed. Incoming audio data is directed to one buffer while another buffer is available for...
6014733 Method and system for creating a perfect hash using an offset table  
A method and mechanism for converting a non-contiguous subset of values in a large range, such as selected Unicode code points, into a contiguous or mostly contiguous smaller range with a perfect...
6012135 Computer having multiple address ports, each having logical address translation with base and limit memory management  
Method and apparatus for a logical address translator which translates a logical address into a physical address in a computer. The computer includes a plurality of address ports. Each address...
6012063 Block file system for minimal incremental data transfer between computing devices  
A portable computing device is described with a file system designed for providing improved data transfer methodology. The file system is implemented as a "Delta Block" File System (DBFS)...
6012132 Method and apparatus for implementing a page table walker that uses a sliding field in the virtual addresses to identify entries in a page table  
A method and apparatus for implementing a page table walker that uses a sliding field in the virtual addresses to identify entries in a page table. According to one aspect of the invention, an...
6009502 Method and apparatus for fast and robust data collection  
For storing and retrieving data, the present invention enhances performance by allocating a single oversized contiguous storage area and by allowing data wrapping. Reliability is insured by...
RE36462 Method to control paging subsystem processing in virtual memory data processing system during execution of critical code sections  
A method to logically serialize a plurality of independent system events in a virtual memory data processing system. Each event causes interrupt servicing routines to be executed and requires data...
5999933 Process and apparatus for collecting a data structure of a memory dump into a logical table  
A hardware/software system for analyzing memory dumps. The system collects data structures in a memory dump into logical tables, one logical table per selected type of data structure. The logical...
5991862 Modified indirect addressing for file system  
A logical address and a pointer entry for a file in an indirect address file system are translated into a physical address. A decision module tests a pointer flag in a present pointer entry. The...
5978903 Apparatus and method for automatically accessing a dynamic RAM for system management interrupt handling  
A System Management Mode is transparent to normal system operations and dynamic RAM (DRAM) is available in the Upper Memory Block address range that is normally not accessible in many...
5978882 Real-mode, 32-bit, flat-model execution apparatus and method  
Flat-model, 32-bit, real-mode execution may be obtained in an INTELâ„¢ X86-compatible processor of a computer to increase address space, while handling interrupts transparently. A protected-mode...
5963977 Buffer management and system coordination method  
A method of coordinating access to a data buffer including a plurality of data blocks, using a buffer list with a plurality of entries corresponding to the data blocks. Each buffer list entry...
5963983 Method and apparatus for dynamically creating conversion tables to access a semiconductor memory device  
An improved external semiconductor memory device having a work memory for storing logical address-physical address conversion information. According to one embodiment of the present invention, a...
5963981 System and method for uncached store buffering in a microprocessor  
In a microprocessor system utilizing a cache memory, an uncached store buffer is provided for efficiently providing uncached store data and uncached store addresses to a multiplexed system...
5960466 Computer address translation using fast address generator during a segmentation operation performed on a virtual address  
An improved address translation method and mechanism for memory management in a computer system is disclosed. A segmentation mechanism employing segment registers maps virtual addresses into a...
5960431 Method and apparatus for adding data storage bins to a stored computer database while minimizing movement of data and balancing data distribution  
In a database system that stores database objects in partitioned mode using bins to represent storage locations at which individual records of an object are stored, after they have been...
5956751 Computer memory management system using physical segmentation space allocation  
A displacement segmentation memory management system is based on physical segmentation space allocation. A program is divided into segments defined by the physical memory space available. One or...
5946716 Sectored virtual memory management system and translation look-aside buffer (TLB) for the same  
A memory management system is described which divides each virtual page into two or more sectors. Each of these sectors can then be individually loaded into memory in order to reduce bandwidth...
5946715 Page address space with varying page size and boundaries  
A method of addressing a computer subsystem memory comprised of establishing an aperture having a predetermined page size, addressing the memory at address boundaries defining multiples of half...
5940868 Large memory allocation method and apparatus  
Computer method and apparatus for allocating and accessing large memory. Under a given operating system, the invention apparatus creates multiple processes, each having a corresponding virtual...
5937425 Flash file system optimized for page-mode flash technologies  
A method for organizing a flash memory in which the size of the memory portion for reading or writing data, such as a block, differs from the size of the smallest portion for erasing, such as a...
5933857 Accessing multiple independent microkernels existing in a globally shared memory system  
Microkernel memory references, traditionally required to refer to memory by exact physical address, are transformed so as to be able to map the references to addresses in multiple memory nodes. As...
5920881 Method and system for using a virtual register file in system memory  
A computer bridge processes transactions in a computer system that includes a system memory. The bridge includes a first address decoder that allocates address space to the system memory according...
5913231 Method and system for high speed memory address forwarding mechanism  
A system and method for high speed memory address forwarding is presented. A method according to the present invention for high speed memory address forwarding for a processing system, the...
5909588 Processor architecture with divisional signal in instruction decode for parallel storing of variable bit-width results in separate memory locations  
An instruction code is received by an instruction input section 103 and then decoded by the instruction decode section 105 to generate an operand and control signals. The instruction division...
5907854 Flash memory file system for writing data files without rewriting an entire volume  
A file system (10) for a memory device includes a first volume (12), a second volume (14), and a third volume (16). The first volume (12) is located at a highest portion of the memory space...
5903917 Method and system for alignment of blocks in a program image  
A computer system and method for aligning blocks within source program image in accordance with alignment constraints. The source program image is divided in pages. The alignment system receives...
5897660 Method for managing free physical pages that reduces trashing to improve system performance  
The present invention overcomes the drawbacks of conventional operating system implementations of virtual to physical memory address mapping by providing a method for free physical page management...
5890000 Cooperation of global and local register allocators for better handling of procedures  
A method and device for optimizing a compiler involves cooperation between the global and local register allocators in assigning symbolic registers to hardware registers. A large procedure may...