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7620793 |
Mapping memory partitions to virtual memory pages
Systems and methods for addressing memory using non-power-of-two virtual memory page sizes improve graphics memory bandwidth by distributing graphics data for efficient access during rendering....
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7617380 |
System and method for synchronizing translation lookaside buffer access in a multithread processor
A system and method for synchronizing translation lookaside buffer (TLB) access in a multithread processor is disclosed. When a first exception is found while searching the TLB, the exception is...
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7617379 |
Multi-hit control method for shared TLB in a multiprocessor system
The present invention comprises, for enabling sharing an address translation buffer (TLB=Translation Lookaside Buffer) between plural threads without generating undesirable multi-hits in an...
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7617378 |
Multiprocessor system with retry-less TLBI protocol
A symmetric multiprocessor data processing system (SMP) that implements a TLBI protocol, which enables multiple TLBI operations from multiple processors to complete without causing delay. Each...
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7613898 |
Virtualizing an IOMMU
In one embodiment, a system comprises one or more input/output (I/O) devices; an I/O memory management unit (IOMMU) coupled to receive memory requests sourced by the I/O devices and configured to...
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7606981 |
System and method for reducing store latency
According to one embodiment of the invention, a method comprises verifying that a cache block is not exclusively owned, and if not, transmitting a message identifying both the cache block and a...
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7596663 |
Identifying a cache way of a cache access request using information from the microtag and from the micro TLB
A data processor operable to process data said data processor comprising: a set associative cache divided into a plurality of cache ways and operable to store data processed by said data processor;...
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7596655 |
Flash storage system with data storage security
A flash storage comprises a flash memory, including a plurality of physical memory blocks, each of physical memory blocks comprising a plurality of memory segments, and a plurality of physical...
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7590820 |
Efficient algorithm for multiple page size support in IPF long format VHPT
A machine-accessible medium may contain program instructions that, when executed by a processor, may cause the processor to perform at least one operation including searching a virtual hash page...
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7587574 |
Address translation information storing apparatus and address translation information storing method
Context information pertaining to the virtual address is obtained, and a storage location for storing the address translation information is determined based on the context information.
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7580675 |
Data communication apparatus functioning as ID tag and ID-tag reader and writer
A data communication apparatus includes an antenna, an analog front-end circuit, and a controller. The analog front-end circuit is connected between the antenna and the controller and includes...
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7577816 |
Remote translation mechanism for a multinode system
The present invention provides a method of initializing shared memory in a multinode system. The method includes building a local address space in each of a plurality of nodes and exporting the...
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7577764 |
Method, system, and computer program product for virtual adapter destruction on a physical adapter that supports virtual adapters
A method, computer program product, and distributed data processing system for directly destroying the resources associated with one or more virtual adapters that reside within a physical adapter...
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7568097 |
Method for file system security by controlling access to the file system resources using externally stored attributes
The present invention is an algorithm that manages the ability of a user or software program to access certain protected file resources. This invention describes a method for file system security...
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7562204 |
Identifying and relocating relocatable kernel memory allocations in kernel non-relocatable memory
A method for identifying relocatable kernel memory allocations in kernel non-relocatable memory is described. In this method, a physical address hardware mapping entry (PA HME) for each process...
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7558939 |
Three-tiered translation lookaside buffer hierarchy in a multithreading microprocessor
A three-tiered TLB architecture in a multithreading processor that concurrently executes multiple instruction threads is provided. A macro-TLB caches address translation information for memory...
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7555628 |
Synchronizing a translation lookaside buffer to an extended paging table
A processor including logic to execute an instruction to synchronize a mapping from a physical address of a guest of a virtualization based system (guest physical address) to a physical address of...
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7552255 |
Dynamically partitioning pipeline resources
In one embodiment of the present invention, a method includes invalidating an entry of a filter coupled to a pipeline resource if an update to the entry occurs during a first context; and flushing...
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7552254 |
Associating address space identifiers with active contexts
In one embodiment of the present invention, an apparatus includes a pipeline resource having different address spaces each corresponding to a different address space identifier. Each address space...
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7549035 |
System and method for reference and modification tracking
A method for propagating reference and modification bit values into a translation table. The method includes issuing a write instruction including a virtual address, translating the virtual address...
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7546439 |
System and method for managing copy-on-write faults and change-protection
A method of identifying a shared main memory page containing a physical address corresponding to a virtual address included in an issued write instruction. The method includes determining the...
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7543291 |
Processor purging system and method
A processor purging system comprising a translation lookaside buffer (TLB) having a plurality of translation pairs, at least one memory cache, and logic configured to detect whether at least one of...
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7543131 |
Controlling an I/O MMU
In an embodiment, a computer system comprises a processor; a memory management module comprising a plurality of instructions executable on the processor; a memory coupled to the processor; and an...
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7543084 |
Method for destroying virtual resources in a logically partitioned data processing system
A method for directly destroying one or more virtual resources that reside within a physical adapter and that are associated with a virtual host. Specifically, the present invention is directed to...
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7539843 |
Virtual memory fragment aware cache
The present invention is directed to a method, computer program product, and system for processing memory access requests. The method includes the following features. First, page table entries of a...
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7539842 |
Computer memory system for selecting memory buses according to physical memory organization information stored in virtual address translation tables
Systems and methods for program directed memory access patterns including a memory system with a memory, a memory controller and a virtual memory management system. The memory includes a plurality...
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7533241 |
Variable size cache memory support within an integrated circuit
An integrated circuit 2 is provided with a cache memory 6 and a cache controller 10 coupled to the cache memory 6 via a cache memory interface 8 . The cache controller supports different...
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7533220 |
Microprocessor with improved data stream prefetching
A microprocessor coupled to a system memory has a memory subsystem with a translation look-aside buffer (TLB) for storing TLB information. The microprocessor also includes an instruction decode...
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7530067 |
Filtering processor requests based on identifiers
Processing within a computing environment is facilitated by filtering requests of the computing environment. A processing unit that receives a request determines whether it is to perform the...
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7526627 |
Storage system and storage system construction control method
In the present invention, memory resources are effectively utilized by virtualizing external memory resources as internal memory resources, and erroneous operations that destroy the cooperative...
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7519791 |
Address conversion technique in a context switching environment
According to some embodiments, a memory management unit receives a virtual address and provides a corresponding physical address. The memory management unit stores generated virtual...
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7516297 |
Memory management
Systems, methods, and devices are provided for memory management. One method embodiment includes providing an operating system capable of supporting variable page sizes. The method includes...
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7509476 |
Advanced processor translation lookaside buffer management in a multithreaded system
Advanced processors for executing software applications on different operating system are presented including: a number of processor cores each configured to execute multiple threads, wherein each...
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7509475 |
Virtual machine control method and virtual machine system having host page table address register
A virtual machine control method and a virtual machine system are disclosed. In the case where a guest program can be operated in a plurality of address translation modes and the same guest virtual...
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7509461 |
Method and apparatus for intelligent buffer cache pre-emption
The present invention augments each entry in a memory frame table to include information associated with the availability of any page that is buffer cache allocated. The availability information...
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7509391 |
Unified memory management system for multi processor heterogeneous architecture
A multi-processor system 8 includes multiple processing devices, including DSPs ( 10 ), processor units (MPUs) ( 21 ), co-processors ( 30 ) and DMA channels ( 31 ). Some of the devices may...
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7506132 |
Validity of address ranges used in semi-synchronous memory copy operations
A system, method, and a computer readable for protecting content of a memory page are disclosed. The method includes determining a start of a semi-synchronous memory copy operation. A range of...
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7506009 |
Systems and methods for accessing a shared storage network using multiple system nodes configured as server nodes
Systems and methods for providing access to shared storage, for example, using multiple information handling system nodes configured as server nodes. Each server node is given ownership of...
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7502872 |
Method for out of user space block mode I/O directly between an application instance and an I/O adapter
The present invention provides a method that enables application instances to pass block mode storage requests directly to a physical I/O adapter without run-time involvement from the local...
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7496730 |
System and method for reducing the number of translation buffer invalidates an operating system needs to issue
Access bit contained in a page table entry is utilized for reducing the number of translation buffer flushes that an operating system needs to issue. A translation buffer flush occurs only when a...
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7493465 |
Method and system for extended memory with user mode input/output operations
A computer system having a kernel for mapping virtual memory address space to physical memory address space. The computer system uses a method for performing an input/output operation. A physical...
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7493464 |
Sparse matrix
A sparse matrix paging system is provided that dynamically allocates memory resources on demand. In some cases, this is accomplished by dynamically allocating memory resources, preferably only...
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7490217 |
Design structure for selecting memory busses according to physical memory organization information stored in virtual address translation tables
Design structures for program directed memory access patterns. A design structure is embodied in a machine readable storage medium used in a design process, the design structure including a...
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7490216 |
Methods for accessing multiple page tables in a computer system
A virtual memory system implementing the invention provides concurrent access to translations for virtual addresses from multiple address spaces. One embodiment of the invention is implemented in a...
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7490191 |
Sharing information between guests in a virtual machine environment
Embodiments of apparatuses, methods, and systems for sharing information between guests in a virtual machine environment are disclosed. In one embodiment, an apparatus includes virtual machine...
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7487324 |
Computer system
A computer system including a first volatile memory, a nonvolatile memory being virtually divided into a plurality of areas including a first memory area and a second memory area, the first memory...
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7484073 |
Tagged translation lookaside buffers in a hypervisor computing environment
Tagged translation lookaside buffer consistency is enabled in the presence of a hypervisor of a virtual machine computing environment, in which multiple processes of multiple logical processors of...
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7480829 |
Method, system and computer program product for recovery of formatting in repair of bad sectors in flash memory
A method for correcting a formatting error in a flash memory is disclosed. An error in a first formatting of a first flash memory is discovered, and a second formatting is extracted from a second...
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7480784 |
Ensuring deadlock free operation for peer to peer traffic in an input/output memory management unit (IOMMU)
In one embodiment, an input/output memory management unit (IOMMU) comprises a cache to cache translation data from memory; and a control unit coupled to the cache. The control unit is configured to...
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7480742 |
Method for virtual adapter destruction on a physical adapter that supports virtual adapters
A method for directly destroying the resources associated with one or more virtual adapters that reside within a physical adapter is provided. A mechanism is provided for directly destroying the...
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