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8706975 Memory access management block bind system and method  
A shared memory management system and method are described. In one embodiment, a memory management system includes a memory management unit for coordinating context memory storage block binds and...
8706985 System and method for optimizing garbage collection in data storage  
The present invention is directed to systems and methods for optimizing garbage collection in data storage. The data storage may be a shingled disk drive or a non-volatile solid-state memory...
8707011 Memory access techniques utilizing a set-associative translation lookaside buffer  
A memory access technique, in accordance with one embodiment of the present invention, includes caching page size data for use in accessing a set-associative translation lookaside buffer (TLB). The...
8706951 Selectively accessing faster or slower multi-level cell memory  
Devices, systems, methods, and other embodiments associated with selectively accessing memory are described. In one embodiment, a method detects an indication indicative of whether to program fast...
8706947 Virtual machine memory page sharing system  
Various embodiments disclosed herein including systems and methods for improving allocation of computing resources in a virtual machine (VM) environment. Embodiments maintain data relating to how...
8707010 Switch, information processing apparatus, and address translation method  
A switch connects and disconnects an input and output control device to and from an input and output device. The switch includes a storage unit that stores therein a translation table for use in...
8700880 Dynamic trampoline and structured code generation in a signed code environment  
A method and apparatus for performing a function based on an executable code in response to receiving a request including function parameters are described. The executable code may be validated...
8700881 Controller, data storage device and data storage system having the controller, and data processing method  
A controller, a data storage device and a data storage system including the controller, and a data processing method are provided. The controller may process a plurality of instructions in parallel...
8694755 Virtual memory management for real-time embedded devices  
An apparatus comprising an arbiter circuit, a translation circuit and a controller circuit. The arbiter circuit may be configured to generate one or more first control signals and a data write...
8687009 Image processing apparatus and controlling method therefor  
An image processing apparatus for managing a memory device having a plurality of storage areas including a storage area storing out-of-use information and a free area storing no information, the...
8688952 Arithmetic processing unit and control method for evicting an entry from a TLB to another TLB  
An arithmetic processing apparatus includes: a plurality of TLBs holding as entries a portion of a conversion table for conversion of virtual addresses into physical addresses that has been placed...
8688941 System and method for controlling automated page-based tier management in storage systems  
System and method for automated page-based management in storage systems. The system includes host computers, file servers and a storage system having automated page-based management means. The...
8688890 Bit ordering for communicating an address on a serial fabric  
A method for handling a request of storage on a serial fabric comprising formatting an address for communication on a serial fabric into a plurality of fields including a field comprising at least...
8683174 I/O conversion method and apparatus for storage system  
A storage system comprises a storage apparatus which includes a processor, storage disks, and a memory storing a page mapping table, a page mapping program, and a page-filename mapping program. A...
8683125 Tier identification (TID) for tiered memory characteristics  
A tier identification (TID) is to indicate a characteristic of a memory region associated with a virtual address in a tiered memory system. A thread may be serviced according to a first path based...
8683173 Logical address offset in response to detecting a memory formatting operation  
The present disclosure includes methods, devices, and systems for a logical address offset. One method embodiment includes detecting a memory unit formatting operation. Subsequently, in response to...
8681169 Sparse texture systems and methods  
Systems and methods for texture processing are presented. In one embodiment a texture method includes creating a sparse texture residency translation map; performing a probe process utilizing the...
8683001 Address management device  
Conventionally, when a switch virtualizing a storage (storage virtualization switch) is installed in a computer system including an SAN, a host computer, and a storage device, since a port ID of a...
8677098 Dynamic address translation with fetch protection  
What is provided is an enhanced dynamic address translation facility. In one embodiment, a virtual address to be translated is first obtained and an initial origin address of a translation table of...
8677097 Persistent block storage attached to memory bus  
A method of configuring a computer memory system includes receiving a request from customized software driver or a BIOS extension software or a customized legacy BIOS or a customized UEFI PMM...
8671264 Storage control device and storage system  
A storage control device for controlling the storage device including a medium for storing data, logical address information, and address translation information and a memory for storing the...
8671265 Distributed data storage system providing de-duplication of data using block identifiers  
An access request including a client address for data is received. A metadata server determines a mapping between the client address and storage unit identifiers for the data. Each of the one or...
8667249 Systems and methods exchanging data between processors through concurrent shared memory  
A method and apparatus for matching parent processor address translations to media processors' address translations and providing concurrent memory access to a plurality of media processors through...
8661189 Systems and methods for trimming logical block addresses corresponding to a data structure residing in non-volatile memory  
Systems and methods for trimming LBAs are provided. The LBAs can be trimmed from a file and from an NVM interface that maintains a logical-to-physical translation of the file's LBAs and controls...
8661191 Memory system  
A memory system according to an embodiment of the present invention comprises: a data managing unit 120 is divided into a DRAM-layer managing unit 120a, a logical-NAND-layer managing unit 120b, and...
8661183 Computer system, data storage method, and program for reduction of stored data after hibernation  
In a computer system that can configure a virtual machine being able to transit to a hibernation state, data of a main memory of the virtual machine stored in an auxiliary storage device is...
8656137 Computer system with processor local coherency for virtualized input/output  
A method includes selectively routing a physical address to an originating device instead of to a shared memory at controller that manages conversion of device virtual addresses to physical...
8656138 Efficiently accessing an encoded data slice utilizing a memory bin  
A method begins by a processing module receiving an encoded data slice to store and determining a slice length of the encoded data slice. The method continues with the processing module comparing...
8656084 User device including flash memory storing index and index accessing method thereof  
A user device includes a flash memory configured to store an index including a plurality of index nodes and a controller configured to control the flash memory. The controller is configured to...
8655927 Memory device, electronic system, and methods associated with modifying data and a file of a memory device  
A memory device, system and method of editing a file in a non-volatile memory device is described. The memory device includes a controller and a memory array configured to copy an existing first...
8655669 Audio encoder, audio decoder, method for encoding an audio information, method for decoding an audio information and computer program using an iterative interval size reduction  
An audio decoder has an arithmetic decoder for providing decoded spectral values on the basis of an arithmetically-encoded representation and a frequency-domain-to-time-domain converter for...
8650380 Processor and arithmatic operation method  
A processor has a first table including an entry that associates a logical address with a physical address of a page that manages a virtual space address. The processor determines, when a target...
8650461 Adaptive over-provisioning in memory systems  
A method for data storage includes, in a memory that includes multiple memory blocks, specifying at a first time a first over-provisioning overhead, and storing data in the memory while retaining...
8645665 Virtualizing physical memory in a virtual machine system utilizing multilevel translation table base registers to map guest virtual addresses to guest physical addresses then to host physical addresses  
A processor including a virtualization system of the processor with a memory virtualization support system to map a reference to guest-physical memory made by guest software executable on a virtual...
8645662 Sub-lun auto-tiering  
Embodiments of the invention include systems and methods for auto-tiering multiple file systems across a common resource pool. Storage resources are allocated as a sub-LUN auto-tiering (SLAT)...
8645667 Operating system management of address-translation-related data structures and hardware lookasides  
An approach is provided in a hypervised computer system where a page table request is at an operating system running in the hypervised computer system. The operating system determines whether the...
8645663 Network interface controller with flexible memory handling  
An input/output (I/O) device includes a host interface for connection to a host device having a memory, and a network interface, which is configured to transmit and receive, over a network, data...
8645659 Method for managing volumes/snapshots in pools of external virtual memory  
A method for managing resources in a storage pool of external virtual memory, that includes a host manager being associated with a storage pool by a storage manager. The host manager manages the...
8645664 Logical sector mapping in a flash storage array  
A system and method for efficiently performing user storage virtualization for data stored in a storage system including a plurality of solid-state storage devices. A data storage subsystem...
8639911 Load page table entry address instruction execution based on an address translation format control field  
What is provided is a load page table entry address function defined for a machine architecture of a computer system. In one embodiment, a machine instruction is obtained which contains an opcode...
8639699 System, apparatus and method for generating arrangements of data based on similarity for cataloging and analytics  
Embodiments of the invention relate generally to electrical and electronic hardware, computer software, wired and wireless network communications, and computing devices, and more particularly, to a...
8635429 Method and apparatus for mapping virtual drives  
A method and apparatus for mapping virtual drives is described. In one embodiment, the method for mapping virtual drives comprises processing first locations of a plurality of file system objects...
8631216 Dynamic address translation with change record override  
A translation table entry contains a change recording override field for controlling whether a change bit is to be set on a store or not. Each 4K byte block of main storage has an associated...
8627041 Efficient line and page organization for compression status bit caching  
One embodiment of the present invention sets forth a technique for performing a memory access request to compressed data within a virtually mapped memory system comprising an arbitrary number of...
8621141 Method and system for wear leveling in a solid state drive  
A method and system for wear leveling in a solid state drive by mapping the logical regions of the solid state drive that hold static content or information into the physical regions of the solid...
8621136 Virtualizing processor memory protection with “L1 iterate and L2 swizzle”  
Methods for providing shadow page tables that virtualize processor memory protection. In one embodiment, two shadow L2 page tables are maintained for each section, for example, each 1 MB section,...
8621149 Controlling access to a cache memory using privilege level information  
In one embodiment, a cache memory includes entries each to store a ring level identifier, which may indicate a privilege level of information stored in the entry. This identifier may be used in...
8621180 Dynamic address translation with translation table entry format control for identifying format of the translation table entry  
What is provided is an enhanced dynamic address translation facility. In one embodiment, a virtual address to be translated and an initial origin address of a translation table of the hierarchy of...
8615637 Systems and methods for processing memory requests in a multi-processor system using a probe engine  
A processing system is provided. The processing system includes a first processing unit coupled to a first memory and a second processing unit coupled to a second memory. The second memory...
8615642 Automatic page promotion and demotion in multiple page size environments  
Functionality can be implemented in a virtual memory manager (VMM) to allow small pages (e.g., 4 KB) to be coalesced into large pages (e.g., 64 KB), so that a single free list can be maintained for...