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8996843 Method for distributing random and sequential data in a tiered storage system  
A method for assigning data in a plurality of physical storage resources for an information handling system is disclosed. The plurality of physical storage resources includes a first tier and a...
8996842 Memory stacks management  
A method for managing a memory stack provides mapping a part of the memory stack to a span of fast memory and a part of the memory stack to a span of slow memory, wherein the fast memory provides...
8990542 Efficient metadata protection system for data storage  
A method for protecting page-level metadata in a storage system is provided. The method includes providing in a page table first protection data, receiving a command to read data from a page of the...
8990504 Storage controller cache page management  
A cache page management method can include paging out a memory page to an input/output controller, paging the memory page from the input/output controller into a real memory, modifying the memory...
8990476 Power interrupt management  
The present disclosure includes methods for operating a memory system, and memory systems. One such method includes updating transaction log information in a transaction log using write look ahead...
8990525 Virtual memory management apparatus  
A virtual memory management apparatus of an embodiment is embedded in a computing machine 80 and is provided with an application program 21, an operating system 22, a volatile memory 11, and a...
8990541 Compacting Memory utilization of sparse pages  
A method, system, and computer program product for improving memory utilization of sparse pages are provided in the illustrative embodiments. A set of virtual pages is identified. Each virtual page...
8984255 Processing device with address translation probing and methods  
A data processing device is provided that employs multiple translation look-aside buffers (TLBs) associated with respective processors that are configured to store selected address translations of...
8984253 Transaction log recovery  
The present disclosure includes methods for transaction log recovery in memory. One such method includes examining a number of entries saved in a transaction log to determine a write pattern,...
8972669 Page buffering in a virtualized, memory sharing configuration  
An apparatus includes a processor and a volatile memory that is configured to be accessible in an active memory sharing configuration. The apparatus includes a machine-readable encoded with...
8972668 Transactional memory that performs an ALUT 32-bit lookup operation  
A transactional memory (TM) receives a lookup command across a bus from a processor. The command includes a memory address, a starting bit position, and a mask size. In response to the command, the...
8972651 Storage system and storage method  
A storage system comprises a storage comprising a nonvolatile storage medium, and a storage control apparatus for inputting/outputting data to/from the storage. The storage control apparatus...
8972696 Pagefile reservations  
A system and method for maintaining a pagefile of a computer system using a technique of reserving portions of the pagefile for related memory pages. Pages near one another in a virtual memory...
8966155 System and method for implementing a high performance data storage system  
A method, apparatus, and computer program product for implementing a high-performance data storage device using block-access memory devices are disclosed. According to an embodiment of the present...
8966220 Optimizing large page processing  
Embodiments of the disclosure include a method for optimizing large page processing. The method includes receiving an indication that a real memory includes a first page. The first page includes a...
8959304 Management of data processing security in a secondary processor  
A data processing apparatus comprises a primary processor, a secondary processor configured to perform secure data processing operations and non-secure data processing operations and a memory...
8959302 Computer system, server module, and storage module  
An exemplary computer system includes a server module including a first processor and first memory, a storage module including a second processor, a second memory and a storage device, and a...
8954697 Access to shared memory segments by multiple application processes  
A system configures page tables to cause an operating system to copy original page data in a data store when any one of the application processes makes a first write request for the original page...
8954959 Memory overcommit by using an emulated IOMMU in a computer system without a host IOMMU  
A method and system for managing direct memory access (DMA) in a computer system without a host input/output memory management unit (IOMMU). The computer system hosts virtual machines and allows...
8954435 Method and system for reclaiming storage on a shared storage device or independent of the mount state of a file system  
A method for storage reclamation in a shared storage device. The method includes executing a distributed computer system having a plurality of file systems accessing storage on a shared storage...
8954694 Methods, data storage devices and systems for fragmented firmware table rebuild in a solid state drive  
A data storage device comprises a plurality of non-volatile memory devices configured to store a plurality of physical pages; a controller coupled to the plurality of memory devices that is...
8954698 Switching optically connected memory  
Memory is dynamically switched through the optical-switching fabric using at least one communication pattern to transfer memory space in the memory blades from one processor to an alternative...
8954685 Virtualized SAS adapter with logic unit partitioning  
A method, computer program product and computer system for virtualizing an SAS storage adapter, so as to allow logical partitions of a computer system to share a storage device. The method,...
8954707 Automatic use of large pages  
A mechanism is provided for automatic use of large pages. An operating system loader performs aggressive contiguous allocation followed by demand paging of small pages into a best-effort contiguous...
8954648 Memory device and operating method thereof  
The invention provides a memory device. In one embodiment, the memory device comprises a flash memory, a memory, and a controller. The flash memory comprises a plurality of blocks for data storage....
8954701 Address space management while switching optically-connected memory  
Memory is dynamically switched through the optical-switching fabric using at least one communication pattern to transfer memory space in the memory blades from one processor to an alternative...
8954710 Variable length encoding in a storage system  
A system and method for maintaining a mapping table in a data storage subsystem. A data storage subsystem supports multiple mapping tables including a plurality of entries. Each of the entries...
8949515 Storage device and memory controller  
Disclosed is a storage device using non-volatile semiconductor memory that achieves high performance and long life for the device. When managing the non-volatile semiconductor memory (2), physical...
8949512 Trim token journaling  
Systems and methods are disclosed for trim token journaling. A device can monitor the order in which trim commands and write commands are applied to an indirection system stored in a volatile...
8949571 Synchronizing a translation lookaside buffer with an extended paging table  
A processor including logic to execute an instruction to synchronize a mapping from a physical address of a guest of a virtualization based system (guest physical address) to a physical address of...
8943295 System and method for mapping file block numbers to logical block addresses  
A system and method for mapping file block numbers (FBNs) to logical block addresses (LBAs) is provided. The system and method performs the mapping of FBNs to LBAs in a file system layer of a...
8943296 Virtual address mapping using rule based aliasing to achieve fine grained page translation  
One or more unused bits of a virtual address range are allocated for aliasing so that multiple virtually addressed sub-pages can be mapped to a common memory page. When one bit is allocated for...
8938571 Managing I/O operations in a virtualized environment  
A set of techniques is described for performing input/output (I/O) between a guest domain and a host domain in a virtualized environment. A pool of memory buffers is reserved for performing...
8938602 Multiple sets of attribute fields within a single page table entry  
A first processing unit and a second processing unit can access a system memory that stores a common page table that is common to the first processing unit and the second processing unit. The...
8938572 Virtual machine memory page sharing system  
Various embodiments disclosed herein including systems and methods for improving allocation of computing resources in a virtual machine (VM) environment. Embodiments maintain data relating to how...
8935507 System and method for storing multiple copies of data in a high speed memory system  
A system and method for providing high-speed memory operations is disclosed. The technique uses virtualization of memory space to map a virtual address space to a larger physical address space...
8930672 Multiprocessor using a shared virtual memory and method of generating a translation table  
A multiprocessor using a shared virtual memory (SVM) is provided. The multiprocessor includes a plurality of processing cores and a memory manager configured to transform a virtual address into a...
8930674 Systems and methods for accessing a unified translation lookaside buffer  
Systems and methods for accessing a unified translation lookaside buffer (TLB) are disclosed. A method includes receiving an indicator of a level one translation lookaside buffer (L1TLB) miss...
8930673 Load page table entry address instruction execution based on an address translation format control field  
What is provided is a load page table entry address function defined for a machine architecture of a computer system. In one embodiment, a machine instruction is obtained which contains an opcode...
8930634 Speculative read in a cache coherent microprocessor  
A cache coherence manager, disposed in a multi-core microprocessor, includes a request unit, an intervention unit, a response unit and an interface unit. The request unit receives coherent requests...
8930635 Page invalidation processing with setting of storage key to predefined value  
Processing within a multiprocessor computer system is facilitated by: setting, in association with invalidate page table entry processing, a storage key at a matching location in central storage of...
8930639 Transactional memory that performs a PPM 32-bit lookup operation  
A transactional memory (TM) receives a lookup command across a bus from a processor. The command includes a memory address. In response to the command, the TM pulls an input value (IV). The memory...
8924648 Method and system for caching attribute data for matching attributes with physical addresses  
A method for caching attribute data for matching attributes with physical addresses. The method includes storing a plurality of attribute entries in a memory, wherein the memory is configured to...
8924684 Virtual memory management to reduce address cache flushing during I/O operations  
Approaches are described for reducing the number of memory address cache (e.g. TLB) flushes that need to be performed during the course of performing virtualized I/O. A device driver residing in a...
8924832 Efficient error handling mechanisms in data storage systems  
A data storage system configured to efficiently search and update system data is disclosed. In one embodiment, the data storage system can attempt to correct errors in retrieved data configured to...
8924624 Information processing device  
An information processing device includes: a data transferring unit configured to directly transfer data to a first memory area allocated to a virtual machine from an input/output device for...
8924625 Method and system of reducing number of comparators in address range overlap detection at a computing system  
A method includes implementing, with a memory of a computing device, a memory controller of the memory of the computing device, a storage device coupled to the computing device and/or an external...
8924636 Management information generating method, logical block constructing method, and semiconductor memory device  
A management information generating method wherein logical and physical block addresses (BAs) of continuous addresses are associated with each other in the BA translation table. When a logical...
8924359 Cooperative tiering  
Various systems and methods for cooperative tiering between an application and a storage device. One method can include receiving information from the application where the information identifies a...
8918601 Deferred page clearing in a multiprocessor computer system  
Processing within a multiprocessor computer system is facilitated by: logically clearing a data page by setting, in association with invalidate page table entry or set storage key processing, a...