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8468552 |
Handling dynamically linked function calls with respect to program code conversion
A technique is provided for handling dynamically linked subject function calls arranged pass subject control flow to an intermediate control structure such as a procedure linkage table, then to...
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8468297 |
Content addressable memory system
A content addressable memory system, method and computer program product is described. The memory system comprises a location addressable store having data identified by location and multiple...
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8464017 |
Apparatus and method for processing data in a massively parallel processor array system
An apparatus and method for processing data in a Massively Parallel Process Array (MPPA) system are provided, in which a scheduling processor determines an array processor and an initial memory,...
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8464023 |
Application run-time memory optimizer
A computer implemented method optimizes memory page sizes during runtime. A process is identified from a policy file. The policy file contains at least one policy based threshold. A resource usage...
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8458434 |
Unified virtual contiguous memory manager
Memory management methods and computing apparatus with memory management capabilities are disclosed. One exemplary method includes mapping an address from an address space of a physically-mapped...
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8458436 |
Device and memory system for memory management using access frequency information
An integrated memory management device according to an example of the invention comprises an acquiring unit acquiring a read destination logical address from a processor, an address conversion unit...
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8458437 |
Supporting multiple byte order formats in a computer system
Method and system for supporting multiple byte order formats, separately or simultaneously, are provided and described. In one embodiment, a page attribute table (PAT), which is programmable, is...
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8452914 |
Electronic devices with improved flash memory compatibility and methods corresponding thereto
An electronic device with improved flash memory compatibility and a method corresponding thereto are disclosed. The electronic device has a NAND flash, a processing unit and a program memory. The...
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8452942 |
Invalidating a range of two or more translation table entries and instruction therefore
An instruction is provided to perform invalidation of an instruction specified range of segment table entries or region table entries. The instruction can be implemented by software emulation,...
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8452941 |
System and method for distributing random and sequential data in a tiered storage system
This disclosure provides a method for assigning data in an information handling system including a plurality of physical storage resources comprising a first tier and a second tier which has a...
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8447936 |
Module state management in a virtual machine environment
A method for managing software modules of at least two operating systems sharing physical resources of a computing environment, but running in different partitions separated by a virtualization...
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8443167 |
Data storage device employing a run-length mapping table and a single address mapping table
A data storage device is disclosed comprising a non-volatile memory comprising a plurality of memory segments. When a write command comprising a logical block address (LBA) is received, a number of...
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8438360 |
Distributed storage through a volume device architecture
A volume manager I/O method and system. The method includes determining a storage extent mapping of storage functionality of a plurality of storage devices and generating a logical disk extent...
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8433853 |
Prefetching of next physically sequential cache line after cache line that includes loaded page table entry
A microprocessor includes a translation lookaside buffer, a request to load a page table entry into the microprocessor generated in response to a miss of a virtual address in the translation...
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8429378 |
System and method to manage a translation lookaside buffer
A system and method to manage a translation lookaside buffer (TLB) is disclosed. In a particular embodiment, a method of managing a first TLB includes in response to starting execution of a memory...
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8429377 |
Optimizing TLB entries for mixed page size storage in contiguous memory
A system and method for accessing memory are provided. The system comprises a lookup buffer for storing one or more page table entries, wherein each of the one or more page table entries comprises...
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8423730 |
Method and apparatus for supporting diverse memory access schemes
Methods and apparatus for supporting diverse memory access schemes are disclosed. In one embodiment, a mobile computing device includes program code that accesses memory according to a first bad...
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8417915 |
Alias management within a virtually indexed and physically tagged cache memory
A virtually indexed and physically tagged memory is described having a cache way size which can exceed the minimum page table size such that aliased virtual addresses VA within the cache way 12 can...
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8417893 |
Memory mapping techniques
Memory mapping techniques for non-volatile memory are disclosed where logical sectors are mapped into physical pages using data structures in volatile and non-volatile memory. In some...
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8417916 |
Perform frame management function instruction for setting storage keys and clearing blocks of main storage
What is disclosed is a set key and clear frame management function defined for a machine architecture of a computer system. In one embodiment, a machine instruction is obtained which identifies a...
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8417903 |
Preselect list using hidden pages
Disclosed is a computer implemented method, computer program product, and apparatus for maintaining a preselect list. The method comprises software components detecting a page fault of a memory...
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8417913 |
Superpage coalescing which supports read/write access to a new virtual superpage mapping during copying of physical pages
A method of assigning virtual memory to physical memory in a data processing system allocates a set of contiguous physical memory pages for a new page mapping, instructs the memory controller to...
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8417872 |
Write and merge methods in memory card systems for reducing the number of page copies
A memory card system and related write method are disclosed. The method includes receiving a write request for a predetermined page; performing a write operation on a first log block that...
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8412910 |
Maintaining reverse mappings in a virtualized computer system
For a virtual memory of a virtualized computer system in which a virtual page is mapped to a guest physical page which is backed by a machine page and in which a shadow page table entry directly...
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8412911 |
System and method to invalidate obsolete address translations
A system and method for invalidating obsolete virtual/real address to physical address translations may employ translation lookaside buffers to cache translations. TLB entries may be invalidated in...
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8407704 |
Multi-level memory architecture using data structures for storing access rights and performing address translation
The present invention provides a method and system for providing multi-level memory protection. The method includes defining a hierarchy of one or more parent process and their respective child...
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8407449 |
Non-volatile semiconductor memory storing an inverse map for rebuilding a translation table
A non-volatile semiconductor memory is disclosed comprising a non-volatile memory array including a plurality of blocks, each block comprising a plurality of memory segments each assigned a...
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8407438 |
Systems and methods for managing virtual storage disk data
A method for managing virtual disk data storage may include: 1) identifying first and second virtual storage disks on a physical storage system; 2) identifying relocatable data in the first and...
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8402069 |
Use of delete notifications by file systems and applications to release storage space
In accordance with one or more aspects, one or more portions of each of multiple files that have been freed are determined. One or more delete notifications are generated identifying the one or...
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8402247 |
Remapping of data addresses for large capacity low-latency random read memory
Described herein are method and apparatus for using an LLRRM device as a storage device in a storage system. At least three levels of data structures may be used to remap storage system addresses...
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8402248 |
Explicitly regioned memory organization in a network element
A network element that includes multiple memory types and memory sizes translates a logical memory address into a physical memory address. A memory access request is received for a data structure...
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8397050 |
Simulator and simulating method for running guest program in host
A Simulator and a simulating method for running a guest program in a host are disclosed. The simulator includes: an initialization device configured for setting content of a hypervisor page table...
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8397025 |
Apparatus and method for determining a cache line in an N-way set associative cache using hash functions
A method and apparatus for determining a cache line in an N-way set associative cache are disclosed. In one example embodiment, a key associated with a cache line is obtained. A main hash is...
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8397049 |
TLB prefetching
In an embodiment, a memory management unit (MMU) is configured to retain a block of data that includes multiple page table entries. The MMU is configured to check the block in response to TLB...
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8392628 |
Sharing memory spaces for access by hardware and software in a virtual machine environment
Example methods, apparatus, and articles of manufacture to share memory spaces for access by hardware and software in a virtual machine environment are disclosed. A disclosed example method...
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8392680 |
Accessing a volume in a distributed environment
In one aspect, a method includes exposing a set of storage volumes to a host at a requested point in time, in a virtual access mode. The set of storage volumes are handled by distributed virtual...
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8386744 |
Thin provisioning migration and scrubbing
A method for migrating data to a mass storage system, including receiving an incoming data partition for storage in the mass storage system and allocating logical storage for the incoming data...
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8386748 |
Address translation unit with multiple virtual queues
An address translation unit includes a translation lookaside buffer (TLB), a miss queue, and a control unit. The TLB may store a plurality of address translations. The miss queue may store received...
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8386746 |
Storage unit management methods and systems
Storage unit management methods and systems are provided. The storage unit comprises a plurality of physical blocks, wherein each has one of a plurality of block type definitions. First, a...
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8375164 |
Content addressable storage with reduced latency
A system and method for storing data in a content-addressable system is provided. The system includes a content-addressable storage system and a persistent cache. The persistent cache includes a...
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8375194 |
System and method for freeing memory
There is provided a computer-executed method of freeing memory. One exemplary method comprises receiving a message from a user process. The message may specify a virtual address for a memory...
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8370587 |
Memory system storing updated status information and updated address translation information and managing method therefor
A memory system in which a first management unit includes an update information managing unit that manages update information indicating an updated section in status information stored in a...
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8370602 |
Method for memory space management
A method for memory space management is disclosed. It uses a resident program loaded into an operation system or the controller of a storage device to monitor the storage space and the resource...
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8370563 |
Non-volatile memory system and access method thereof utilizing a confirm mark when data has been successfully recorded therein
Disclosed is a method for accessing a non-volatile memory device using a flash translation layer. The method includes receiving a write request for data from a file system and recording the data in...
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8370604 |
Method and system for caching attribute data for matching attributes with physical addresses
A method for caching attribute data for matching attributes with physical addresses. The method includes storing a plurality of attribute entries in a memory, wherein the memory is configured to...
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8364932 |
System and method to prioritize large memory page allocation in virtualized systems
The prioritization of large memory page mapping is a function of the access bits in the L1 page table. In a first phase of operation, the number of set access bits in each of the L1 page tables is...
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8364931 |
Memory system and mapping methods using a random write page mapping table
Memory systems and mapping methods thereof are provided. In one embodiment of a memory system, an interface device is coupled between a flash memory and a host and stores a flash translation layer....
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8352707 |
Implementing enhanced host to physical storage mapping using numerical compositions for persistent media
A method and a storage system are provided for implementing host logical address to physical memory address mapping for persistent storage media including flash memory. Numerical compositions at...
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8352705 |
Large-page optimization in virtual memory paging systems
A computer system that is programmed with virtual memory accesses to physical memory employs multi-bit counters associated with its page table entries. When a page walker visits a page table entry,...
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8352694 |
Method of controlling memory access
Provided is a method of controlling memory access. In a system including a first layer element executed in a privileged mode having a first priority of permission to access the entire region of a...
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