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9032145 Memory device and method having on-board address protection system for facilitating interface with multiple processors, and computer system using same  
A memory device includes an address protection system that facilitates the ability of the memory device to interface with a plurality of processors operating in a parallel processing manner. The...
9015400 Methods and systems for reducing the amount of time and computing resources that are required to perform a hardware table walk (HWTW)  
A computer system and a method are provided that reduce the amount of time and computing resources that are required to perform a hardware table walk (HWTW) in the event that a translation...
9009446 Using broadcast-based TLB sharing to reduce address-translation latency in a shared-memory system with electrical interconnect  
The disclosed embodiments provide a system that uses broadcast-based TLB-sharing techniques to reduce address-translation latency in a shared-memory multiprocessor system with two or more nodes...
9009386 Systems and methods for managing read-only memory  
A system includes a memory device including a real memory and a tracking mechanism configured to track relationships between multiple virtual memory addresses and real memory. The system further...
9003161 Systems and methods for managing read-only memory  
A first virtual memory address is mapped to a real memory in a memory device, and a second virtual memory address is mapped to the real memory. Here, the first virtual memory address is authorized...
8966221 Translating translation requests having associated priorities  
A lookup operation is performed in a translation look aside buffer based on a first translation request as current translation request, wherein a respective absolute address is returned to a...
8959302 Computer system, server module, and storage module  
An exemplary computer system includes a server module including a first processor and first memory, a storage module including a second processor, a second memory and a storage device, and a...
8954648 Memory device and operating method thereof  
The invention provides a memory device. In one embodiment, the memory device comprises a flash memory, a memory, and a controller. The flash memory comprises a plurality of blocks for data...
8954435 Method and system for reclaiming storage on a shared storage device or independent of the mount state of a file system  
A method for storage reclamation in a shared storage device. The method includes executing a distributed computer system having a plurality of file systems accessing storage on a shared storage...
8954697 Access to shared memory segments by multiple application processes  
A system configures page tables to cause an operating system to copy original page data in a data store when any one of the application processes makes a first write request for the original page...
8938602 Multiple sets of attribute fields within a single page table entry  
A first processing unit and a second processing unit can access a system memory that stores a common page table that is common to the first processing unit and the second processing unit. The...
8930649 Concurrent coding of data streams  
A method begins by a dispersed storage (DS) processing module concurrently receiving a first data stream and a second data stream for transmission to a receiving entity. The method continues with...
8924684 Virtual memory management to reduce address cache flushing during I/O operations  
Approaches are described for reducing the number of memory address cache (e.g. TLB) flushes that need to be performed during the course of performing virtualized I/O. A device driver residing in a...
8914609 Modifying data storage in response to detection of a memory system imbalance  
A computing device includes an interface, memory, and a processing module. The memory stores a directory and inode tables. The directory stores a file identifier and a corresponding inumber for...
8909851 Storage control system with change logging mechanism and method of operation thereof  
A method of operation of a storage control system including: providing a memory controller; accessing a volatile memory table by the memory controller; writing a non-volatile semiconductor memory...
8904123 Transferring learning metadata between storage servers having clusters via copy services operations on a shared virtual logical unit that stores the learning metadata  
A virtual logical unit that stores learning metadata is allocated in a first storage server having a first plurality of clusters, wherein the learning metadata indicates a type of storage device...
8898430 Fault handling in address translation transactions  
A data processing apparatus having a memory configured to store tables having virtual to physical address translations, a cache configured to store a subset of the virtual to physical address...
8897573 Virtual machine image access de-duplication  
A system and an article of manufacture for de-duplicating virtual machine image accesses include identifying one or more identical blocks in two or more images in a virtual machine image...
8880844 Inter-core cooperative TLB prefetchers  
A chip multiprocessor includes a plurality of cores each having a translation lookaside buffer (TLB) and a prefetch buffer (PB). Each core is configured to determine a TLB miss on the core's TLB...
8880784 Random write optimization techniques for flash disks  
Disclosed is a method for managing logical block write requests for a flash drive. The method includes receiving a logical block write request from a file system; assigning a category to the...
8868863 Method and apparatus for a frugal cloud file system  
Various embodiments provide a method and apparatus of providing a frugal cloud file system that efficiently uses the blocks of different types of storage devices with different properties for...
8868865 Computer system, server module, and storage module  
An exemplary computer system includes a server module including a first processor and first memory, a storage module including a second processor, a second memory and a storage device, and a...
8868822 Data-processing method, program, and system  
A data-processing method in a flash memory with a plurality of sectors, the method includes arranging first data which is not updated in a first sector at a leading portion of a second sector and...
8856435 External, self-initializing content addressable memory free index storage device  
A method, apparatus and computer program product for an external, self-initializing FIFO containing indexes of free CAM memory locations is presented. When data is sent to the CAM for a lookup,...
8856438 Disk drive with reduced-size translation table  
A disk drive is disclosed that utilizes an additional address mapping layer between logical addresses used by a host system and physical locations in the disk drive. Physical locations configured...
8856425 Method for performing meta block management, and associated memory device and controller thereof  
A method for performing meta block management is provided. The method is applied to a controller of a Flash memory having multiple channels, where the Flash memory includes a plurality of blocks...
8850115 Memory package utilizing at least two types of memories  
A memory package and methods for writing data to and reading data from the memory package are presented. The memory package includes a volatile memory and a high-density memory. Data is written to...
8838922 ***WITHDRAWN PATENT AS PER THE LATEST USPTO WITHDRAWN LIST***
Computer system, server module, and storage module
 
An exemplary computer system includes a server module including a first processor and first memory, a storage module including a second processor, a second memory and a storage device, and a...
8838915 Cache collaboration in tiled processor systems  
The present invention may provide a computer system including a plurality of tiles divided into multiple virtual domains. Each tile may include a router to communicate with others of said tiles, a...
8832383 Delayed replacement of TLB entries  
A cache entry replacement unit can delay replacement of more valuable entries by replacing less valuable entries. When a miss occurs, the cache entry replacement unit can determine a cache entry...
8788784 Method and device for storing and reading/writing composite document  
A method and device for storing and reading/writing a composite document are disclosed. The method includes: an initial storing area is pre-allocated for an inner controlling stream of the...
8782374 Method and apparatus for inclusion of TLB entries in a micro-op cache of a processor  
Methods and apparatus for inclusion of TLB (translation look-aside buffer) in processor micro-op caches are disclosed. Some embodiments for inclusion of TLB entries have micro-op cache inclusion...
8782344 Systems and methods for managing cache admission  
A cache layer leverages a logical address space and storage metadata of a storage layer (e.g., storage layer) to cache data of a backing store. The cache layer maintains access metadata to track...
8775776 Hash table using hash table banks  
A hash table method and structure comprises a processor that receives a plurality of access requests for access to a storage device. The processor performs a plurality of hash processes on the...
8775772 Method and apparatus for performing enhanced read and write operations in a FLASH memory system  
Methods and apparatus for enhanced READ and WRITE operations in a FLASH-based solid state storage system that includes a logical to physical translation table where the logical to physical...
8769239 Re-mapping memory transactions  
Systems and methods for re-mapping memory transactions are described. In an embodiment, a method includes receiving a memory request from a hardware subsystem to a memory, replacing a first...
8745349 Consolidating control areas  
A detection module selects logically adjacent first and second control areas of a cluster. The detection module further determines that the first and second control areas satisfy a migration test...
8745356 Processor and address translating method  
An address translation buffer of a processor including a memory unit that has a first area with first entries storing first address translation pairs of a virtual address and a physical address...
8738889 Generating multiple address space identifiers per virtual machine to switch between protected micro-contexts  
Embodiments of an invention for generating multiple address space identifiers per virtual machine to switch between protected micro-contexts are disclosed. In one embodiment, a method includes...
8732431 Logical address translation  
The present disclosure includes methods for logical address translation, methods for operating memory systems, and memory systems. One such method includes receiving a command associated with a...
8719548 Method and system for efficient emulation of multiprocessor address translation on a multiprocessor  
A method (and structure) of mapping a memory addressing of a multiprocessing system when it is emulated using a virtual memory addressing of another multiprocessing system includes accessing a...
8719507 Near neighbor data cache sharing  
Parallel computing environments, where threads executing in neighboring processors may access the same set of data, may be designed and configured to share one or more levels of cache memory....
8719508 Near neighbor data cache sharing  
Parallel computing environments, where threads executing in neighboring processors may access the same set of data, may be designed and configured to share one or more levels of cache memory....
8707011 Memory access techniques utilizing a set-associative translation lookaside buffer  
A memory access technique, in accordance with one embodiment of the present invention, includes caching page size data for use in accessing a set-associative translation lookaside buffer (TLB)....
8694752 Transferring data in response to detection of a memory system imbalance  
A method begins by a processing module determining an imbalance between inode utilization and data storage utilization. When the imbalance compares unfavorably to an imbalance threshold, the...
8688952 Arithmetic processing unit and control method for evicting an entry from a TLB to another TLB  
An arithmetic processing apparatus includes: a plurality of TLBs holding as entries a portion of a conversion table for conversion of virtual addresses into physical addresses that has been placed...
8688949 Modifying data storage in response to detection of a memory system imbalance  
A method begins by a processing module determining an imbalance between inode memory utilization and data storage memory utilization. When the imbalance compares unfavorably to an imbalance...
8677097 Persistent block storage attached to memory bus  
A method of configuring a computer memory system includes receiving a request from customized software driver or a BIOS extension software or a customized legacy BIOS or a customized UEFI PMM...
8671265 Distributed data storage system providing de-duplication of data using block identifiers  
An access request including a client address for data is received. A metadata server determines a mapping between the client address and storage unit identifiers for the data. Each of the one or...
8667258 High performance cache translation look-aside buffer (TLB) lookups using multiple page size prediction  
A computer processing system method and apparatus having a processor employing an operating system (O/S) multi-task control between multiple user programs and which ensures that the programs do...