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7103748 Memory management for real-time applications  
Memory management in a computer system is improved by preventing a subset of address translation information from being replaced with other types of address translation information in a cache...
7103751 Method and apparatus for representation of an address in canonical form  
A method and apparatus for representing an address in canonical form. The address is received and an error indicator is computed according to whether the address is received in a correct canonical...
7102957 Reduction of fusible links and associated circuitry on memory dies  
The number of fusible links and other circuit components required to provide memory cell redundancy are reduced by sharing physical memory locations among address banks that store memory addresses....
7102956 Reduction of fusible links and associated circuitry on memory dies  
The number of fusible links and other circuit components required to provide memory cell redundancy are reduced by sharing physical memory locations among address banks that store memory addresses....
7103747 Memory table and memory manager for use in managing memory  
The present invention, in various embodiments, provides techniques for managing memory in computer systems. One embodiment uses a memory table having entries to locate data residing in different...
7103708 PERFORMING LOOKUP OPERATIONS USING ASSOCIATIVE MEMORIES OPTIONALLY INCLUDING MODIFYING A SEARCH KEY IN GENERATING A LOOKUP WORD AND POSSIBLY FORCING A NO-HIT INDICATION IN RESPONSE TO MATCHING A PARTICULAR ENTRY  
Methods and apparatus are disclosed for performing lookup operations using associative memories, including, but not limited to modifying search keys within an associative memory based on...
7099999 Apparatus and method for pre-fetching data to cached memory using persistent historical page table data  
A computer system includes a main memory, at least one processor, and at least one level of cache. The system maintains reference history data with respect to each addressable page in memory,...
7096338 Storage system and data relocation control device  
The present invention achieves data relocation in accordance with a user's policies, in an environment where a plurality of storage devices are combined. The volumes belonging to storage devices...
7096340 Memory management  
One embodiment of the present invention provides a method of memory management. Within the present embodiment, a page register along with supporting logic allows a mode to be selected by a...
7096342 Flexible LUN/LBA interface for content addressable reference storage  
An LUN/LBA interface is utilized to obtain the benefits of a content addressed storage (CAS) interface. Reference data is manipulated in a manner similar to a CAS system, where an object ID (OID)...
7092289 Efficient redundancy system for flash memories with uniformly sized blocks  
A Flash memory that stores data, code, and parameters and performs parallel operations employs uniform-size blocks in array planes. A redundancy system for the Flash memory uses a CAM and a RAM for...
7093080 Method and apparatus for coherent memory structure of heterogeneous processor systems  
Disclosed is a coherent cache system that operates in conjunction with non-homogeneous processing units. A set of processing units of a first configuration has conventional cache and directly...
7089394 Optimally mapping a memory device  
In one embodiment of the present invention, a method includes observing disk requests for a drive associated with a memory device; and mapping the memory device based on observing the disk requests.
7089396 Method and profiling cache for management of virtual memory  
A method and profiling cache for management of virtual memory includes a set of entries stored in the profiling cache. Each entry of the set of entries includes a page address, a time stamp for the...
7089359 Management of hierarchically configured storage  
In a computer system having a storage system in which storage units are hierarchically configured, a management method for accurately grasping the capacity available to the computer is disclosed. ...
7089395 Computer systems, virtual storage systems and virtual storage system operational methods  
Computer systems, virtual storage systems, and virtual storage system operational methods are described. According to one aspect, a computer system includes a virtual storage system including a...
7089370 Apparatus and method for pre-fetching page data using segment table data  
A computer system includes a main memory, at least one processor, and at least one level of cache. The system contains at least one segment table having multiple segment entries recording the...
7085910 Memory window manager for control structure access  
Methods and systems for managing control structure access by a processor are disclosed. In general, a processor can communicate with a plurality of control structures. A memory window manager can...
7085909 Method, system and computer program product for implementing copy-on-write of a file  
Various copy-on-write implementations for a computing environment are presented. One copy-on-write implementation includes employing a read mapping table to perform a first virtual block to...
7085879 Dynamic data structures for tracking data stored in a flash memory device  
One or more mapping data structures are maintained containing mappings of logical flash memory addresses to physical flash memory addresses. Each mapping data structure has a predetermined capacity...
7082511 Address translation unit performing address translation from virtual address to physical address  
Provided is a TLB that can translate rapidly a virtual address to a physical address at small power consumption. A tag entry part ( 808 ) includes an ASID hold part ( 810 ), virtual address hold...
7082510 Storage device employing a flash memory  
A semiconductor disk wherein a flash memory into which data is rewritten in block unit is employed as a storage medium, the semiconductor disk including a data memory in which file data are stored,...
7082509 Method and system for allocating memory during system boot to reduce operating system memory resource consumption at run-time  
A method and system for allocating memory during system boot to reduce operating system memory resource consumption at run-time. A memory heap comprising a portion of a computer system memory in...
7080231 Processor with tagging buffer and methods for avoiding memory collisions  
A processor includes a tagging buffer for storing information that advises the processor of potential memory collisions caused by program instruction pairs that refer to the same memory address. In...
7080232 Free sector manager for data stored in flash memory devices  
A flash driver tracks data stored in a flash memory device through the use of logical-to-physical sector mapping. The mapping is stored in a data structure and allows data to be written into the...
7076628 Microprocessor memory space allocation management  
A method for identification of memory assignment conflicts in the assignment of memory location addresses to a set of buffers. Programs run in embedded processors using buffers in a fixed storage...
7076632 Fast paging of a large memory block  
A method, system, and program for fast paging of a large memory block are provided. A request to physically remove a memory block device from a data processing system is received. A logical volume...
7076500 Selective file caching method  
A method for improving performance through selective file caching is disclosed. The caching policy of a client's browser cache is set to cache all files. Web page files that reference a dynamic...
7073046 System and method for management of memory access in a communication network by use of a hyperbolic mapping function  
A method of and system for memory access have address transformation circuitry for generating a single value of memory address from one or more corresponding values of an input quantity in which...
7069389 Lazy flushing of translation lookaside buffers  
Address translation control (ATC) limits the mappings between virtual and physical addresses in order to implement a memory access policy. Each processor in a multi-processor system maintains a...
7069410 Apparatus and method of creating a mirroring map for use with different pieces of data  
A method, system and apparatus for allowing a mirroring map to be used with more than one piece of data are provided. First, a mirroring map is created and given a name. Then, the name of the...
7069411 Mapper circuit with backup capability  
A mapper circuit with backup capability. In one embodiment, the mapper circuit may store associations between physical register names (PRNs) and logical register names (LRNs) in a plurality of...
7065629 Address translation logic for use in a GPS receiver  
The address translation logic of the present invention is incorporated in a global positioning system (GPS) receiver and operates to group data in memory based on translating the address from a...
7065606 Controller architecture for memory mapping  
The present invention is directed to a method and apparatus for mapping a customer memory onto a plurality of physical memories. The apparatus may include: (a) a plurality of physical memories onto...
7065627 Method and system for providing an event driven image for a boot record  
A method and system for providing an event driven hardfile image in a computer system is disclosed. The computer system includes a hardfile, a hardfile adapter, a master boot record and an...
7065630 Dynamically creating or removing a physical-to-virtual address mapping in a memory of a peripheral device  
Systems and methods for providing on-demand memory management. In response to a mapping request from a device driver or other program, a first portion of the memory is mapped to one or more virtual...
7065671 Information processor, information processing method and medium recording information processing method  
As for a region in relation to a secondary defect, a recording means such as a memory or the like is separately used to carry out a recording and reproducing process. Thus, even when an exchange...
7062761 Dynamic arrays and overlays with bounds policies  
Systems and methods are provided for writing code to access data arrays. One aspect provides a method of accessing a memory array. Data is provided within a one-dimensional array of allocated...
7062398 Developing a disk drive manufacturing program by executing the manufacturing program on an external test system  
A method of manufacturing a disk drive is disclosed. The disk drive comprising a disk, a head actuated radially over the disk, a host interface for receiving disk commands from a host system, and a...
7058769 Method and system of improving disk access time by compression  
A data storage system using compression to increase performance. The system has a hardware compression/decompression engine for performing data compression on a data block and performing data...
7058788 Dynamic allocation of computer memory  
A method for processing requests or commands for writing and reading to and from memory that has not been allocated and reserved for one or more volumes, and a method for establishing one or more...
7058731 Failover and data migration using data replication  
A virtual volume module in a host system provides virtual volume view to user-level and system-level applications executing on the host system. The virtual volume module maps I/O from the...
7058785 Addressing objects in a large persistent storage address space  
Method and apparatus for managing persistent data objects between persistent storage and memory. A plurality of the objects include one or more pointer values that reference other ones of the...
7055014 User interface system for a multi-protocol storage appliance  
A user interface system that simplifies management of a storage system, such as a multi-protocol storage appliance, by a user or system administrator. The user interface system comprise a command...
7055015 Information processing apparatus in which processes can reduce overhead of memory access and efficiently share memory  
The information processing apparatus reserves a direct mapping region in the physical memory space and correlates physical addresses of the direct mapping region in the physical memory space with...
7050061 Autonomous address translation in graphic subsystem  
A texture caching controller, located on the graphics card, handles address logical-to-physical translation for texture addresses which are not downloaded to level-1 memory due to low use or...
7051182 Mapping of hosts to logical storage units and data storage ports in a data processing system  
An apparatus has host ports for coupling hosts to data storage devices. The data storage devices are configured into logical storage units, and the apparatus is programmed with a mapping of the...
7051177 Method for measuring memory latency in a hierarchical memory system  
A method for determining the latency for a particular level of memory within a hierarchical memory system is disclosed. A performance monitor counter is allocated to count the number of loads (load...
7046574 Memory system  
A memory system having a semiconductor storage device divided into plural areas, in which information becomes accessible by specifying an absolute physical address, and a control section for...
7047390 Method, system, and program for managing a relationship between one target volume and one source volume  
Provided are a method, system, and program for managing a relationship between one target volume and one source volume. For each of the source volume and target volume, the memory includes: (i) at...