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8477946 Method and apparatus for protecting encryption keys in a logically partitioned computer system environment  
In a logically partitioned computer system, a partition manager maintains and controls master encryption keys for the different partitions. Preferably, processes executing within a partition have...
8473712 Method for managing a memory apparatus, and associated memory apparatus thereof  
A method for managing a memory apparatus including at least one non-volatile (NV) memory element includes: providing at least one block of the memory apparatus with at least one local page address...
8473713 Method for managing a memory apparatus  
A method for managing a memory apparatus including at least one non-volatile (NV) memory element includes: building at least one local page address linking table containing a page address linking...
8473684 Delayed replacement of cache entries  
A cache entry replacement unit can delay replacement of more valuable entries by replacing less valuable entries. When a miss occurs, the cache entry replacement unit can determine a cache entry...
8473698 Converting LUNs into files or files into LUNs in real  
A LUN is provided that can store multiple datasets (e.g., data and/or applications, such as virtual machines stored as virtual hard drives). The LUN is partitioned into multiple partitions. One or...
8472457 Method and apparatus for queuing variable size data packets in a communication system  
Variable size data packets are queued in a communication system by generating from each data packet a record portion of predetermined fixed size containing information about each packet and...
8464022 Virtualization with shadow page tables  
One or more embodiments provides a shadow page table used by a virtualization software wherein at least a portion of the shadow page table shares computer memory with a guest page table used by a...
8464021 Address caching stored translation  
Systems and/or methods that facilitate logical block address (LBA) to physical block address (PBA) translations associated with a memory component(s) are presented. The disclosed subject matter...
8464017 Apparatus and method for processing data in a massively parallel processor array system  
An apparatus and method for processing data in a Massively Parallel Process Array (MPPA) system are provided, in which a scheduling processor determines an array processor and an initial memory,...
8458435 Sequential write thread detection  
Embodiments of the invention are directed to systems and methods for detecting sequential write threads in non-volatile storage media. The embodiments described herein detect write commands...
8458433 Management of persistent memory in a multi-node computer system  
A method and apparatus creates and manages persistent memory (PM) in a multi-node computing system. A PM Manager in the service node creates and manages pools of nodes with various sizes of PM. A...
8458437 Supporting multiple byte order formats in a computer system  
Method and system for supporting multiple byte order formats, separately or simultaneously, are provided and described. In one embodiment, a page attribute table (PAT), which is programmable, is...
8452940 Optimized memory management for random and sequential data writing  
A method and system writes data to a memory device including writing data to varying types of physical write blocks. The method includes receiving a request to write data for a logical block...
8447914 Memory system managing the number of times of erasing  
A memory system according to an embodiment of the present invention comprises: a memory amount required for management table creation is reduced by adopting a nonvolatile semiconductor memory...
8447950 Multidimensional network sorter integrated circuit  
A technique to implement an integrated multidimensional sorter is to store data such that it may be retrieved in a sorted fashion. Entries are stored into a memory according to time stamp value,...
8447936 Module state management in a virtual machine environment  
A method for managing software modules of at least two operating systems sharing physical resources of a computing environment, but running in different partitions separated by a virtualization...
8447920 System and method for managing data access in non-volatile memory  
The present invention is directed to systems and methods for improving access to non-volatile solid-state storage systems. Embodiments described herein provide a physical chunk number (PCN), or a...
8443168 Microcontroller comprising a plurality of registers and instruction modes  
A microcontroller includes a plurality of primary registers, a secondary register and a central processing unit (CPU). The primary registers store a plurality of primary data respectively. Each...
8433879 RFID tag semiconductor chip with memory management unit (MMU) to make only one time programmable (OTP) memory appear multiple times programmable (MTP)  
Memory management units (MMUs) are disclosed. In one aspect, an MMU may have a first interface to a component. The first interface may receive one of a read of updated data from, and a write of...
8433555 Processor emulation using fragment level translation  
Emulation of a target system with a host system is disclosed. Two or more target system code instructions may be grouped into one or more fragments. A main translation function may be implemented...
8429375 Memory management unit (MMU) to make only one time programmable (OTP) memory appear multiple times programmable (MTP)  
Memory management units (MMUs) are disclosed. In one aspect, an MMU may have a first interface to a component. The first interface may receive one of a read of updated data from, and a write of...
8429324 Bus-protocol converting device and bus-protocol converting method  
A bus-protocol converting device includes: a command detecting unit that detects a command sent from an external-memory control device, connected to a primary bus, to a primary bus interface...
8423747 Copy equivalent protection using secure page flipping for software components within an execution environment  
Embodiments of copy equivalent protection using secure page flipping for software components within an execution environment are generally described herein. An embodiment includes the ability for...
8423682 Address space emulation  
Apparatus and systems, as well as methods and articles, may operate to detect an input/output access operation associated with a configuration memory address and a first memory address bit size....
8417915 Alias management within a virtually indexed and physically tagged cache memory  
A virtually indexed and physically tagged memory is described having a cache way size which can exceed the minimum page table size such that aliased virtual addresses VA within the cache way 12...
8417906 Method and system to locate a storage device  
A request is received from a client machine via a web interface for content presented on a web page. A globally unique identifier (GUID) that is associated with the user is accessed and a number...
8417896 Semiconductor memory system having a snapshot function  
In a semiconductor memory computer equipped with a flash memory, use of backed-up data is enabled. The semiconductor memory computer includes an address conversion table for detecting physical...
8417872 Write and merge methods in memory card systems for reducing the number of page copies  
A memory card system and related write method are disclosed. The method includes receiving a write request for a predetermined page; performing a write operation on a first log block that...
8417893 Memory mapping techniques  
Memory mapping techniques for non-volatile memory are disclosed where logical sectors are mapped into physical pages using data structures in volatile and non-volatile memory. In some...
8417733 Dynamic atomic bitsets  
Embodiments of the present invention provide techniques, including systems, methods, and computer readable medium, for dynamic atomic bitsets. A dynamic atomic bitset is a data structure that...
8417913 Superpage coalescing which supports read/write access to a new virtual superpage mapping during copying of physical pages  
A method of assigning virtual memory to physical memory in a data processing system allocates a set of contiguous physical memory pages for a new page mapping, instructs the memory controller to...
8417869 Hybrid storage apparatus and hybrid storage medium controller and addressing method thereof  
A hybrid storage apparatus including a non-volatile memory module, a hard disk module, and a hybrid storage medium controller is provided. The hybrid storage medium controller groups physical...
8417914 Memory address translation  
The present disclosure includes devices, systems, and methods for memory address translation. One or more embodiments include a memory array and a controller coupled to the array. The array...
8412911 System and method to invalidate obsolete address translations  
A system and method for invalidating obsolete virtual/real address to physical address translations may employ translation lookaside buffers to cache translations. TLB entries may be invalidated...
8407394 System and methods for memory expansion  
This document discusses, among other things, an example system and methods for memory expansion. An example embodiment includes detecting a memory command directed to a logical rand and a number...
8402209 Provisioning space in a data storage system  
Dynamic provisioning of available space in a data storage system without having to configure partitions at system startup is presented. A system table may be maintained with entries corresponding...
8402003 Performance monitoring mechanism for use in a pattern matching accelerator  
A pattern matching accelerator (PMA) for assisting software threads to find the presence and location of strings in an input data stream that match a given pattern. The patterns are defined using...
8402237 Presentation of a read-only clone LUN to a host device as a snapshot of a parent LUN  
A method, apparatus, and system of presentation of a read-only clone Logical Unit Number (LUN) to a host device as a snapshot of a parent LUN are disclosed. In one embodiment, a method includes...
8402248 Explicitly regioned memory organization in a network element  
A network element that includes multiple memory types and memory sizes translates a logical memory address into a physical memory address. A memory access request is received for a data structure...
8402235 Backup apparatus, backup method and backup program  
A backup apparatus has an address conversion table for storing, in correspondence with each other, a logical address and a physical address. The backup apparatus has a sequential data count...
8402243 Dynamically allocating number of bits per cell for memory locations of a non-volatile memory  
Systems and methods are provided for dynamically allocating a number of bits per cell to memory locations of a non-volatile memory (“NVM”) device. In some embodiments, a host may determine whether...
8402247 Remapping of data addresses for large capacity low-latency random read memory  
Described herein are method and apparatus for using an LLRRM device as a storage device in a storage system. At least three levels of data structures may be used to remap storage system addresses...
8397046 Method and apparatus for deploying virtual hard disk to storage system  
Exemplary embodiments of the invention provide a solution to deploy a virtual hard disk (VHD) to virtual device with maximizing capacity efficiency and data access performance by making the...
8397015 Memory controller, semiconductor recording device, and method for notifying the number of times of rewriting  
User data transferred from a host apparatus and a first information table 35 indicating correspondence between a logical address and a physical address are recorded in a first region of a flash...
8397049 TLB prefetching  
In an embodiment, a memory management unit (MMU) is configured to retain a block of data that includes multiple page table entries. The MMU is configured to check the block in response to TLB...
8397010 Convenient, flexible, and efficient management of memory space and bandwidth  
A device may receive a request to read data from or write data to a memory that includes a number of memory banks. The request may include an address. The device may perform a mapping operation on...
8392914 Method and apparatus for recognizing processes in GOS by VMM  
The present invention provides a method apparatus for recognizing a process in a guest operation system by a virtual machine monitor, and the method comprises: step 101 of recording by the virtual...
8392689 Address optimized buffer transfer requests  
In one embodiment, a data storage device comprises a buffer, a buffer manager, and a buffer client. The buffer client is configured to receive data to be stored in the buffer, to compute a...
8392672 Identifying unallocated memory segments  
A network device that includes a first memory to store packets in segments; a second memory to store pointers associated with the first memory; a third memory to store summary bits and allocation...
8392647 Solid state storage system for controlling reserved area flexibly and method for controlling the same  
A solid state storage system includes a flash memory area and a memory controller. The flash memory area includes memory blocks and replacement blocks configured to replace bad blocks occurring...