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7165156 |
Read-write snapshots
A chain of snapshots includes read-write snapshots descending from a read only snapshot. The read only snapshots presents a constant view of the data at the time the read only snapshot is created,...
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7162491 |
Data processing system, data processing method and computer program
The present invention is to provide a system capable of preventing an increase in load even if the amount of data increases. Upon receipt of a retrieval request, a main control part specifies, from...
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7159070 |
Methods and apparatus for caching a location index in a data storage system
One embodiment is a system for locating content on a storage system, in which the storage system provides a location hint to the host of where the data is physically stored, which the host can...
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7159096 |
Method and apparatus to perform memory management
A method and apparatus to perform memory management are described.
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7159158 |
System and method for reading data stored in a semiconductor device having multilevel memory cells
A semiconductor device has multilevel memory cells, each cell storing at least three levels of data each. The multilevel memory cells are arranged so as to correspond to a physical address space,...
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7159067 |
Information processing apparatus using index and TAG addresses for cache
In an information processing apparatus involving a cache accessed by INDEX and TAG addresses, accesses to the main memory include many accesses attributable to the local character of referencing...
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7155558 |
Providing access to a raw data storage unit in a computer system
A computer has access to a system-formatted data storage unit (DSU) containing a file system and to a raw DSU. A file within the file system constitutes a raw DSU mapping that facilitates access to...
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7154805 |
Storage device employing a flash memory
A semiconductor disk wherein a flash memory into which data is rewritten in block unit is employed as a storage medium, the semiconductor disk including a data memory in which file data are stored,...
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7155595 |
Method of controlling storage device controlling apparatus, and storage device controlling apparatus
A storage device controlling apparatus includes: a plurality of channel controllers having a circuit board on which are formed a file access processing section receiving requests to input and...
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7152147 |
Storage control system and storage control method
A computer system comprises a primary volume 22 P having a plurality of storage blocks P, and a differential volume 22 D having a plurality of storage blocks D. Differential data corresponding to...
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7149872 |
System and method for identifying TLB entries associated with a physical address of a specified range
A system and method for identifying a TLB entry having a physical address that is within a specified range are disclosed. The method includes obtaining a tentative TLB entry from a page table entry...
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7149874 |
Memory hub bypass circuit and method
A computer system and a method used to access data from a plurality of memory devices with a memory hub. The computer system includes a plurality of memory modules coupled to a memory hub...
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7149890 |
Initializing system memory
Systems and techniques described herein may include both memory mapped and non-memory mapped firmware. A memory region may be in communication with at least one of the memory mapped non-volatile...
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7146483 |
Memory system
A memory system includes a memory including a plurality of memory regions operating based on an identical principle; and an address conversion device for converting a logical address into a...
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7143399 |
Method and apparatus for prefetching memory pages during execution of a computer program
One embodiment of the present invention provides a system that facilitates prefetching memory pages for a computer program. The system operates by analyzing the computer program within a compiler...
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7139867 |
Partially-ordered cams used in ternary hierarchical address searching/sorting
An apparatus and method that utilizes partial ordering of ternary hierarchical addresses and their associated masks entries in both binary and ternary content addressable memories (CAMs) for...
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7139895 |
Multilevel semiconductor memory, write/read method thereto/therefrom and storage medium storing write/read program
A disclosed semiconductor memory device includes multilevel memory cells in which data in the cells is arranged according to a coding method that allows error correction. One disclosed device has...
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7135824 |
Systems and methods for controlling illumination sources
Provided are methods and systems for controlling the conversion of data inputs to a computer-based light system into lighting control signals. The methods and systems include facilities for...
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7130938 |
Method, system and program products for identifying communications adapters of a computing environment
An input/output subsystem of a computing environment is configured as a plurality of input/output subsystem images, each of which appears to a program as an independent input/output subsystem. An...
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7130968 |
Cache memory architecture and associated microprocessor design
A single memory element, which may consist of general purpose SRAM chips, is used to implement both tag and data cache memory functions, resulting in an efficient, low cost implementation of high...
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7130960 |
System and method for managing disk space in a thin-provisioned storage subsystem
A system and method for managing disk space in a thin-provisioned storage subsystem. If a number of free segments in a free segment pool at a storage subsystem is detected as below a desired...
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7127465 |
Memory-efficient metadata organization in a storage array
A metadata tree structure having a plurality of nodes (slabs), each node containing a MD table. Each of the MD tables has a plurality of entries. Each of the entries in the MD tables represents a...
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7124249 |
Method and apparatus for implementing a software cache
A method and apparatus for use in a computer system including a plurality of host computers including a root host computer and at least one child host computer. The root host computer exports at...
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7124273 |
Method and apparatus for translating guest physical addresses in a virtual machine environment
A method and an apparatus are used to efficiently translate memory addresses. The translation scheme yields a translated address, a memory type for the translated address, and a fault bit for the...
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7124253 |
Supporting directory-based cache coherence in an object-addressed memory hierarchy
One embodiment of the present invention provides a system that supports directory-based cache coherence in an object-addressed memory hierarchy in a computer system. During operation, the system...
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7123519 |
Storage device employing a flash memory
A semiconductor disk wherein a flash memory into which data is rewritten in block unit is employed as a storage medium, the semiconductor disk including a data memory in which file data are stored,...
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7124255 |
Message based inter-process for high volume data
An interprocess communications platform enables individual processes to request and exchange data in a shared memory space, mediated by a communications engine. Processes, such as applications or...
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7124274 |
Virtual to physical memory address mapping within a system having a secure domain and a non-secure domain
An apparatus for processing data, the apparatus comprising: a processor operable in a plurality of modes and either a secure domain or a non-secure domain including at least one secure mode being a...
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7124261 |
Access to bit values within data words stored in a memory
A data processing system 2 has a base data address region 24 and a bit-band data address region 28 . Memory accesses to the bit-band data address region 28 are converted into memory accesses...
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7120778 |
Option ROM virtualization
A method and system for virtualizing images. Multiple images are shadowed (i.e., copied) into portions of the physical address space of system memory. A mapping mechanism is effected to map all of...
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7120729 |
Automated wear leveling in non-volatile storage systems
Methods and apparatus for performing wear leveling in a non-volatile memory system are disclosed. Included is a method for performing wear leveling in a memory system that includes a first zone,...
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7120913 |
Processing execution apparatus having data reference limiting function
A processing execution apparatus has an update management program and a reference limiting program. The update management program manages whether or not A- to C-data update programs are performing...
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7120742 |
Storage system having a plurality of interfaces
A hybrid-type storage system having both SAN and NAS interfaces can be implemented by simple hardware capable of carrying out a SAN function independently of a NAS function and a NAS load. To be...
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7120651 |
Maintaining a shared cache that has partitions allocated among multiple nodes and a data-to-partition mapping
Various techniques are described for improving the performance of a multiple node system by allocating, in two or more nodes of the system, partitions of a shared cache. A mapping is established...
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7117309 |
Method of detecting sequential workloads to increase host read throughput
Exemplary systems and methods analyze cache data to detect a sequential workload to facilitate pre-fetching effectiveness. An exemplary address analysis module for sequential workload detection...
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RE39317 |
System for server obtaining terminal address via searching address table or via broadcasting to all terminals through exchange in response to terminal address interrogation request
A originating terminal sends an ATM address interrogation request to a server if the ATM address of another party's terminal is unknown at the time of communication. Upon receiving the ATM address...
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7117336 |
Computer system for managing storage areas in a plurality of storage devices
The present invention, in a computer system where multiple computers share multiple external storage devices, is to control the external storage devices of different control methods in a unified...
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7117338 |
Virtual memory address translation control by TLB purge monitoring
In a computer system, an architecture is disclosed for optimizing aspects of data movement operations by performing functions such as memory allocation and notification on hardware rather than...
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7117339 |
Apparatus to map virtual pages to disparate-sized, non-contiguous real pages
A data processing system includes at least one system processor, chipset core logic, main memory to store computer software and data including operating system software, and a graphics address...
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7114016 |
Page-aware descriptor management
A method and apparatus to provide network buffer descriptors grouped by memory page into page groups and access a list of the page groups to manage the allocation and de-allocation of the network...
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7114034 |
Caching of dynamic arrays
Systems and methods are provided for caching dynamic arrays. According to one aspect, a cache memory device is provided for caching dynamic arrays or dynamic overlays. According to one embodiment,...
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7114052 |
Semiconductor memory device, a sector-address conversion circuit, an address-conversion method, and operation method of the semiconductor memory device
The present invention aims at providing a semiconductor memory device that can be operational in a desired boot block mode, regardless of the original boot block type of the device, by facilitating...
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7114051 |
Method for partitioning memory mass storage device
A method for partitioning a memory mass storage device is disclosed. The partition task is performed by the controller within the memory mass storage device. Firstly, the controller partitions the...
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7110321 |
Multi-bank integrated circuit memory devices having high-speed memory access timing
Integrated circuit memory devices support write and read burst modes of operation with uniformly short interconnect paths that provide high-speed memory access timing characteristics. These memory...
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7111147 |
Location-independent RAID group virtual block management
A technique maps the capacity of storage devices, such as disks, into any RAID group of a volume of a storage system regardless of the location of the RAID group within a volume block number (VBN)...
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7111145 |
TLB miss fault handler and method for accessing multiple page tables
A virtual memory system implementing the invention provides concurrent access to translations for virtual addresses from multiple address spaces. One embodiment of the invention is implemented in a...
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7111140 |
Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices
In one embodiment of the present invention, a memory storage system for storing information organized in sectors within a nonvolatile memory bank is disclosed. The memory bank is defined by sector...
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7108605 |
EPROM file system in a gaming apparatus
A gaming apparatus is provided comprising a display unit that is capable of generating video images, a value input device, and a controller operatively coupled to said display unit and said value...
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7111133 |
Control apparatus for selectively operating with program data from two memories and having a system controller supplying program data and address for writing the data to the second memory
In a control apparatus for operating with program data, it is possible to alter the operation of a control circuit by rewriting the data of the program memory built in an LSI, with ease and at a...
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7107430 |
Mechanism to reduce the cost of forwarding pointer aliasing
Short-quasi-unique-identifiers (SQUIDs) are generated and assigned to the data objects stored in memory. Pointers to a particular data object contain the data object's assigned SQUID. If a data...
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