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7366856 |
Method and system to locate a storage device
A system, to locate at least two storage devices from among a plurality of storage devices, receives a request for the data item. The request includes a data identifier for the data item. Next, the...
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7363465 |
Semiconductor device, microcomputer, and electronic equipment
A semiconductor device comprising a bus master and a bus slave connected by a second bus is provided. A bus control unit (BCU) comprises a first relative address control circuit that performs a...
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7363460 |
Semiconductor memory device having tag block for reducing initialization time
A memory device includes a cell area having N+1 unit cell blocks. Each cell block includes M word lines. The N unit cell blocks are each corresponded to a logical cell block address. The one...
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7363459 |
System and method of optimizing memory usage with data lifetimes
A method of storing data includes the steps of storing data comprising the steps of identifying respective lifetimes of each member of an indexed collection of data elements, each of the data...
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7363491 |
Resource management in security enhanced processors
A processor divides resources into secure resources and non-secure resources. Virtual-to-physical address translation page tables may be stored in either secure or non-secure memory.
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7360054 |
Method and apparatus for direct conveyance of physical addresses from user level code to peripheral devices in virtual memory systems
A memory system and a set of user-level instructions that are callable from user-level code for converting virtual addresses to physical addresses and conveying the physical addresses to peripheral...
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7360055 |
Two address map for transactions between an X-bit processor and a Y-bit wide memory
Presented herein are systems and methods for two address map for transactions between an X-bit processor and a Y-bit wide memory. A processor subsystem comprises a first address space, a second...
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7360058 |
System and method for generating effective address
Method, system and computer program product for generating effective addresses in a data processing system. A method, in a data processing system, for generating an effective address includes...
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7356662 |
Compressed file system for non-volatile RAM
Methods and arrangements are provided that significantly reduce or otherwise minimize the amount of NVRAM required within a given computing device. For example, a novel data structure and...
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7356347 |
Efficient discovery of devices in a bluetooth environment
A method and system whereby an initiator device discovers the user-friendly name of another device in a wireless network of devices, such as a Bluetooth network. Initially, the initiator device...
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7356665 |
Method and system for machine memory power and availability management in a processing system supporting multiple virtual machines
A method and system for machine memory power and availability management in a processing system supporting multiple virtual machines provides a mechanism for supporting memory power management and...
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7356456 |
Computer storage exception handing apparatus and method for virtual hardware system
In a design system using virtual hardware models, a filtering manager for filtering execution results and determining which software instructions are candidates for restructuring. In some examples,...
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7355909 |
Column redundancy reuse in memory devices
A method for column redundancy re-use includes arranging the memory array into a plurality of addressable first array columns and a plurality of addressable second array columns. The column...
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7356646 |
Memory card using NAND flash memory and its operating method
A memory card is connected to a host using a NAND flash memory interface mode. In addition, the memory card further includes the NAND flash memory as well as a controller. The NAND flash memory...
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7356026 |
Node translation and protection in a clustered multiprocessor system
A method of node translation for communicating over virtual channels in a clustered multiprocessor system using connection descriptors (CDs), which specify the endpoint nodes for virtual...
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7356666 |
Local memory management system with plural processors
An information processing system includes a first processor having a first local memory, a second processor having a second local memory, and a third processor having a third local memory. The...
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7356667 |
Method and apparatus for performing address translation in a computer system
An address translation unit is provided for use in a computer system. The unit contains a set of page table entries for mapping from a virtual address to a packet address. Each page table entry...
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7353324 |
Semiconductor storage device and method of controlling the same
A semiconductor storage device includes a first nonvolatile memory to store user data of a file, a second nonvolatile memory to store management data of the file, the second nonvolatile memory...
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7353336 |
External RAID-enabling cache
Systems, methodologies, media, and other embodiments associated with RAID-enabling caches in multi-cell systems are described. One exemplary system embodiment includes a cell(s) configured with a...
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7353340 |
Multiple independent coherence planes for maintaining coherency
In one embodiment, a node comprises at least one processor core and a plurality of coherence units. The processor core is configured to generate an address to access a memory location. The address...
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7353318 |
Apparatus and method to assign addresses to plurality of information storage devices
A method is disclosed to assign addresses to a plurality of data storage devices. The method provides a switch and (N) data storage devices, where each of those (N) data storage devices is...
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7350016 |
High speed DRAM cache architecture
A high speed DRAM cache architecture. One disclosed embodiment includes a multiplexed bus interface to interface with a multiplexed bus. A cache control circuit drives a row address portion of an...
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7349348 |
Method and apparatus for determining a network topology in the presence of network address translation
The present invention may be used for determining a topology of a network in the presence of network address translation. From an active client behind a translating device, communications are...
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7350085 |
Tamper resistant software-mass data encoding
Mass data (the contents of arrays, large data structures, linked data structures and similar data structures stored in memory) are common targets for attack. The invention presents a method and...
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7350017 |
Magnetic disk unit, file management system, and file management method
A file management system including a hard disk unit and a file management unit. The file management unit manages data to be read and written from and into the hard disk unit such that data in a...
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7350051 |
Method to optimize effective page number to real page number translation path from page table entries match resumption of execution stream
A method, system and computer program product for optimizing EPN to RPN translation when a data miss occurs. The method, system and computer program product take advantage of the high-likelihood of...
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7350049 |
Method and apparatus for managing access to a file allocation table
Techniques for managing access to a file allocation table in an external storage device are disclosed. According to one aspect of the techniques, an accelerated apparatus, as an interface, is...
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7349942 |
Storage medium having a manageable file directory structure
A file-mapping method and system can better manage the number of items (i.e., files, subdirectories, or a combination of them) within any single directory within a storage medium. The method and...
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7346756 |
System, computer readable medium and method for multi-tiered data access
A system, computer readable medium, and method for multi-tiered data access. The method includes the steps of determining a first search parameter and a second search parameter in response to an...
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7346755 |
Memory quality assurance
An example memory quality assuring system is provided. The system may include a memory mapping logic configured to facilitate accessing memory locations and redirecting memory accessing operations....
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7343469 |
Remapping I/O device addresses into high memory using GART
An address translation apparatus and method that can convert a limited-range memory address from a peripheral device to an expanded-range memory address on the fly. The invention can expand the...
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7343432 |
Message based global distributed locks with automatic expiration for indicating that said locks is expired
Described is a distributed lock processing technique that may be used to coordinate access to globally accessed resource between endpoints using the connecting message fabric. Processors in a data...
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7343465 |
Storage system
Use a storage system having a first data storage unit. The first data storage unit has a temporary storage area which is prepared in advance for the purpose of being provided to a host computer....
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7339591 |
Method to manage graphics address remap table (GART) translations in a secure system
intercepted in order to determine if the modification will result in an aperture memory address mapping to a region of trusted memory. If it is determined that the GART modification will not result...
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7340582 |
Fault processing for direct memory access address translation
An embodiment of the present invention is a technique to process faults in a direct memory access address translation. A register set stores global control or status information for fault...
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7340581 |
Method of writing data to non-volatile memory
According to a first aspect of the invention, there is provided a controller connected to a non-volatile memory and including a volatile memory, wherein the controller maintains lists in volatile...
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7337331 |
Distributive storage controller and method
An inexpensive data storage technique utilizing available capacity in individual computer devices connected to a network is provided. When a backup client (BC) ( 14 ) of a user PC receives a backup...
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7337300 |
Procedure for processing a virtual address for programming a DMA controller and associated system on a chip
A method is provided for processing a virtual address for a program requesting a DMA transfer. The program is designed to be run in user mode on a system on a chip that includes a central...
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7334106 |
Storage system
In a storage system having a plurality of virtualization apparatuses that allocate a storage area which a storage device has, form a plurality of virtual volumes, and process input-output from a...
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7330959 |
Use of MTRR and page attribute table to support multiple byte order formats in a computer system
Computer technology supports multiple byte order formats, separately or simultaneously. In one embodiment, a page attribute table (PAT), which is programmable, is utilized to indicate byte order...
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7328325 |
System and method for hierarchical storage mapping
A mapping tool for hierarchical storage mapping may include a storage hierarchy representation interface, a command interface and remapping software. The storage hierarchy representation interface...
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7321962 |
Technique for translating a hybrid virtual volume file system into a pure virtual file system data stream
A method for transferring data of a hybrid virtual volume of a computer data storage system from a source to a destination is disclosed. The method first translates intermingled virtual and...
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7318141 |
Methods and systems to control virtual machines
Methods and systems are provided to control the execution of a virtual machine (VM). A VM Monitor (VMM) accesses VM Control Structures (VMCS) indirectly through access instructions passed to a...
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7318114 |
System and method for dynamic memory interleaving and de-interleaving
In one embodiment, a system includes a plurality of memory controllers each coupled between a processor and a respective memory. Each memory controller includes a plurality of decoders. Each...
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7315931 |
Method for managing an external memory of a microprocessor
A method for managing an external memory of a microprocessor so that the external memory only contains one copy of a common area. By providing an address translator, mapping the page and the...
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7313667 |
Methods and apparatus for mapping fields of entries into new values and combining these mapped values into mapped entries for use in lookup operations such as for packet processing
Fields of entries are mapped into new values with these mapped values combined into mapped entries for use in lookup operations typically for packet processing. One implementation identifies a list...
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7313610 |
Method and array for determining internet protocol addresses of a terminal array
The invention relates to a method and an array for determining the IP addresses of a terminal array connected to an IP network by means of a telecommunication network. A pseudo-hardware address is...
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7310698 |
Method and apparatus for extending memory addressing
Techniques for extending memory addressing with more accessing range are disclosed. According to one aspect of the techniques, an apparatus for extending addressing space comprises a plurality of...
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7308598 |
Algorithm to encode and compress array redundancy data
A method, an apparatus and a computer program product are provided for the compression of array redundancy data. Array redundancy data can be lengthy and take up a lot of space on a processor. This...
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7308526 |
Memory controller module having independent memory controllers for different memory types
A memory controller module that includes a memory interface and at least two memory controllers, each memory controller to control a category of memory devices. A circuitry enables the at least two...
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