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8804423 Multi-bit-per-cell flash memory device with non-bijective mapping  
To store a plurality of input bits, the bits are mapped to a corresponding programmed state of one or more memory cells and the cell(s) is/are programmed to that corresponding programmed state....
8804752 Method and system for temporary data unit storage on infiniband host channel adaptor  
A method for temporary storage of data units including receiving a first data unit to store in a hardware linked list queue on a communications adapter, reading a first index value from the first...
8806116 Memory modules for two-dimensional main memory  
In one embodiment of the invention, a memory module is disclosed including a printed circuit board with an edge connector; an address controller coupled to the printed circuit board; and a...
8799559 Endurance enhancement coding of compressible data in flash memories  
Methods described in the present disclosure may be based on a direct transformation of original data to “shaped” data. In a particular example, a method comprises generating a first portion of...
8799553 Memory controller mapping on-the-fly  
Systems, methods, and devices for dynamically mapping and remapping memory when a portion of memory is activated or deactivated are provided. In accordance with an embodiment, an electronic device...
8798085 Techniques to process network protocol units  
Techniques are described herein that can be used to process inbound network protocol units. In some implementations, the techniques may process inbound DDP segments. In some implementations, a...
8799618 Service associated with persistent storage  
Examples are disclosed for allocating a block of persistent storage or accessing a block of persistent storage based on a storage service string that includes a universally unique identifier and...
8799620 Linear to physical address translation with support for page attributes  
Embodiments of the invention are generally directed to systems, methods, and apparatuses for linear to physical address translation with support for page attributes. In some embodiments, a system...
8793429 Solid-state drive with reduced power up time  
A non-volatile storage system is provided with reduced delays associated with loading and updating a logical-to-physical mapping table from non-volatile memory. The mapping table is stored in a...
8793468 Translation map simplification  
A method for translation map simplification may include determining a translation map based on a predetermined criterion in response to receiving input data. The method may also include...
8788749 Implementing enhanced deterministic memory allocation for indirection tables for persistent media  
A method and a storage system are provided for implementing deterministic memory allocation for indirection tables for persistent media or disk drives, such as, shingled perpendicular magnetic...
8788787 Systems, methods and architecture for facilitating software access to acceleration technology  
Systems and methods allow access between a software application residing within a processor module and an accelerator module having an accelerator address space distinct from the processor address...
8787101 Stacked device remapping and repair  
Various embodiments include apparatus, systems, and methods having multiple dice arranged in a stack in which a defective cell may be replaced by a spare cell on the same die or a different die....
8782360 Preserving an existing volume map in re-initializing a data storage volume  
A method, system and computer-program product for re-initializing a storage volume with an previously created volume map being preserved to allow access to previously stored data sets. The...
8782344 Systems and methods for managing cache admission  
A cache layer leverages a logical address space and storage metadata of a storage layer (e.g., storage layer) to cache data of a backing store. The cache layer maintains access metadata to track...
8782325 Data type based alignment of data written to non-volatile memory  
The present disclosure includes systems and techniques relating to data type based alignment of data written to non-volatile memory. In some implementations, an apparatus includes an input, an...
8775776 Hash table using hash table banks  
A hash table method and structure comprises a processor that receives a plurality of access requests for access to a storage device. The processor performs a plurality of hash processes on the...
8775772 Method and apparatus for performing enhanced read and write operations in a FLASH memory system  
Methods and apparatus for enhanced READ and WRITE operations in a FLASH-based solid state storage system that includes a logical to physical translation table where the logical to physical...
8769241 Virtualization of non-volatile memory and hard disk drive as a single logical drive  
Systems and techniques relating to storage technologies are described. A described technique includes operating drives such as a solid state drive (SSD) and a disk drive, where the SSD and the...
8769242 Translation map simplification  
A method for translation map simplification may include determining a translation map based on a predetermined criterion in response to receiving input data. The method may also include...
8769239 Re-mapping memory transactions  
Systems and methods for re-mapping memory transactions are described. In an embodiment, a method includes receiving a memory request from a hardware subsystem to a memory, replacing a first...
8769240 Integrated circuit and semiconductor memory device using the same  
An integrated circuit includes a random address generation unit configured to generate a first random address for a data randomizing operation, an address conversion unit configured to convert the...
8762682 Data storage apparatus providing host full duplex operations using half duplex storage devices  
A data storage apparatus includes a command processor that receives write commands and data blocks from a host, the write commands comprising block ID's (BID) corresponding to data blocks; storage...
8762683 Device and method for memory addressing  
An addressing device and method is provided to enable an electronic system having a less addressing capability to address a memory device having a larger storage space, thereby reducing the...
8756375 Non-volatile cache  
Apparatuses, systems, and methods are disclosed for caching data. A method includes directly mapping a logical address of a backing store to a logical address of a non-volatile cache. A method...
8756396 Conversion of in-memory data representations  
Systems, methods, and other embodiments associated with managing memory are described. According to one embodiment, an apparatus includes a converter that dynamically converts a structure of a...
8756399 Mutable association of a set of logical block addresses to a band of physical storage blocks  
Method and apparatus for mutably associating logical block addresses to physical blocks. A physical storage space is apportioned into one or more bands. A logical block address (LBA) from a...
8756373 Virtualized data storage in a network computing environment  
Methods and systems for load balancing read/write requests of a virtualized storage system. In one embodiment, a storage system includes a plurality of physical storage devices and a storage...
8756387 Method and apparatus for optimizing the performance of a storage system  
Methods and apparatuses for optimizing the performance of a storage system comprise a FLASH storage system, a hard drive storage system, and a storage controller. The storage controller is adapted...
8756400 ***WITHDRAWN PATENT AS PER THE LATEST USPTO WITHDRAWN LIST***
Memory address translation
 
The present disclosure includes devices, systems, and methods for memory address translation. One or more embodiments include a memory array and a controller coupled to the array. The array...
8751734 Semiconductor memory card access apparatus, a computer-readable recording medium, an initialization method, and a semiconductor memory card  
A predetermined number of erasable blocks positioned at a start of a volume area in a semiconductor memory card are provided so as to include volume management information. A user area following...
8751769 Efficient address generation for pruned interleavers and de-interleavers  
Techniques for efficiently generating addresses for pruned interleavers and pruned de-interleavers are described. In an aspect, a linear address may be mapped to an interleaved address for a...
8751736 Instructions to set and read memory version information  
Systems and methods for providing additional instructions for supporting efficient memory corruption detection in a processor. A physical memory may be a DRAM with a spare bank of memory reserved...
8751770 Semiconductor recording apparatus and semiconductor recording system  
A semiconductor recording apparatus includes a logical-to-physical conversion table 115 showing correspondence between a physical address of said semiconductor memory and a logical address and...
8745317 System and method for storing information in a multi-level cell memory  
A method comprising: obtaining a value of source data; encoding the value of source data using an encoding process, to thereby obtain an encoded value; calculating a difference value based on the...
8745319 Flash memory based storage devices utilizing magnetoresistive random access memory (MRAM) to store control information facilitating wear leveling  
A flash memory based storage device may utilize magnetoresistive random access memory (MRAM) as at least one of a device memory, a buffer, or high write volume storage. In some embodiments, a...
8745353 Block boundary resolution for mismatched logical and physical block sizes  
The present disclosure describes various techniques resolving block boundary issues and reconstructing logical blocks in a block access storage device when there are resulting mismatches between...
8745349 Consolidating control areas  
A detection module selects logically adjacent first and second control areas of a cluster. The detection module further determines that the first and second control areas satisfy a migration test...
8745331 Technique for improving replication persistance in a caching applicance structure  
A method for improving replication persistence in a caching appliance structure can begin when a primary catalog service receives a command to instantiate a data partition. The primary catalog...
8745351 Initializing file data blocks  
A method and system is provided for initializing files such as, for example and without limitation, pre-allocated files or raw device mapping (RDM) files, by delaying initializing file blocks. In...
8745330 Technique for improving replication persistance in a caching applicance structure  
A method for improving replication persistence in a caching appliance structure can begin when a primary catalog service receives a command to instantiate a data partition. The primary catalog...
8745323 System and method for controller independent faulty memory replacement  
In accordance with the present disclosure, a system and method for controller independent faulty memory replacement is described. The system includes a system memory component with a system memory...
8738884 Efficient loading of data into memory of a computing system  
Machines, systems and methods for deploying one or more virtual machines on a host computing system, the method comprising: receiving mapping information from a data storage system, wherein the...
8738887 Dynamic fix-up of global variables during system BIOS execution  
A method is described for preserving the flexibility associated with relative memory addressing in programs designed to be stored in read-only memory.
8737156 Mapping between two buses using serial addressing bits  
A solution is provided to flexibly choose a combination of flash memory devices to reduce the overall cost of the flash memory devices or increase the overall utilization of the flash memory...
8738889 Generating multiple address space identifiers per virtual machine to switch between protected micro-contexts  
Embodiments of an invention for generating multiple address space identifiers per virtual machine to switch between protected micro-contexts are disclosed. In one embodiment, a method includes...
8738888 Memory control device, memory device, and memory control method  
The memory control device according to the present invention includes a command generating unit which divides the memory access request issued by the master into access commands each of which is...
8738886 Memory mapping in a processor having multiple programmable units  
A processor is disclosed that can map a request from a central processing unit that uses memory-mapped input-output space to a second processing domain, such as a multithreaded processing domain....
8730660 Remote attachable flash drive  
A sticky drive includes a flash storage device and a mounting structure having a stickable surface. The mounting structure is coupled to the flash storage device to enable a user to attach the...
8732702 File system for storage area network  
Methods and apparatus are disclosed for managing access to data in a data storage system. For example, an apparatus comprises at least one processing platform associated with a distributed virtual...