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7051182 |
Mapping of hosts to logical storage units and data storage ports in a data processing system
An apparatus has host ports for coupling hosts to data storage devices. The data storage devices are configured into logical storage units, and the apparatus is programmed with a mapping of the...
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7051177 |
Method for measuring memory latency in a hierarchical memory system
A method for determining the latency for a particular level of memory within a hierarchical memory system is disclosed. A performance monitor counter is allocated to count the number of loads (load...
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7046574 |
Memory system
A memory system having a semiconductor storage device divided into plural areas, in which information becomes accessible by specifying an absolute physical address, and a control section for...
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7047390 |
Method, system, and program for managing a relationship between one target volume and one source volume
Provided are a method, system, and program for managing a relationship between one target volume and one source volume. For each of the source volume and target volume, the memory includes: (i) at...
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7043622 |
Method and apparatus for handling storage requests
Systems and methods for handling I/O requests from a host system to a storage system. A system includes an I/O module for processing I/O requests from a host system, a virtualized storage element,...
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7039908 |
Unification-based points-to-analysis using multilevel typing
Location types in unification-based, flow-insensitive “points-to” analyses represent three kinds of sets of abstract memory locations in a three-level subtyping system. The data constructor for...
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7039775 |
Non-volatile storage device and rewrite control method thereof
A non-volatile storage device ( 1 ), such as a flash memory, that may include a plurality of sectors and additional sectors has been disclosed. Sectors may include a physical sector number. A...
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7035995 |
Method and apparatus for performing a high speed binary search in time critical environments
A hardware assisted searching mechanism is provided that offloads the processor from searching operations. In a preferred embodiment, the hardware assisted searching mechanism performs a binary...
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7036126 |
Method and an apparatus for logical volume manager plug-ins
A mechanism is provided by which a logical volume manager may allow features to be added and modified without having to modify the logical volume manager code. The present invention provides an...
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7035968 |
Content addressable memory with range compare function
A content addressable memory (CAM) device having a range compare function. A boundary value is stored within a plurality of CAM cells within the CAM device. A range compare operation is performed...
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7036122 |
Device virtualization and assignment of interconnect devices
A method for assigning a device to a first virtual machine includes connecting the device, directly or indirectly, to a computer through an interconnect. The first virtual machine and a second...
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7035212 |
Method and apparatus for end to end forwarding architecture
An end to end forwarding architecture includes a memory hub having a first ingress interface for receiving packets from a source port. The packets have associated ingress flow identifiers. A second...
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7032105 |
Method and apparatus for using a dynamic random access memory in substitution of a hard disk drive
A method and a related apparatus for using a dynamic random access memory (DRAM) in substitution of a hard disk drive in a computer system. The computer system has a request format transformation...
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7032221 |
Mapping a stack in a stack machine environment
The stack mapper of the present invention seeks to determine the shape of the stack at a given program counter. This is accomplished by locating all start points possible for a given method, that...
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7028158 |
Storage virtualization engine
A method and system for dynamic file allocation is disclosed. In the system, an input device receives a data object which is sent to an allocation device. The allocation device is comprised of a...
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7028148 |
Program executing device and method for executing programs
A program executing device that can execute two programs produced using the same source program is disclosed. The program executing device 1 is generally composed from a processor (CPU) 2 , a...
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7024536 |
Translation look-aside buffer for improving performance and reducing power consumption of a memory and memory management method using the same
A translation look-aside buffer (TLB) capable of reducing power consumption and improving performance of a memory is provided. The fully-associative TLB which converts a virtual address into a...
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7024452 |
Method and system for file-system based caching
A method and system for file-system based caching can be used to improve efficiency and security at network sites. In one set of embodiments, the delivery of content and storing content...
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7024544 |
Apparatus and method for accessing registers in a processor
The present invention is generally directed to an apparatus and method for accessing registers within a processor. In accordance with one embodiment, an apparatus and method are provided for a...
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7020718 |
System and method of aggregating discontiguous address ranges into addresses and masks using a plurality of repeating address blocks
A method of creating a discontiguous address plan for an enterprise is provided which includes determining a hierarchy of routing optimization for an enterprise, determining a number of route...
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7020760 |
Hybrid logical block virtualization system for a storage area network
A method and structure for a system for managing logical blocks of storage is disclosed. An out-of-band mapping unit is adapted to process data requests from a host. The mapping unit includes a...
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7020761 |
Blocking processing restrictions based on page indices
Processing restrictions of a computing environment are filtered and blocked, in certain circumstances, such that processing continues despite the restrictions. One restriction includes an...
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7020759 |
Device and method for associating information concerning memory cells of a memory with an external memory
In a device and a method associating information concerning first memory cells and second memory cells of a memory element with an external memory, with each address of the memory element having a...
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7017024 |
Data processing system having no system memory
A data processing system having no system memory is disclosed. The data processing system includes multiple processing units. The processing units have volatile cache memories operating in a...
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7016981 |
Switching apparatus and method for increasing the total number of addressable electronic devices beyond limits imposed by device address sizes
A switching apparatus provides an address extension for an environment, such as I 2 C, that uses devices with a limited address configurability. The switching apparatus provides connection between...
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7013369 |
Memory control circuit outputting contents of a control register
A memory control circuit includes a control register having a memory capacity of m bits or smaller for setting information necessary for controlling the memory, input pins to which m-bit test data...
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7013376 |
Method and system for data block sparing in a solid-state storage device
A method and system for enhancing the reliability of a solid-state storage device based on electronic memory. The electronic memory is organized into low-address and high-address spare table...
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7013362 |
Systems and methods for addressing memory
An addressing circuit includes a first set of inputs configured to receive a first set of address signals en route from the set of processors to the memory and defining a least significant address...
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7013377 |
Method and apparatus for alleviating register window size constraints
A method and apparatus provides the capability for a single function to safely use multiple register windows within the same function, with minimal additional support from the operating system, by...
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7010656 |
Method and apparatus for memory management
In some embodiments, an electronic device includes a processor, a physical memory coupled to the processor, and a storage medium coupled to the processor. The storage medium may store instructions...
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7007126 |
Accessing a primary bus messaging unit from a secondary bus through a PCI bridge
An I/O subsystem having a processor, a bridge unit, and an I/O messaging unit that couple a primary, secondary and tertiary bus in a computer system. The bridge unit is configurable to claim...
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7007152 |
Volume translation apparatus and method
A volume translation apparatus and method are provided. The volume translation apparatus resides between host machines and the physical storage devices accessed by the host machines. This volume...
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7007151 |
System, device, and method for controlling access to a memory
In a system, device, and method for controlling access to a memory, a memory interface device is used to coordinate access to a memory device by a number of host applications. The memory interface...
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7003586 |
Arrangement for implementing kernel bypass for access by user mode consumer processes to a channel adapter based on virtual address mapping
A consumer resource provider is configured for generating a work request to a prescribed virtual destination address on behalf of a user-mode consumer process requiring a memory access. An...
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7003647 |
Method, apparatus and computer program product for dynamically minimizing translation lookaside buffer entries across contiguous memory
A method, apparatus and computer program product are provided for dynamically minimizing translation lookaside buffer (TLB) entries across contiguous memory. A page table with page table entries...
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7000089 |
Address assignment to transaction for serialization
The assignment of an address to a transaction for serialization purposes is disclosed. A simulated address is assigned to a transaction of a first type. The simulated address may be determined by...
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6996669 |
Cluster-based cache memory allocation
The present invention relates to a disk drive including a cache memory having a plurality of sequentially-ordered memory clusters for caching disk data stored in sectors (not shown) on disks of a...
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6996101 |
Re-mapping and interleaving transport packets of multiple transport streams for processing by a single transport demultiplexor
Method, system and computer products are provided for re-mapping and interleaving transport packets of multiple transport streams for processing by a single transport demultiplexor. The re-mapping...
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6996663 |
Method and apparatus for performing address translation using a CAM
A technique for performing address translation that requires less logic and programming than conventional address translation techniques is described. The technique uses a CAM to perform address...
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6993627 |
Data storage system and a method of storing data including a multi-level cache
A data storage system ( 100 ) and a method of storing data are described including a cache ( 118 ) with a variable number of levels ( 210, 220, 230, 240 ). Each level in the cache ( 118 ) has a...
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6993622 |
Bit level programming interface in a content addressable memory
An apparatus and method for generating a comparand in a content addressable memory array. The apparatus includes a content addressable memory (CAM) array and translation circuitry to receive...
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6990565 |
Address conversion apparatus, address conversion method and computer program
An address output apparatus capable of retaining a pre-extension upper compatibility of software post memory extension and of accessing separated RAM areas by consecutive addresses, without needing...
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6988179 |
Method, system, and program for ordering of physical extents
Disclosed is a method, system, and program for ordering data. Portions of a logical volume are matched with portions of one or more physical extents. The one or more physical extents are ordered...
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6988165 |
System and method for intelligent write management of disk pages in cache checkpoint operations
A system and method are disclosed for improving the efficiency of write operations by intelligently managing disk pages that are written during checkpoint operations so that write operations can...
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6985992 |
Wear-leveling in non-volatile storage systems
Methods and apparatus for performing wear leveling in a non-volatile memory system are disclosed. According to one aspect of the present invention, a method for allocating non-volatile memory that...
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6986015 |
Fast path caching
Described are techniques used in a computer system for handling data operations to storage devices. A switching fabric includes one or more fast paths for handling lightweight, common data...
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6981122 |
Method and system for providing a contiguous memory address space
A memory system and a method for operating a memory system are provided. The memory system includes a set of memory banks, logic for calculating a first address in each memory bank from the set of...
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6981120 |
Method and apparatus for virtual memory segmentation
Memory and processing required for managing virtual memory segments is reduced by overloading the existing page table entries in a virtual memory page table to encode virtual memory segmentation...
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6977927 |
Method and system of allocating storage resources in a storage area network
A system for allocating storage resources in a storage area network is described. A logical unit number (LUN) mapper receives at least one storage request parameter and maps the storage request...
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6977657 |
Addressing a cache
A data processing system has main memory and one or more caches. Data from main memory is cached while mitigating the effects of address pattern dependency. Main memory physical addresses are...
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