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8316211 Generating multiple address space identifiers per virtual machine to switch between protected micro-contexts  
Embodiments of an invention for generating multiple address space identifiers per virtual machine to switch between protected micro-contexts are disclosed. In one embodiment, an apparatus includes...
8312053 Dynamic atomic arrays  
Embodiments of the present invention provide techniques, including systems, methods, and computer readable medium, for dynamic atomic arrays. A dynamic atomic array is a data structure that...
8312462 Reducing remote memory accesses to shared data in a multi-nodal computer system  
Disclosed is an apparatus, method, and program product for identifying and grouping threads that have interdependent data access needs. The preferred embodiment of the present invention utilizes...
8312248 Methods and apparatus for reallocating addressable spaces within memory devices  
Integrated circuit systems include a non-volatile memory device (e.g, flash EEPROM device) and a memory processing circuit. The memory processing circuit is electrically coupled to the...
8312243 Memory management in network processors  
System and method for storing information units is provided. The system includes a memory comprising a plurality of contiguous memory segments, a local memory storing a plurality of pointers, each...
8312245 Memory block management  
One or more embodiments comprise control circuitry coupled to one or more memory devices having a number of planes of physical blocks organized into super blocks. The control circuitry can be...
8312208 Memory access controller and method implementing packet processing  
A memory access controller is disclosed. A packet memory stores a packet and has a clock parallel outputting function of parallel-outputting first data and a clock. A read controller reads the...
8307183 Recording/reproducing method, recording/reproducing apparatus and information storage medium  
A recording and/or reproducing method, a recording and/or reproducing apparatus, and an information storage medium are provided. The method of recording data to an information storage medium...
8307191 Page fault handling in a virtualized computer system  
The invention relates to page fault handling in a virtualized computer system in which at least one guest page table maps virtual addresses to guest physical addresses, some of which are backed by...
8307190 Memory control device, memory device, and memory control method  
The memory control device according to the present invention includes a command generating unit which divides the memory access request issued by the master into access commands each of which is...
8301861 Startup reconstruction of logical-to-physical address translation data for solid state disks  
Described embodiments provide reconstruction of logical-to-physical address mapping data for one or more sectors of a storage device at startup of a media controller. The sectors of the storage...
8301826 Adaptive mode switching of flash memory address mapping based on host usage characteristics  
In a non-volatile memory storage system such as a flash EEPROM system, a controller switches the manner in which data sectors are mapped into blocks and metablocks of the memory in response to...
8301865 System and method to manage address translation requests  
A system and method for servicing translation lookaside buffer (TLB) misses may manage separate input and output pipelines within a memory management unit. A pending request queue (PRQ) in the...
8301872 Pipeline configuration protocol and configuration unit communication  
An example method of controlling a data processing system having a cellular structure. The method includes transmitting a first configuration word to a first processing unit in the cellular...
8301863 Recursive logical partition real memory map  
A recursive logical partition real memory map mechanism is provided for use in address translation. The mechanism, which is provided in a data processing system, receives a first address based on...
8296513 Standby disk spin up control in disk array system using expander device  
A method and system are provided for controlling SAS/SATA disk spin up when a disk enters an inactive mode, such as standby mode, in a near line storage system. A routing table entry is modified...
8296503 Data updating and recovering methods for a non-volatile memory array  
Methods for updating and recovering user data of a non-volatile memory array such as a flash memory are disclosed. An indication for indicating a mapping relationship for a logical address is...
8289958 Using a clearinghouse to determine caller location for VoIP calls  
A clearinghouse is used to determine caller location for VoIP calls. The clearinghouse maintains (i) a first correlation between a first IP address and a first ISP and (ii) a second correlation...
8291194 Methods of utilizing address mapping table to manage data access of storage medium without physically accessing storage medium and related storage controllers thereof  
A method of managing data access of a storage medium includes establishing an address mapping table to record a physical address of a first data stored in the storage medium, where the physical...
8291150 Table device, variable length coding apparatus, variable length decoding apparatus, and variable length coding and decoding apparatus  
A table device includes a match cell number output unit 25 for outputting a match cell number showing a cell PE which outputs a matching signal, and an address decoder 26 for specifying a node...
8291155 Data access method, memory controller and memory storage system  
A data access method for accessing a non-volatile memory module is provided. The data access method includes configuring a plurality of logical addresses and grouping the logical addresses into...
8291193 Address translation apparatus which is capable of easily performing address translation and processor system  
An address translation apparatus includes first to third retention units, a comparison unit, and a translation unit. The first retention unit retains a multi-bit first address. The second...
8285968 Performing memory accesses while omitting unnecessary address translations  
In computing environments that use virtual addresses (or other indirectly usable addresses) to access memory, the virtual addresses are translated to absolute addresses (or other directly usable...
8285967 Method for on-demand block map generation for direct mapped LUN  
This invention is a system and a method for operating a storage server in a data network using a new architecture. The method of creating the partial block map allows the snapshot writes on a...
8285970 Method for managing a memory apparatus, and associated memory apparatus thereof  
A method for managing a memory apparatus including at least one non-volatile (NV) memory element includes: providing at least one block of the memory apparatus with at least one local page address...
8275598 Software table walk during test verification of a simulated densely threaded network on a chip  
A computer-implemented method, system and computer program product are presented for managing an Effective-to-Real Address Table (ERAT) and a Translation Lookaside Buffer (TLB) during test...
8271711 Program status detecting apparatus and method  
A method for a computer including a processor that is capable of counting invalidation of translation lookaside buffers and generating an interrupt at the occurrence of the invalidation, the...
8271762 Mapping management methods and systems  
Mapping management methods and systems are provided. First, a sub-read command comprising mapping directory number, block offset and page offset is obtained. Then, a specific block mapping table...
8271763 Unified addressing and instructions for accessing parallel memory spaces  
One embodiment of the present invention sets forth a technique for unifying the addressing of multiple distinct parallel memory spaces into a single address space for a thread. A unified memory...
8271725 Method and apparatus for providing a host-independent name to identify a meta-device that represents a logical unit number  
A method and apparatus for providing a host-independent name to identify a meta-device that represents a Logical Unit Number (LUN) is described. In one embodiment, the method comprises processing...
8271745 Memory controller for non-homogeneous memory system  
A memory controller includes at least one interface adapted to be coupled to one or more first memory devices of a first memory type having a first set of attributes, and to one or more second...
8271801 Implementing data confidentiality and integrity of shingled written data  
A method, apparatus and a data storage device are provided for implementing data confidentiality and integrity of data stored in overlapping, shingled data tracks on a recordable surface of a...
8266409 Configurable cache and method to configure same  
In a particular embodiment, a cache is disclosed that includes a tag state array that includes a tag area addressable by a set index. The tag state array also includes a state area addressable by...
8266238 Memory mapped network access  
The present disclosure relates to memory access, and specifically to memory access utilizing internet protocol (IP) addressing semantics. Various embodiments, methods, apparatus and systems are...
8266365 Ruggedized memory device  
A non-volatile storage device with built-in ruggedized features is disclosed. The device processes a write command to a logical block address by writing the data from the command to a non-volatile...
8259339 Image forming apparatus  
An image forming apparatus includes a memory that stores therein a control program, a central processing unit that executes the control program stored in the memory, a print engine controlled by...
8255663 System and method for processing read request  
A system for processing a read request for maximizing host read performance in a flash memory-based storage device is provided. The system for processing the read request solves a bottleneck...
8255530 Traffic management in digital signal processor  
Network traffic is manages using a digital signal processing integrated circuit (DSP). The DSP performs one or more of the following functions on the incoming network traffic: classification,...
8255613 Wear-leveling and bad block management of limited lifetime memory devices  
Performing wear-leveling and bad block management of limited lifetime memory devices. A method for performing wear-leveling in a memory includes receiving logical memory addresses and applying a...
8255661 Data storage system comprising a mapping bridge for aligning host block size with physical block size of a data storage device  
A data storage system is disclosed comprising a non-volatile memory and a first interface operable to receive a write command from a host, the write command comprising a host write data block...
8255611 Methods and apparatus for accessing content  
One embodiment of the invention relates to the transfer of content between a host computer that issues OAS access requests and a block I/O storage system. Specifically, a host computer may issue...
8255664 Methods and apparatus for address translation functions  
Techniques are described for efficient reordering of data and performing data exchanges within a register tile or memory, or in general, any device storing data that is accessible through a set of...
8255650 Systems and methods for making incremental physical to virtual backups of computer system data  
Systems and methods are provided for capturing a complete baseline image of the operating environment of a host computer system on an external storage device and for generating incremental backups...
8255656 Storage device, memory controller, and data protection method  
A storage device, a memory controller, and a data protection method are provided. The method includes when receiving a read command sent by a host, adopting a corresponding output flow rate limit...
8250334 Providing metadata in a translation lookaside buffer (TLB)  
In one embodiment, the present invention includes a translation lookaside buffer (TLB) to store entries each having a translation portion to store a virtual address (VA)-to-physical address (PA)...
8250324 Method to efficiently locate meta-data structures on a flash-based storage device  
A method for facilitating fast reconstruction of metadata structures on a memory storage device includes writing a plurality of checkpoints holding a root of metadata structures in an increasing...
8250331 Operating system virtual memory management for hardware transactional memory  
Operating system virtual memory management for hardware transactional memory. A method may be performed in a computing environment where an application running on a first hardware thread has been...
8250330 Memory controller having tables mapping memory addresses to memory modules  
A memory controller includes ports and corresponding tables. Each port is receptive to one or more memory modules. Each table includes entries mapping memory addresses to the memory modules. Each...
8250326 Data swapping in a storage system  
Systems and methods for data swapping in a storage network are provided. The method comprises associating a flag with a first track on a first volume (TA1) and a first track on a second volume...
8245011 Method and system for geometry-based virtual memory management in a tiled virtual memory  
Methods and systems are provided for geometry-based virtual memory management. The methods and systems use Boolean space algebra operations to manage allocation and deallocation of tiled virtual...