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7610426 |
System management mode code modifications to increase computer system security
Methods for processing more securely. Embodiments provide effective and efficient mechanisms for reducing APIC interference with accesses to SMRAM, where enhanced SMM code implementing these...
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7603536 |
Data processing apparatus and image reading apparatus
A data processing apparatus includes a data processing section that issues a plurality of data transfer requests simultaneously; an internal memory provided inside a circuit including the data...
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7587535 |
Data transfer control device including endian conversion circuit with data realignment
When data is transferred to an access destination in a different endian format, a transfer start address is aligned based on a transfer bus width, and a transfer size is adjusted according to the...
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7583732 |
Managing bursts of data
Bursts of data are managed. Data is stored in a machine readable memory device a first time at a first memory address. The machine readable memory device has one or more burst boundaries. The first...
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7577854 |
Information storage device having a divided area in memory area
An information storage apparatus capable of setting the number and sizes of partitioned areas resulting from partitioning a memory area based on a user's intention is provided. For this purpose, an...
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7564727 |
Apparatus and method for configurable power management
A method and apparatus to facilitate low-power consumption through a configurable suspend mode of operation of a PLD, the PLD comprising an application logic block coupled to receive configuration...
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7546451 |
Continuously providing instructions to a programmable device
A system and method for enabling a programmable device to execute instructions without interruption. An instruction space for storing instructions from a host application is bifurcated to define a...
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7543293 |
Privelege level changing for virtual memory mapping
Described is a system and method whereby processes may have multiple memory maps associated therewith to provide curtained memory and overcome other memory-related problems. Multiple maps are used...
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7536498 |
Method and apparatus for address mapping
A method and apparatus for address mapping are provided, wherein the method sets a first address region that is accessible by a processor when a system is booted and a second address region that is...
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7523252 |
Data control apparatus functioning as a USB mass storage device
A data control apparatus has a user interface section, an operation control section which operates based on an instruction from the user interface section, a USB device interface section which is...
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7467275 |
Capacity expansion volume migration method
A common external storage device is connected to the first and second storage systems. The management computer comprises a capacity expansion volume migration section that migrates a...
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7464248 |
Microprocessor systems and bus address translation methods
A microprocessor system contains a read-only memory (ROM) for storing programs or firmware. Retrieval and execution of program code is controlled by a microprocessor address bus. Erroneous data in...
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7461196 |
Computer system having an expansion device for virtualizing a migration source logical unit
A migration destination storage creates an expansion device for virtualizing a migration source logical unit. A host computer accesses an external volume by way of an access path of a migration...
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7412585 |
Method for controlling disk drive using an address translation table
Embodiments of the invention achieve data write in an appending manner by conversion from a logical block address to a physical block address in a HDD that has only one storage device and does not...
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7409477 |
Memory card having a processor coupled between host interface and second interface wherein internal storage code provides a generic interface between host interface and processor
A memory card comprising a first modular component that comprises a first interface and first conductors and a data mover that comprises second conductors coupled to the first conductors. The first...
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7404060 |
Apparatus, program, and method for managing usage of memory
A memory management apparatus suitable for reducing amount of memory usage and simplifying programs is provided. When an area allocation request has been inputted, an unused area having a size that...
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7401202 |
Memory addressing
Addressing memory includes receiving a first operand to a memory addressing operator, receiving a second operand to the memory addressing operator, performing sign extension on the first operand to...
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7401178 |
Expanded memory space in environments including virtual machines
Accessing data comprises executing a set of computer instructions in a first environment, wherein the first environment has limited addressing capability to address memory up to a size limit,...
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7395380 |
Selective snooping by snoop masters to locate updated data
A method and structure for snooping cache memories of several snooping masters connected to a bus macro, wherein each non-originating snooping master has cache memory, and wherein some, but less...
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7389097 |
Receiver, transceiver circuit, signal transmission method, and signal transmission system
A receiver has an offset application circuit for applying a known offset to an input signal, and a decision circuit for comparing the offset-applied input signal with a reference voltage. The level...
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7386650 |
Memory test circuit with data expander
A memory test circuit receives test pattern data from a processing unit having a first data width, expands the test pattern to a second data width greater than the first data width, and writes the...
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7386596 |
High performance storage access environment
The present invention provides improved techniques for managing storage resources, such as disk drives, I/O ports, and the like in a network based storage system according to a user position within...
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7383416 |
Method for setting a second rank address from a first rank address in a memory module
A method for setting an address of a rank in a memory module having a number of memory chips distributed along a byte lane includes setting the first memory chip of the byte lane to have a first...
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7383365 |
Method and system for PCI express audiovisual output
Audio and visual information processing components are co-located on a PCI Express graphics card by communicating audio and visual information received through the PCI Express interface of the...
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7380095 |
System and method for simulating real-mode memory access with access to extended memory
In some embodiments, the invention involves a system and method relating to switching to protected mode to access extended memory while executing instruction code that is designed for real mode...
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7376782 |
Index/data register pair for indirect register access
A computer system provides a program access to a first register during real mode operation by using an index register and a data register, wherein the index register and the data register are...
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7366797 |
Data storage system with shared cache address space
An apparatus for a node of a peer-to-peer network having a plurality of nodes comprises one or more I/O adapters; a cache component; one or more inter-node routing components; a memory mapping...
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7355739 |
Image forming device having a memory assignment unit
An image forming device includes an operating system to execute any of a plurality of programs. The image forming device comprises a rewritable memory which has a virtual memory area managed by the...
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7353221 |
Method for the automatic retrieval of engineering data of systems
The invention relates to a method for the automatic retrieval of engineering data from installations. The engineering and runtime objects are described by a uniform object model. This allows the...
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7340583 |
Method and apparatus of controlling memory device
An address decoder 10 decodes an address signal 20 to generate access signals 22, 24 . An OR circuit implements a logical OR of the signals 22, 24 to generate a chip enable signal. An...
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7328301 |
Dynamically mapping block-alterable memories
In one embodiment, the present invention includes a method for reassigning a first address of a block-alterable memory to a second address of the block-alterable memory, where the second address...
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7315931 |
Method for managing an external memory of a microprocessor
A method for managing an external memory of a microprocessor so that the external memory only contains one copy of a common area. By providing an address translator, mapping the page and the...
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7310698 |
Method and apparatus for extending memory addressing
Techniques for extending memory addressing with more accessing range are disclosed. According to one aspect of the techniques, an apparatus for extending addressing space comprises a plurality of...
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7293130 |
Method and system for a multi-level memory
A method and system is provided for a multi-level memory. The system includes an internal memory and an external memory. Data packets are received through one or more input ports and initially...
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7290078 |
Serial memory comprising means for protecting an extended memory array during a write operation
The present invention relates to a memory on a silicon microchip, having a serial input/output, an integrated memory array addressable under N bits, and at least one register that is read...
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7275199 |
Method and apparatus for a modified parity check
A method, an apparatus, and a computer program are provided for sequentially determining parity of stored data. Because of the inherent instabilities that exist in most memory arrays, data...
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7260669 |
Semiconductor integrated circuits
When a peripheral LSI has a memory space which is other than the memory space of a CPU, access is made without one of the memory spaces being aware of the other memory spaces. A flexible bus...
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7240147 |
Memory decoder and data bus for burst page read
Memory device is described that utilizes a reduced number of sense amplifiers to sense the data bits of a selected column page. The sense amplifiers are multiplexed and the read data values...
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7231638 |
Memory sharing in a distributed data processing system using modified address space to create extended address space for copying data
A method is provided for sharing and/or transporting data within a single node of a multi-node data processing. The method avoids the necessity of making more than one copy of the data to be shared...
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7213098 |
Computer system and method providing a memory buffer for use with native and platform-independent software code
The present invention relates to computer systems and methods for providing a memory buffer for use with native and platform-independent software code. In a particular embodiment, the method...
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7210002 |
System and method for operating dual bank read-while-write flash
The disclosed embodiments provide for a system and method for storing data in a flash memory device that has a code bank and a data bank. The method includes writing data to the data bank under...
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7203784 |
Recording medium holder having one or more recording mediums
A recording medium holder enables a user to easily find a desired recording medium from recording mediums that the user manages. The recording medium holder includes a recording medium holding unit...
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7191296 |
Data writing apparatus, data writing method, and program
Each of a plurality of storage devices (N−1 to N-n) has a plurality of memory blocks for storing data. A data writing apparatus obtains error information which represents good blocks which can...
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7191255 |
Transaction layer link down handling for PCI express
Transaction layer link down handling for Peripheral Component Interconnect (PCI) Express. A link between an input/output (I/O) controller port of an I/O controller and a device port of a device is...
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7178002 |
Methods and systems for dynamically growing multiple stacks
An allocation instructions and an extension instructions allow a program to continue to execute even when the program requires more stack space than has been allocated to the program. The methods...
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7162581 |
Deferred tuple space programming of expansion modules
The present invention permits deferring the final provisioning of the Card Information Structure (CIS) in the attribute memory space of expansion cards (or modules) for portable hosts. This enables...
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7149862 |
Access control in a data processing apparatus
A data processing apparatus and method are provided for controlling access to a slave device, the slave device having an address range associated therewith. The apparatus comprises control storage...
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7149857 |
Out of order DRAM sequencer
Memory access requests are successively received in a memory request queue of a memory controller. Any conflicts or potential delays between temporally proximate requests that would occur if the...
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7142541 |
Determining routing information for an information packet in accordance with a destination address and a device address
According to some embodiments, routing information for an information packet is determined in accordance with a destination address and a device address.
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7126873 |
Method and system for expanding flash storage device capacity
Through the use of an allocation logic unit with a Flash controller, a single primary chip enable is de-multiplexed into a multiple secondary chip enables for multiple Flash memory dies or chips....
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