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6643731 |
Low cost memory management that resists power interruption
A system and method for reliably managing a Flash ROM memory resource while preserving the integrity of the data held in the memory in spite of power outages that can occur during memory...
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6643748 |
Programmatic masking of storage units
A system and method are described to programmatically manage access between one or more nodes and a plurality of associated devices, such as shared storage units. Each node is programmed to include...
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6636906 |
Apparatus and method for ensuring forward progress in coherent I/O systems
A snapshot mechanism that includes an apparatus and method for tracking DMA read requests for cacheable data that can be altered before the data is returned to a requesting I/O device is herein...
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6633807 |
Enhanced module chipping system
A memory system for limiting access of a protected portion of a memory to a predetermined accessing device. The memory system includes a memory having a protected portion. The system further...
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6633962 |
Method, system, program, and data structures for restricting host access to a storage space
A method, system, program, and data structure for restricting host access to at least one logical device. Each logical device comprises a section of physical storage space that is non-overlapping...
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6633964 |
Method and system using a virtual lock for boot block flash
A method and system using a virtual lock for boot block flash are disclosed in which code from a boot block of a flash memory is executed. The boot block is hardware protected. One or more...
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6631453 |
Secure data storage device
A data storage/transmission hardware device (or multiple devices physically linked together) with two (or more) access channels is disclosed. One of the access channels allows for reading and...
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6629217 |
Method and apparatus for improving read latency for processor to system memory read transactions
A method and apparatus for improving read latency for processor to system memory read transactions is disclosed. One embodiment of a system logic device includes logic that assumes a transfer size...
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6629197 |
Method and system for storing digital audio data and emulating multiple CD-changer units
A method for processing digital audio data is presented. A control signal for a CD-changer unit is received and interpreted by a digital audio unit that stores digital audio data/files and that...
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6629220 |
Method and apparatus for dynamic arbitration between a first queue and a second queue based on a high priority transaction type
Dynamic arbitration based on a high priority transaction type. A first memory access request is received at a first request queue. If the first memory access request is of a first type, the...
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6629207 |
Method for loading instructions or data into a locked way of a cache memory
Methods of operating an instruction cache memory in a data processing system are disclosed. The data processing system executes instructions and stores and receives data from a memory having...
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6625700 |
Arbitration and select logic for accessing a shared memory
A technique for arbitrating and selecting one access request to a shared memory from among multiple contenders is disclosed. In a first aspect, the invention includes a method for accessing a...
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6625672 |
Divided buffer
The present invention relates to a buffer device of the first-in-first-out type. The buffer device comprises a data inlet, a data outlet and a storage buffer. The buffer device also comprises an...
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6625701 |
Extended cache coherency protocol with a modified store instruction lock release indicator
A multiprocessor data processing system requires careful management to maintain cache coherency. Conventional systems using a MESI approach sacrifice some performance with inefficient...
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6622223 |
Information recording and reproduction apparatus, information recording and reproduction method and information signal source
An information recording and reproduction apparatus comprises a recording and reproduction section for recording to, or reproducing from, an information medium, an information signal, a recording...
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6618796 |
Data storage device and control method therefor
There is provided a data storage device which reads data from and/or writes data to a memory medium, comprising: an acquisition unit for acquiring management information which is recorded by a...
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6615322 |
Two-stage request protocol for accessing remote memory data in a NUMA data processing system
A non-uniform memory access (NUMA) computer system includes a remote node coupled by a node interconnect to a home node having a home system memory. The remote node includes a local interconnect, a...
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6615324 |
Embedded microprocessor multi-level security system in flash memory
An embedded microprocessor two level security system in flash memory. The memory includes an address input and a memory space of addressable locations having a restricted area and a user area....
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6615330 |
Virtual worm method and system
A system and method of storing data using write once read many (WORM) protection including using a hardware storage device to write data to a medium are provided. The method further includes...
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6611904 |
Memory access address comparison
A memory system comprises a memory array having a plurality of memory locations; a plurality of write ports for writing to the memory array; write protection circuitry for preventing more than one...
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6609178 |
Selective validation for queued multimodal locking services
A queued, multimodal, self-validating lock mechanism selectively associates supplemental validation procedures with certain lock modes. Only those lock modes which heavily drain system resources...
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6604153 |
Access protection from unauthorized use of memory medium with storage of identifier unique to memory medium in data storage device
It is provided a data storage device which reads data from and/or writes data to a memory medium, comprising: a storage unit for storing a first identifier; an identifier acquisition unit for...
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6598135 |
System and method for defining rewriteable data storage media as write once data storage media
A system and method for defining rewriteable data storage media defined by ECMA Standard ECMA-272 2 nd edition (1999) for 120 mm DVD rewriteable disk (DVD-RAM) as a write once data storage media...
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6594747 |
Processing apparatus with integrated circuit and integrated circuit package
The present invention relates to a processing apparatus and the like including an internal circuit having a CPU executing a program and an internal memory storing an internal program, and an...
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6594740 |
Recording/reproducing device and recording/reproducing method
Index data is automatically formed with respect to music data recorded on a recording medium. In the index data, statuses showing states of the music data such as reproducible data, data which was...
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6591340 |
Microprocessor having improved memory management unit and cache memory
Methods of widening the permission for a memory access in a data processing system having a virtual cache memory and a translation lookaside buffer are disclosed. A memory access operation is...
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6587932 |
Processor and system for controlling shared access to a memory
Several peripheral entities, each of which is clocked by its own internal clock signal, can access a memory that is a single-access memory. A priority entity is defined from among the peripheral...
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6584552 |
Recording/reproducing apparatus, program recorded medium, recorded medium, cache device, and transmitter
A recording and reproducing apparatus is characterized in that said apparatus has: inputting means for receiving a packet data which is based on IEEE 1394, and in which signal information for...
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6578122 |
Using an access key to protect and point to regions in windows for infiniband
A method, system and program for controlling access to computer memory are provided. The present invention comprises receiving a work request from a user, wherein the work request comprises an...
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6578132 |
Semiconductor storage device and program authenticity determining system
The invention prevents execution of unauthorized copies of programs. In one example embodiment, a semiconductor storage device includes a program ROM. A calculator of an address processing unit...
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6574721 |
Apparatus and method for providing simultaneous local and global addressing using software to distinguish between local and global addresses
An apparatus and method provide simultaneous local and global addressing capabilities in a computer system. A global address space is defined that may be accessed by all processes. In addition,...
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6574703 |
Initializing selected extents of a storage device
A system and method for initializing large portions, or extents, of a mass-storage device in the background so that such overwriting processes do not significantly affect latency as experienced by...
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6574749 |
Reliable distributed shared memory
In implementing a reliable distributed shared memory, a weak consistency model is modified to ensure that all vital data structures are properly replicated at all times. Write notices and their...
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6571351 |
Tightly coupled secondary storage system and file system
A fault tolerant, secondary storage engine (such as a RAID engine) is closely coupled with a file system to achieve greater overall throughput in storage/database applications having a mix of...
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6567289 |
Physical memory layout with various sized memory sectors
The physical layout of a semiconductor memory device having memory sectors of varying sizes can be arranged such that the larger and smaller memory sectors are addressed by x-decoders and...
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6567897 |
Virtualized NVRAM access methods to provide NVRAM CHRP regions for logical partitions through hypervisor system calls
A method, system, and computer program product for enforcing logical partitioning of a shared device to which multiple partitions within a data processing system have access is provided. In one...
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6564300 |
Method and system for controlling the memory access operation by central processing unit in a computer system
A memory access control method and system is provided for use on a computer system to control the memory access operation by a central processing unit (CPU) to a memory unit in a more efficient...
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6560675 |
Method for controlling concurrent cache replace and return across an asynchronous interface
The present invention provides a method and a computer system that compares a portion of a signal and information transferred from a cache memory, while the information is in transit from the cache...
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6553466 |
Shared memory blocking method and system
A shared memory blocking method and particularly applicable to a system in which protected data is transmitted to a recipient computer. The method comprises reserving a memory page for a requesting...
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6553471 |
Controlling access to a storage device by controlling communication ports thereto
Controlling access to a storage device includes defining a plurality of groups that access the storage device, defining a plurality of pools of devices of the storage device, and, for at least one...
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6542919 |
Operating system for use with protection domains in a single address space
An operating system that provides protection domain support is arranged so to be compatible with “well behaved” threads, i.e., threads that obtain all their memory allocations from the...
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6542960 |
System and method for parity caching based on stripe locking in raid data storage
A system and method for updating parity based upon locking and unlocking of a storage stripe in a redundant array of independent disk (RAID) implementation is provided. The stripe includes a parity...
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6532533 |
Input/output system with mask register bit control of memory mapped access to individual input/output pins
A processing device ( 10 ) provides general-purpose input/output pins ( 52 ) for use by software routines as needed. A data input register ( 54 ) has bits corresponding to each pin ( 52 ) for...
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6532524 |
Port prioritization scheme
An apparatus comprising a first compare circuit, a second compare circuit and a memory. The first compare circuit may be configured to present a first match signal in response to a first address...
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6530005 |
Circuit arrangement and method for creating and retrieving patch data from memory
The invention relates to a circuit arrangement and to a method for creating and retrieving replacement data. The circuit arrangement has a programmed ROM, which is coupled to a patch-memory module...
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6526485 |
Apparatus and method for bad address handling
Circuitry including a request queue and a bad address handling circuit. The request queue includes an entry for each outstanding load requesting access to a cache. Each request queue entry includes...
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6526488 |
Computer systems
There is disclosed a method and apparatus for controlling access to and corruption of information in a computer system. In known “PC Virus” protection methods the boot partition becomes “Read...
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6526490 |
Data processing systems with process monitor
A processing system has a processor with a memory map identifying locations in a memory where data are stored, data associated with an application being stored at the same location every time an...
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6525557 |
Method for watermarking a register-based programmable logic device core
A core for a register-based programmable logic device includes a register configured to provide a hidden identifier in response to a secret unlock operation. The identifier is inaccessible during...
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6523096 |
Apparatus for and method of accessing a storage region across a network
N_Port_Name information capable of distinctly identifying a host computer has seen set in a microprocessor 42 of a storage controller 40 prior to start-up of host computers 10, 20, 30; upon...
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