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7290078 Serial memory comprising means for protecting an extended memory array during a write operation  
The present invention relates to a memory on a silicon microchip, having a serial input/output, an integrated memory array addressable under N bits, and at least one register that is read...
7287104 Interface circuit for card-type memory, ASIC including interface circuit, and image forming apparatus including ASIC  
An interface circuit reads data for a few sectors from a card-type memory and stores the data in a buffer. When a receiving unit receives a read-access from an image forming apparatus, a data...
7287118 Maintaining an average erase count in a non-volatile storage system  
Methods and apparatus for maintaining an average erase count in a system memory of a non-volatile memory system are disclosed. According to one aspect of the present invention, a method for...
7287133 Systems and methods for providing a modification history for a location within a data store  
A storage management device can receive a request for a modification history for a location within a data store, determine one or more times at which at least a portion of data stored at the...
7287116 Storage virtualization system and method having a virtualization switch  
In a virtualization system, physical volumes are virtualized between servers and storage systems such that even when high-performance functions including a remote copy are provided, a...
7284101 Reliable file system and method of providing the same  
A reliable file system method and system are provided. The reliable file system substantially ensures that an on-media state of a file system is maintained while another working-media state of the...
7284085 Managing configuration data in a flash configuration space in flash memory within a host interface port  
A flash configuration space is disclosed for storing configuration data regions. Each configuration data region includes configuration data and a signature tag that identifies the configuration...
7284100 Invalidating storage, clearing buffer entries, and an instruction therefor  
Selected units of storage, such as segments of storage or regions of storage, are invalidated. The invalidation is facilitated by the setting of invalidation indicators located in data structure...
7281044 SAN infrastructure on demand service system  
The present invention provides improved techniques for managing storage resources, such as disk drives, I/O ports, and the like according to user demand for these storage resources. In a specific...
7281097 Method of controlling the performance of a data storage system  
A method for optimizing the operation of a data storage system utilizes a genetic algorithm to adjust internal parameters of the system. The method involves determining a set of optimum values of...
7281240 Mechanism for lossless, lock-free buffer switching in an arbitrary-context tracing framework  
A method for tracing on a processor including executing an executing control block on the processor to obtain data, wherein an interrupt on the processor is disabled prior to executing the...
7281098 Computer system for remote copy  
Provided is a computer system capable of maintaining consistency of data stored in logical volumes. The computer system includes: a storage system including a disk controller which controls data...
7281115 Method, system and program product for clearing selected storage translation buffer entries  
An instruction is provided to perform clearing of selected address translation buffer entries (TLB entries) associated with a particular address space, such as segments of storage or regions of...
7275140 Flash memory management method that is resistant to data corruption by power loss  
The present invention includes a method of managing page-based data storage media such as flash media, a system that uses the method, and a computer-readable storage medium bearing code for...
7275127 Multi-application transponder circuit and memory management method for the same  
There is disclosed a multi-application transponder circuit for a contactless electronic identification and/or access system including, in particular, a non-volatile memory ( 18 ) having a segmented...
7269700 Status bus accessing only available quadrants during loop mode operation in a multi-queue first-in first-out memory system  
A flag logic circuit is provided for use in a multi-queue memory device having a plurality of queues. A first stage memory stores a flag value for each of the queues in the multi-queue memory...
7269687 Bounding defective regions of a tape storage medium  
Systems and methods for storing data on a tape medium and coping with defective regions on the tape medium are provided. The method includes: writing a plurality of envelopes of data onto the tape...
7266026 Symbol frequency leveling in a storage system  
Methods and apparatus for transforming data into a format which may be efficiently stored in a non-volatile memory are disclosed. According to one aspect of the present invention, a method for...
7260677 Programmable system and method for accessing a shared memory  
A memory control system and method is disclosed. In one embodiment, a first memory is coupled to one or more additional memories. The first memory receives requests for data that are completed by...
7257668 Method and system for enhancing the endurance of memory cells  
An integrated circuit device includes a plurality of non-volatile memory cells associated with a plurality of flag cells storing managing data. The managing data of the flag cells forms a data set....
7257687 Synchronization of active flag and status bus flags in a multi-queue first-in first-out memory system  
A flag logic circuit includes a first comparator configured to generate a first flag value associated with an active read queue of a multi-queue memory device, and a second comparator configured to...
7254681 Cache victim sector tag buffer  
A method of operating a sub-sector cache includes receiving a request for a first sub-sector of a first cache line. The method further includes identifying a first replaced line in a cache data...
7254669 Create virtual track buffers in NVS using customer segments to maintain newly written data across a power loss  
A method for storing customer data at a non-volatile storage (NVS) at a storage server. A track buffer is maintained for identifying first and second sets of segments that are allocated in the NVS....
7249230 Queue structure with validity vector and order array  
According to some embodiments, a queue structure includes a validity vector and an order array.
7240154 Low cost flexible network accessed storage architecture  
A storage solution includes a first enclosure having modules and non-volatile memory, such as hard disk drives. These modules convert file I/O to block I/O. A second enclosure includes second...
7237070 Cache memory, processing unit, data processing system and method for assuming a selected invalid coherency state based upon a request source  
At a first cache memory affiliated with a first processor core, an exclusive memory access operation is received via an interconnect fabric coupling the first cache memory to second and third cache...
7237074 Tracking cells for a memory system  
Tracking cells are used in a memory system to improve the read process. The tracking cells can provide an indication of the quality of the data and can be used as part of a data recovery operation...
7231501 Method for avoiding aliased tokens during abnormal communications  
A data initiator device designates an initial data tag set for tagging data transfers to thereby attach data tags from the designated set to commands directed to data transfers between the data...
7225302 Method and software application for avoiding data loss  
A method consistent with the present invention avoids data loss in a data object replication process. The method includes: creating an electronic data element comprising a first field having an...
7224604 Method of achieving wear leveling in flash memory using relative grades  
For each block of a memory, a number is calculated that is a function of how many times the block has been erased and of how many times at least one other block has been erased. The numbers are...
7225297 Compressed cache lines incorporating embedded prefetch history data  
An apparatus and method utilize compressed cache lines that incorporate embedded prefetch history data associated with such cache lines. In particular, by compressing at least a portion of the data...
7225256 Impersonation in an access system  
The present invention pertains to a system for managing network access to resources that allows a first entity to impersonate a second entity. In one embodiment, the first entity can impersonate...
7218569 Memory circuit, and method for reading out data contained in the memory circuit using shared command signals  
The present invention relates to a memory circuit having a memory cell array for storing data, and having a command decoding circuit for receiving command signals, and having a setting memory for...
7219187 Search parameter table in a content addressable memory  
A content addressable memory device having a search parameter table.
7213120 Circuit for prevention of unintentional writing to a memory, and semiconductor device equipped with said circuit  
A circuit for prevention of unintentional writing to a memory prevents unintentional writing to a nonvolatile memory, after a recovery from a transitory power failure. The circuit includes a...
7213109 System and method for providing speculative ownership of cached data based on history tracking  
A system and method for managing memory data is provided. Data stored within a main memory may be requested by multiple requesters that may include one or more cache memories. When the data is...
7210010 Efficient system and method for updating a memory device  
A system and method for updating a binary image stored across a block-structured memory device, such as a flash memory device. From comparison of original and new images, an update package is...
7210009 Computer system employing a trusted execution environment including a memory controller configured to clear memory  
A computer system includes a processor which may initialize a secure execution mode by executing a security initialization instruction. Further, the processor may operate in the secure execution...
7206892 Method for managing recorded streams in a rewritable recording medium  
The present invention relates to a method for managing playlists of a rewritable recording medium in order to prevent unlimited playback or illegal edition of television broadcast programs or...
7206899 Method, system, and program for managing data transfer and construction  
Provided are a method, system, and program for constructing data including reconstructing data organized in a data organization type, such as a Redundant Array of Independent Disks (RAID)...
7206910 Delta object replication system and method for clustered system  
In a clustered processing system, replication logic controls replication of objects to one or more replica states. The replication logic determines differences between states of an object. The one...
7206893 Linking method under mother and child block architecture for building check area and logic page of the child block  
A method of reducing the frequency of erasing steps of a flash memory is described. A linking method under a mother and a child block architecture for building a check area and a logic page of the...
7206903 Method and apparatus for releasing memory locations during transactional execution  
One embodiment of the present invention provides a system for releasing a memory location from transactional program execution. The system operates by executing a sequence of instructions during...
7203804 Process, apparatus, and system for passing data between partitions in a storage device  
A process, apparatus, and system are disclosed that allow information to be passed between software modules in different partitions in an environment for a predetermined operating system (OS) and...
7203802 System and method for using a buffer to facilitate log catchup for online operations  
A memory buffer facilitates log catchup for online operations. Certain designated areas of memory are allocated for one or more buffers for use during online operations (e.g., reorganization,...
7200732 Method and apparatus of adding grant information to a memory  
A scrambling operation is used to space apart the grants that a communication circuit receives during a period of time, such as 512 arbitration periods. An operator can enter the number of...
7197601 Method, system and program product for invalidating a range of selected storage translation table entries  
Selected units of storage, such as segments of storage or regions of storage, may be invalidated. The invalidation is facilitated by the setting of invalidation indicators located in data structure...
7197612 Flexible queue and stream mapping systems and methods  
A system processes data corresponding to multiple data streams. The system includes multiple queues that store the data, stream-to-queue logic, dequeue logic, and queue-to-stream logic. Each of the...
7197605 Allocating cache lines  
Allocating cache lines includes incurring a cache write miss and, after incurring the cache write miss, writing data having a memory address to a cache line that does not include data at the memory...
7194589 Reducing disk IO by full-cache write-merging  
An electronic and computerized system that coalesces write operations using a buffer cache which stores data waiting to be written back to a disk of the electronic and computerized system is...