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6952757 |
Method, system, and program for managing storage units in storage pools
Provided are a method, system, and program for managing storage units. Storage pool information indicates an assignment of a plurality of storage units to a plurality of storage pools, wherein each...
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6952758 |
Method and system for providing consistent data modification information to clients in a storage system
A data storage system and method for providing consistent data to multiple clients based on data modification information as existing data is updated and new data is written to the system. The...
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6952754 |
Predecode apparatus, systems, and methods
An apparatus and a system may include a modal property indicator and an access module to receive the modal property indicator and to access a selected location based on a condition of the modal...
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6950887 |
Method and apparatus for gathering queue performance data
An apparatus for gathering queue performance data includes an event conditioning logic unit that receives a queue enter signal, a queue exit signal, and a queue not empty signal from a queue. The...
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6948041 |
Permanent memory block protection in a flash memory device
A secure command is entered into a Flash memory device. A control data word is written to the memory device to specify which blocks of memory are to be permanently secured against write and erase...
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6948026 |
Erase block management
An improved Flash memory device with a distributed erase block management (EBM) scheme is detailed that enhances operation and helps minimize write fatigue of the floating gate memory cells of the...
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6944714 |
Method and apparatus for saving microprocessor power when sequentially accessing the microprocessor's instruction cache
An embodiment of the invention provides a circuit and method for reducing power in multi-way set associative arrays. A control circuit detects when the next cache access will be taken from the same...
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6944717 |
Cache buffer control apparatus and method using counters to determine status of cache buffer memory cells for writing and reading data therefrom
Methods for controlling and storing data in a cache buffer in a storage apparatus having a nonvolatile memory medium are disclosed. Memory cells are logically divided into a plurality of pages. An...
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6944719 |
Scalable cache coherent distributed shared memory processing system
A packetized I/O link such as the HyperTransport protocol is adapted to transport memory coherency transactions over the link to support cache coherency in distributed shared memory systems. The...
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6944709 |
Content addressable memory with block-programmable mask write mode, word width and priority
A content addressable memory (CAM) device comprising a plurality of CAM blocks and a block control circuit. The plurality of CAM blocks each includes an array of CAM cells to store data words and...
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6941439 |
Computer system
An address translation server recognizes and stores a characteristic of a storage device which forms a memory area. The address translation server creates and issues a command to the storage device...
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6941413 |
Nonvolatile memory, its data updating method, and card reader equipped with such nonvolatile memory
A method for updating data in a nonvolatile memory is provided. The method comprises the steps of writing in a RAM data stored in a data writing region of the non-volatile memory, updating the data...
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6941427 |
Method and apparatus for improving queue traversal time
A method and apparatus for traversing a queue of commands through part or all of the queue by selecting only the commands that need to be reissued. Commands to be reissued are labeled or designated...
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6938132 |
Memory co-processor for a multi-tasking system
A co-processor (also called “memory co-processor”) provides an interface to a memory, by executing instructions on data held in the memory. The co-processor uses a specified address to fetch...
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6938140 |
System and method for linear object reallocation in place
A system and method for replacing an original linear object with an updated linear object. In a flash memory or other memory device storing groups of data objects, in replacing a linear object with...
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6938119 |
DRAM power management
A system and method for limiting power consumption of a computer memory system. The system and method includes selecting a memory access rate. The selected memory access rate corresponds to a...
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6938130 |
Method and apparatus for delaying interfering accesses from other threads during transactional program execution
One embodiment of the present invention provides a system that facilitates delaying interfering memory accesses from other threads during transactional execution. During transactional execution of...
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6931498 |
Status register architecture for flexible read-while-write device
A single status register, capable of providing status for simultaneous read-while-write operation on a flash memory array is described. The status of the memory array is reported to the user based...
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6928527 |
Look ahead methods and apparatus
A method for operating a memory device, the method comprising marking a portion of a memory device associated with a group of bits comprising at least one bit upon which an operation is to be...
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6928528 |
Guaranteed data synchronization
A method and apparatus for guaranteed data synchronization. In one embodiment, a data synchronization unit includes a memory unit, a write pointer unit, a read pointer unit, and synchronization...
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6928531 |
Linear and non-linear object management
A linear and non-linear object management method and structure. A data structure on a computer-readable medium is used to store linear and non-linear objects in a range of memory of a volume. The...
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6925540 |
Systems and methods for chassis identification
A identification system comprising at least one non-volatile memory device containing identification data, a communication bus for the memory device that is independent of any other system bus, and...
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6925521 |
Scheme for implementing breakpoints for on-chip ROM code patching
The present invention relates to a system and a method for preventing address conflicts when establishing breakpoints and applying one or more patches to code residing on a read only memory (ROM)...
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6925485 |
Proxy cache preloader
The present invention is directed to a proxy cache preloader. According to an embodiment of the present invention, a Hyper Text Transfer Protocol (HTTP) client intermediary having a proxy cache is...
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6925546 |
Memory pool configuration system
A memory partitioning system for memory of an embedded or auxiliary processor is described. Memory regions with different attributes are formed, having specified cacheability and visibility...
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6922757 |
Flexible and adaptive read and write storage system architecture
A distributed shared file system (DSFS) comprising a network file system (NFS) capable of receiving at least a request from at least a client, a distributed cache, a metadata storage containing...
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6922770 |
Memory controller providing dynamic arbitration of memory commands
Embodiments of the present invention provide a memory controller comprising a front-end module, a back-end module communicatively coupled to the front-end module, and a physical interface module...
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6918015 |
Scalable directory based cache coherence protocol
A system and method is disclosed to maintain the coherence of shared data in cache and memory contained in the nodes of a multiprocessing computer system. The distributed multiprocessing computer...
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6918005 |
Method and apparatus for caching free memory cell pointers
A method and apparatus are provided for caching free cell pointers pointing to memory buffers configured to store data traffic of network connections. In one example, the method stores free cell...
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6915392 |
Optimizing memory usage by vtable cloning
An arrangement is provided for optimizing memory usage through vtable cloning. When a request to acquire a shared object is received, it is first examined to see whether the shared object is...
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6912635 |
Distributing workload evenly across storage media in a storage array
A system and methods employ a redistribution module to predict whether there is data stored in an arrayed storage device that is likely to be data that will be highly accessed in the future. The...
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6912633 |
Enhanced memory management for portable devices
A method for portable device memory management includes determining an operational mode of a program configured to execute on the portable device based on validating the presence of one or more...
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6912632 |
Storage system, storage system control method, and storage medium having program recorded thereon
A storage system has a host computer and a storage control device connected thereto. The system controls duplication of data in a first logical volume to be stored in real-time in a second logical...
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6912628 |
N-way set-associative external cache with standard DDR memory devices
A method, cache system, and cache controller are provided. A two-way and n-way cache organization scheme are presented as at least two embodiments of a set-associative external cache that utilizes...
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6910103 |
Caching data
A method of caching data is provided, which includes a plurality of processes 1602 to 1605 , a cache manager 813 and a data type register 805 including at least one data type 1901 and a...
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6910109 |
Tracking memory page state
The present invention is a method and apparatus for tracking a state of a page of a memory device which has at least a dependent bank structure. A page entry table contains attribute entries of the...
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6910100 |
Detecting open write transactions to mass storage
In accordance with some embodiments of the present invention, an indicator may be provided to indicate whether a write transaction to a drive of an array of drives has completed. If the write...
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6907479 |
Integrated circuit FIFO memory devices that are divisible into independent FIFO queues, and systems and methods for controlling same
Integrated circuit FIFO memory devices may be controlled using a register file, an indexer and a controller. The FIFO memory device includes a FIFO memory that is divisible into up to a...
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6907503 |
Dual port RAM communication protocol
An apparatus for determining the validity of a data signal communicated between two microprocessors by a dual port RAM includes a sender for providing a data signal and an initialization status...
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6903972 |
Different methods applied for archiving data according to their desired lifetime
A method and system for archiving data. The data are classified according to their desired lifetime and then archived in a memory using a storage method whose reliability is in accordance with the...
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6904495 |
Method for identifying the write protect status of a diskette
A technique is provided for identifying the write protect status of a removable storage media, such as a computer diskette, prior to normal interaction with the media. The present technique...
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6904505 |
Method for determining valid bytes for multiple-byte burst memories
A memory controller for a multi-byte burst memory device may control access to memory based on parameters set up by a client. These parameters may include a byte address and a byte count that...
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6904501 |
Cache memory for identifying locked and least recently used storage locations
A cache memory includes a plurality of data memory blocks and a code memory block. Each data memory block has a plurality of storage locations and has a particular storage location identified by a...
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6904502 |
Circuit and method for protecting 1-hot and 2-hot vector tags in high performance microprocessors
The present invention relates to the design of highly reliable high performance microprocessors, and more specifically to designs using a blind invalidate circuit in high-speed memories. In...
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6904500 |
Cache controller
A cache controller operable to control a cache comprising cache lines, each being operable to store data words and validity information indicating that all data words within that cache line are...
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6898680 |
Minimization of overhead of non-volatile memory operation
A method and structure are provided that reduce the overall time of the read-erase-modify-write cycle time of non-volatile memories. Specifically, the erase operation of the read-erase-write cycle...
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6895490 |
Method for making a write-once memory device read compatible with a write-many file system
The preferred embodiments described herein provide a method for making a write-once memory device read compatible with a write-many file system. In one preferred embodiment, a method for re-writing...
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6889296 |
Memory management method for preventing an operating system from writing into user memory space
Disclosed is a method of managing memory to prevent an operating system from writing into user memory space, the method comprising providing a translation look-aside buffer (TLB) for storing TLB...
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6886083 |
Apparatus and method for controlling a card device
An apparatus controls a card device. The apparatus includes an interface unit and a control unit. The interface unit receives a command issued by a host system. The received command contains an...
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6883082 |
Central dynamic memory manager
A circuit generally comprising a memory and a core module is disclosed. The memory may be configured as (i) a first stack having a plurality of index pointers and (ii) a table having a plurality of...
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