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9041513 System and method for communicating with sensors/loggers in integrated radio frequency identification (RFID) tags  
A system and method is disclosed for communicating with sensors/loggers in integrated radio frequency identification (RFID) tags. An RFID reader uses a Communicate With Data Logger Command to...
9043363 System and method for performing memory management using hardware transactions  
The systems and methods described herein may be used to implement a shared dynamic-sized data structure using hardware transactional memory to simplify and/or improve memory management of the data...
9037807 Processor arrangement on a chip including data processing, memory, and interface elements  
At the inputs and/or outputs, memories are assigned to a reconfigurable module to achieve decoupling of internal data processing and in particular decoupling of the reconfiguration cycles from the...
9037774 Memory module with load reducing circuit and method of operation  
A memory module includes a plurality of memory devices and is operable in a computer system to perform memory operations in response to memory commands from a memory controller of the computer...
9037761 Configurable buffer allocation for multi-format video processing  
Systems and methods are described including dynamically configuring a shared buffer to support processing of at least two video read streams associated with different video codec formats. The...
9038077 Data transfer protection in a multi-tasking modeling environment  
A system for providing model level protection for resources holding data accessed by multiple tasks in a model is discussed. The protection occurs at the model level so that the protection...
9026744 Enforcing strongly-ordered requests in a weakly-ordered processing  
The disclosure is directed to a weakly-ordered processing system and method for enforcing strongly-ordered memory access requests in a weakly-ordered processing system. The processing system...
9026695 Asymmetrical processing multi-core system and network device  
An asymmetrical processing multi-core system used in a network device is provided. A sub processing core within the asymmetrical processing multi-core system facilitates a main processing core of...
9026745 Cross process memory management  
A method for efficiently managing memory resources in a computer system having a graphics processing unit that runs several processes simultaneously on the same computer system includes using...
9021213 System and method for sharing media in a computer network  
A computerized method for sharing removable storage media in a network, the method comprising associating, in an index entry, a first piece of removable storage media in a first storage device...
9021217 Communication apparatus, load distribution method, and recording medium  
A first communication apparatus includes a first central processing core; and a first memory. The first communication apparatus executes load distribution based on a first load amount of the first...
9015418 Self-sizing dynamic cache for virtualized environments  
A method and system for self-sizing dynamic cache for virtualized environments is disclosed. The preferred embodiment self sizes unequal portions of the total amount of cache and allocates to a...
9009385 Co-residency detection in a cloud-based system  
At least one virtual machine implemented on a given physical machine in an information processing system is able to detect the presence of one or more other virtual machines that are also...
9009409 Cache region concept  
A method to store objects in a memory cache is disclosed. A request is received from an application to store an object in a memory cache associated with the application. The object is stored in a...
9009155 Parallel set aggregation  
A system, method and medium may provide determination of a first plurality of a plurality of data records assigned to a first processing unit, identification of a first record of the first...
9009386 Systems and methods for managing read-only memory  
A system includes a memory device including a real memory and a tracking mechanism configured to track relationships between multiple virtual memory addresses and real memory. The system further...
9009418 Multimedia platform  
A multimedia platform is discussed, which includes a first stacking unit including a first substrate and a multimedia processor, wherein the first substrate and the multimedia processor are...
9009419 Shared memory space in a unified memory model  
Methods and systems are provided for mapping a memory instruction to a shared memory address space in a computer arrangement having a CPU and an APD. A method includes receiving a memory...
9002933 User interaction-based data sharing via cloud-based remote servers  
Methods, apparatus and systems for sharing data based on user interactions. User interactions with data, such as creating a file, opening a file, or modifying a file, are monitored by a user...
9003161 Systems and methods for managing read-only memory  
A first virtual memory address is mapped to a real memory in a memory device, and a second virtual memory address is mapped to the real memory. Here, the first virtual memory address is authorized...
9003131 Method and system for maintaining context event logs without locking in virtual machine  
System for working with shared memory includes a plurality of contexts, each having executable processes writing and reading data; a ring buffer in the shared memory for writing and reading data...
9003121 Multi-ported memory with multiple access support  
A multi-ported memory that supports multiple read and write accesses is described herein. The multi-ported memory may include a number of read/write ports that is greater than the number of...
8997114 Language level support for shared virtual memory  
Embodiments of the invention provide language support for CPU-GPU platforms. In one embodiment, code can be flexibly executed on both the CPU and GPU. CPU code can offload a kernel to the GPU....
8996821 Methods and systems for providing resource sharing through file descriptor isomorphism  
Methods and systems are disclosed for providing resource sharing in a computing environment using file descriptor isomorphism. The methods and systems may perform a method in a computing...
8990503 Monitoring multiple memory locations for targeted stores in a shared-memory multiprocessor  
A system and method for supporting targeted stores in a shared-memory multiprocessor. A targeted store enables a first processor to push a cache line to be stored in a cache memory of a second...
8990510 Read-copy update system and method  
A method, system and computer program product for managing requests for deferred updates to shared data elements while minimizing grace period detection overhead associated with determining...
8990514 Mechanisms for efficient intra-die/intra-chip collective messaging  
Mechanism of efficient intra-die collective processing across the nodelets with separate shared memory coherency domains is provided. An integrated circuit die may include a hardware collective...
8990511 Multiprocessor, cache synchronization control method and program therefor  
There is provided a cache synchronization control method by which contents of a plurality of caches can be synchronized without a programmer explicitly setting a synchronization point, and the...
8990497 Efficient memory management for parallel synchronous computing systems  
Technologies relating to efficient memory management for parallel synchronous computing systems are disclosed. Parallel synchronous computing systems may include, for example, a host, a memory...
8990516 Multi-core shared memory system with memory port to memory space mapping  
A multi-core processor system includes a memory controller that includes multiple ports and shared memory that includes physical address spaces divided among the ports. A CPU acquires from a...
8984511 Visibility ordering in a memory model for a unified computing system  
Provided is a method of permitting the reordering of a visibility order of operations in a computer arrangement configured for permitting a first processor and a second processor threads to access...
8984236 Event-based execution buffer management  
Techniques for reacting to events in a switch module. Embodiments provide a plurality of predefined load/store operations stored in a first memory buffer of the switch module. An execution buffer...
8984237 Memory system and memory management method including the same  
A multi-processor system includes a first processor, a second processor communicable with the first processor, a first non-volatile memory for storing first codes and second codes to respectively...
8984235 Storage apparatus and control method for storage apparatus  
An exemplary storage apparatus of the invention includes storage devices for storing data of block I/O commands and file I/O commands and a controller including a block cache area and a file cache...
8977822 Memory device and method having on-board processing logic for facilitating interface with multiple processors, and computer system using same  
A memory device includes an on-board processing system that facilitates the ability of the memory device to interface with a plurality of processors operating in a parallel processing manner. The...
8972670 Use of test protection instruction in computing environments that support pageable guests  
Management of storage used by pageable guests of a computing environment is facilitated. A query instruction is provided that details information regarding the storage location indicated in the...
8972704 Code section optimization by removing memory barrier instruction and enclosing within a transaction that employs hardware transaction memory  
A code section of a computer program to be executed by a computing device includes memory barrier instructions. Where the code section satisfies a threshold, the code section is modified, by...
8972668 Transactional memory that performs an ALUT 32-bit lookup operation  
A transactional memory (TM) receives a lookup command across a bus from a processor. The command includes a memory address, a starting bit position, and a mask size. In response to the command,...
8972669 Page buffering in a virtualized, memory sharing configuration  
An apparatus includes a processor and a volatile memory that is configured to be accessible in an active memory sharing configuration. The apparatus includes a machine-readable encoded with...
8972695 Automatic allocation of data replicas  
Embodiments described herein are directed to providing scalability to software applications. A computer system partitions a portion of data stored in a directory services system into multiple...
8972648 Kernal memory locking for systems that allow over-commitment memory  
Provided are techniques for allocating logical memory corresponding to a logical partition in a computing system; generating, a S/W PFT data structure corresponding to a first page of the logical...
8972647 Kernel memory locking for systems that allow over-commitment memory  
Provided are techniques for allocating logical memory corresponding to a logical partition in a computing system; generating a S/W PFT data structure corresponding to a first page of the logical...
8966189 Managing integrity of shared data in a manner permitting delayed updates  
To provide delayed updating of shared data, a concept of dualistic sequence information is introduced. In the concept, if during local modification of data, a modification to the data is published...
8966188 RAM utilization in a virtual environment  
Various systems and methods for sharing data in a virtual environment are disclosed. For example, one method involves receiving a request to access data. The request can be received from a first...
8959285 Storage system with local and remote storage devices which are managed by the local storage device  
A method of servicing a command sent from a host device file system (HDFS) within a host device (HD) by a local storage device (LSD) in communication with the HD is described. The method includes...
8959298 System and method for managing performance of a computing device having dissimilar memory types  
Systems and methods are provided for managing performance of a computing device having dissimilar memory types. An exemplary embodiment comprises a method for interleaving dissimilar memory...
8954698 Switching optically connected memory  
Memory is dynamically switched through the optical-switching fabric using at least one communication pattern to transfer memory space in the memory blades from one processor to an alternative...
8954683 Translation table and method for compressed data  
A translation table has entries that each include a share bit and a delta bit, with pointers that point to a memory block that includes reuse bits. When two translation table entries reference...
8954701 Address space management while switching optically-connected memory  
Memory is dynamically switched through the optical-switching fabric using at least one communication pattern to transfer memory space in the memory blades from one processor to an alternative...
8954674 Scatter-gather intelligent memory architecture for unstructured streaming data on multiprocessor systems  
A scatter/gather technique optimizes unstructured streaming memory accesses, providing off-chip bandwidth efficiency by accessing only useful data at a fine granularity, and off-loading memory...