Match Document Document Title
9043560 Distributed cache coherency protocol  
Systems, methods, and other embodiments associated with a distributed cache coherency protocol are described. According to one embodiment, a method includes receiving a request from a requester...
9043550 Adjustment of the number of task control blocks allocated for discard scans  
A controller receives a request to perform a release space operation. A determination is made that a new discard scan has to be performed on a cache, in response to the received request to perform...
9032157 Virtual machine failover  
Disclosed is a computer system (100) comprising a processor unit (110) adapted to run a virtual machine in a first operating mode; a cache (120) accessible to the processor unit, said cache...
9026749 Data storage system having multi-bit memory device and on-chip buffer program method thereof  
Disclosed is an on-chip buffer program method for a data storage device which comprises a multi-bit memory device and a memory controller. The on-chip buffer program method includes measuring a...
9009417 Storage control apparatus and operating mode control method of storage control apparatus  
It is an object to improve a reliability of a data protection for a storage control apparatus that is provided with a redundant configuration that is made of a plurality of clusters. A memory unit...
8996812 Write-back coherency data cache for resolving read/write conflicts  
A write-back coherency data cache for temporarily holding cache lines. Upon receiving a processor request for data, a determination is made from a coherency directory whether a copy of the data is...
8990513 Accelerated recovery for snooped addresses in a coherent attached processor proxy  
A coherent attached processor proxy (CAPP) that participates in coherence communication in a primary coherent system on behalf of an external attached processor maintains, in each of a plurality...
8990511 Multiprocessor, cache synchronization control method and program therefor  
There is provided a cache synchronization control method by which contents of a plurality of caches can be synchronized without a programmer explicitly setting a synchronization point, and the...
8966180 Scatter-gather intelligent memory architecture for unstructured streaming data on multiprocessor systems  
A scatter/gather technique optimizes unstructured streaming memory accesses, providing off-chip bandwidth efficiency by accessing only useful data at a fine granularity, and off-loading memory...
8966169 Linear recording device for executing optimum writing upon receipt of series of commands including mixed read and write commands and a method for executing the same  
A tape recording device, method, and computer program product are provided for performing operations of position movement, reading, and writing on a tape medium, and receiving a series of commands...
8954674 Scatter-gather intelligent memory architecture for unstructured streaming data on multiprocessor systems  
A scatter/gather technique optimizes unstructured streaming memory accesses, providing off-chip bandwidth efficiency by accessing only useful data at a fine granularity, and off-loading memory...
8949541 Techniques for evicting dirty data from a cache using a notification sorter and count thresholds  
A method for cleaning dirty data in an intermediate cache is disclosed. A dirty data notification, including a memory address and a data class, is transmitted by a level 2 (L2) cache to frame...
8949312 Updating clients from a server  
An embodiment generally relates to a method of updating clients from a server. The method includes maintaining a master copy of a software on a server and capturing changes to the master copy of...
8949546 Network cache system for reducing redundant data  
Embodiments include a local cache management system that is configured to be coupled to a local cache and that includes an index engine configured to store fingerprints of message segments stored...
8943272 Variable cache line size management  
According to one aspect of the present disclosure, a method and technique for variable cache line size management is disclosed. The method includes: determining whether an eviction of a cache line...
8935484 Write-absorbing buffer for non-volatile memory  
A write-absorbing, volatile memory buffer for use with a processor module and a non-volatile memory is disclosed. The write-absorbing buffer operates as a dirty cache that can be used to look up...
8935478 Variable cache line size management  
According to one aspect of the present disclosure, a system and technique for variable cache line size management is disclosed. The system includes a processor and a cache hierarchy, where the...
8924651 Prefetch optimization in shared resource multi-core systems  
An apparatus and method is described herein for optimization to prefetch throttling, which potentially enhances performance, reduces power consumption, and maintains positive gain for workloads...
8924652 Simultaneous eviction and cleaning operations in a cache  
Embodiments provide a method comprising receiving, at a cache associated with a central processing unit that is disposed on an integrated circuit, a request to perform a cache operation on the...
8914576 Buffer for RAID controller with disabled post write cache  
Enhancing management of controllers in a RAID system when a post-write-cache of a is disabled, by supplying a stripe buffer that stores sequential write requests—and before such requests are...
8914590 Data processing method and device  
In a data-processing method, first result data may be obtained using a plurality of configurable coarse-granular elements, the first result data may be written into a memory that includes...
8909872 Computer system with coherent interconnection  
A computer system is provided including a central processing unit having an internal cache, a memory controller is coupled to the central processing unit, and a closely coupled peripheral is...
8909858 Storing encoded data slices in a dispersed storage network  
A method begins by a dispersed storage network (DSN) access module encoding a data segment to produce slices and sending temporary write requests to DSN storage modules, wherein the temporary...
8904110 Distributed user controlled multilevel block and global cache coherence with accurate completion status  
This invention permits user controlled cache coherence operations with the flexibility to do these operations on all levels of cache together or each level independently. In the case of an all...
8904117 Non-shared write-back caches in a cluster environment  
Various systems and methods for performing write-back caching in a cluster. For example, one method can involve a first node detecting that no failover nodes are available. A determination is made...
8898394 Data migration method  
A storage apparatus for controlling a storage unit includes a cache memory for temporarily storing data to be stored in the storage unit, and a processor for executing a process including...
8898395 Memory management for cache consistency  
Methods and systems for maintaining cache consistency are described. A group of instructions is executed. The group of instructions can include multiple memory operations, and also includes an...
8843706 Memory management among levels of cache in a memory hierarchy  
Methods, apparatus, and product for memory management among levels of cache in a memory hierarchy in a computer with a processor operatively coupled through two or more levels of cache to a main...
8838901 Coordinated writeback of dirty cachelines  
A data processing system includes a processor core and a cache memory hierarchy coupled to the processor core. The cache memory hierarchy includes at least one upper level cache and a lowest level...
8838905 Periodic destages from inside and outside diameters of disks to improve read response time via traversal of a spatial ordering of tracks  
A storage controller that includes a cache, receives a command from a host, wherein a set of criteria corresponding to read response times for executing the command have to be satisfied. A destage...
8819343 Periodic destages from inside and outside diameters of disks to improve read response times  
A storage controller that includes a cache, receives a command from a host, wherein a set of criteria corresponding to read response times for executing the command have to be satisfied. A destage...
8799584 Method and apparatus for implementing multi-processor memory coherency  
A method and an apparatus for implementing multi-processor memory coherency are disclosed. The method includes: a Level-2 (L2) cache of a first cluster receives a control signal of the first...
8799585 Cache memory capable of adjusting burst length of write-back data in write-back operation  
A cache memory includes a write-back determination unit and a burst length determination unit. The write-back determination unit determines whether a block is a write-back block based on an n-bit...
8799586 Memory mirroring and migration at home agent  
Methods and apparatus relating to memory mirroring and migration at a Home Agent (HA) are described. In one embodiment, a home agent may mirror its data at a slave agent. In some embodiments, a...
8799581 Cache coherence monitoring and feedback  
Color-based caching allows each cache line to be distinguished by a specific color, and enables the manipulation of cache behavior based upon the colors of the cache lines. When multiple threads...
8793441 System, method and computer program product for managing data using a write-back cache unit  
A method for managing data, the method includes: providing a write-back cache unit coupled to at least one storage unit; receiving a request to write a new data version to a certain cache data...
8793436 Cache management of tracks in a first cache and a second cache for a storage  
Provided a computer program product, system, and method for cache management of tracks in a first cache and a second cache for a storage. The first cache maintains modified and unmodified tracks...
8793439 Accelerating memory operations using virtualization information  
A method of accelerating memory operations using virtualization information includes executing a hypervisor on hardware resources of a computing system. A plurality of domains are created under...
8769199 Methods and systems of distributing RAID IO load across multiple processors  
A method for distributing IO load in a RAID storage system is disclosed. The RAID storage system may include a plurality of RAID volumes and a plurality of processors. The IO load distribution...
8769195 Storage apparatus and storage apparatus control method  
A save control section included in a storage apparatus continuously performs writeback by which a data group is read out from a plurality of storage sections of the storage apparatus and by which...
8756377 Area and power efficient data coherency maintenance  
An apparatus for storing data that is being processed is disclosed. The apparatus comprises: a cache associated with a processor and for storing a local copy of data items stored in a memory for...
8756378 Broadcast protocol for a network of caches  
A method for managing caches, including: broadcasting, by a first cache agent operatively connected to a first cache and using a first physical network, a first peer-to-peer (P2P) request for a...
8751750 Cache device, data management method, program, and cache system  
A deleted cache determining part determines a cache data which is to be deleted from a data storing part in a case where a sum of a data amount of a data which is recorded to the data storing part...
8745332 Cache management of tracks in a first cache and a second cache for a storage  
Provided a computer program product, system, and method for cache management of tracks in a first cache and a second cache for a storage. The first cache maintains modified and unmodified tracks...
8732409 Cache management policy and corresponding device  
A cache management policy is provided, comprising a method for writing back to a memory (104) a data element set (122) stored in a cache (110). The method reduces the time some items stay in the...
8725954 Information processing apparatus and memory control apparatus  
A memory control apparatus, in a case of receiving from a processor, under a condition where the number of cache memories retaining a copy of data stored in a main storage device is one, a...
8719506 Push mechanism for quality of service (QoS) support in coherency port  
In an embodiment, a memory port controller (MPC) is coupled to a memory port and receives transactions from processors and a coherency port (ACP) used by one or more peripheral devices that may be...
8700861 Managing a dynamic list of entries for cache page cleaning  
A method is used in managing cache pages. A location pointer is maintained in a dynamic list of entries for cache page cleaning. The dynamic list includes a list of cache pages ordered from most...
8694736 Satisfying memory ordering requirements between partial reads and non-snoop accesses  
A method and apparatus for preserving memory ordering in a cache coherent link based interconnect in light of partial and non-coherent memory accesses is herein described. In one embodiment,...
8683142 Technique and apparatus for identifying cache segments for caching data to be written to main memory  
A memory apparatus having a cache memory including cache segments, and memorizing validity data indicative of whether or not each of the sectors contained in each cache segment is a valid sector...