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7624236 Predictive early write-back of owned cache blocks in a shared memory computer system  
A method for predicting early write back of owned cache blocks in a shared memory computer system. This invention enables the system to predict which written blocks may be more likely to be...
7620057 Cache line replacement with zero latency  
A method for cache management includes assigning a respective cache line in a cache of a processing device to each of a plurality of processing flows in the processing device, and loading...
7606980 Demand-based error correction  
A technique for demand-based error correction. More particularly, at least one embodiment of the invention relates to a technique to reduce storage overhead of cache memories containing error...
7606978 Multi-node computer system implementing global access state dependent transactions  
A node in a multi-node system includes a memory, an active device that includes a cache, an interface that sends and receives coherency messages on an inter-node network coupling the node to...
7600080 Avoiding deadlocks in a multiprocessor system  
In one embodiment, the present invention includes a method for receiving a first memory request from a first caching agent associated with a first processor, in a home agent associated with a...
7590742 IP address management  
Managing addresses to be assigned to users of an IP network is described, in which it is detected that a packet has been addressed to a released address held in a queue for holding released...
7574568 Optionally pushing I/O data into a processor's cache  
A method, an apparatus and a system for a computing system implements a technique known as cache push that enhances a single writer invalidation protocol with the ability to optionally push data...
7562188 RAID power safe apparatus, systems, and methods  
Apparatus and systems, as well as methods and articles, may operate to sequence write operations and journal a portion of write data in a dual-parity redundant array of inexpensive disks (RAID)...
7555610 Cache memory and control method thereof  
The cache memory in the present invention includes a C flag setting unit 40 which adds, to each cache entry holding line data, a cleaning flag C indicating whether or not a write operation will...
7539816 Disk control device, disk control method  
A disk control device stores write requests from a cache memory or reads commands from a host in a queue for a disk drive in chronological order. When the number of write requests stored in the...
7539679 Information processing system and control  
Provides methods, apparatus and systems to speed up transaction processing against a database. An example information processing system for performing transaction processing against a database...
7523268 Reducing number of rejected snoop requests by extending time to respond to snoop request  
A cache, system and method for reducing the number of rejected snoop requests. An incoming snoop request is entered in the first available latch in a pipeline of latches in a stall/reorder unit if...
7509460 DRAM remote access cache in local memory in a distributed shared memory system  
In one embodiment, a memory controller for a node in a multi-node computer system comprises logic and a control unit. The logic is configured to determine if an address corresponding to a request...
7506107 Shared memory multiprocessor system  
In a shared memory multiprocessor system, data reading accesses and data write-back completion notifications are selected in synchronism with all of the nodes to order them. In each of the nodes, a...
7496714 Method and system for adaptive back-off and advance for non-volatile storage (NVS) occupancy level management  
A technique for determining when to destage write data from a fast, NVS of a computer system from an upper level to a lower level of storage in the computer system comprises adaptively varying a...
7490199 System and method for safe removal of a removable device from a digital appliance  
A method and system is introduced for allowing removal of a removable device connected to a digital appliance in a safe manner that preserves removable device integrity. There is no requirement for...
7490184 Systems and methods for data intervention for out-of-order castouts  
Systems and methods for data intervention for out-of-order castouts are disclosed. Embodiments provide for transmitting snoopable requests received from one or more requesting devices to one or...
7484046 Reducing number of rejected snoop requests by extending time to respond to snoop request  
A cache, system and method for reducing the number of rejected snoop requests. A “stall/reorder unit” in a cache receives a snoop request from an interconnect. Information, such as the address,...
7484044 Method and apparatus for joint cache coherency states in multi-interface caches  
A method and apparatus for cache coherency states is disclosed. In one embodiment, a cache accessible across two interfaces, an inner interface and an outer interface, may have a joint cache...
7478203 Technique for eliminating dead stores in a processor  
A technique for reducing off-chip bandwidth requirements for a processor reads old data from a location in an on-chip store of a processor in preparation of writing new data to the location in the...
7472230 Preemptive write back controller  
A preemptive write back controller is described. The present invention is well suited for a cache, main memory, or other temporarily private data storage that implements a write back strategy. The...
7444478 Priority scheme for transmitting blocks of data  
Provided are techniques for transmitting blocks of data. It is determined whether any high priority out of sync (HPOOS) indicator is set to indicate that a number of modified segments associated...
7444476 System and method for code and data security in a semiconductor device  
A system and method for preventing unauthorized access to the software of a semiconductor device is provided. The semiconductor device of the present invention includes a memory buffer in the data...
7441081 Write-back caching for disk drives  
Methods and associated structures for utilizing write-back cache management modes for local cache memory of disk drives coupled to a storage controller while maintaining data integrity of the data...
7418533 Data storage system and control apparatus with a switch unit connected to a plurality of first channel adapter and modules wherein mirroring is performed  
A storage system has a plurality of control modules for controlling a storage device for accesses from a mainframe host and an open system host respectively supporting different protocols. An open...
7415577 Method and apparatus to write back data  
Briefly, in accordance with an embodiment of the invention, a method and apparatus to write back data is provided. The method may include setting a status corresponding to a block of data in...
7415576 Data processor with block transfer control  
A data processor arranged so that a block transfer control unit ( 12 ) can initiate block transfer in response to the execution of a particular instruction by a CPU, in order to increase the speed...
7406566 Ring interconnect with multiple coherence networks  
A cache architecture to increase communication throughput and reduce stalls due to coherence protocol dependencies, while reducing power within an integrated circuit. More particularly, embodiments...
7397478 Various apparatuses and methods for switching between buffers using a video frame buffer flip queue  
A method, apparatus, and system are described in which a signal is generated to inhibit the execution of flip commands that cause a flip between buffers of a frame buffer. One or more of the flip...
7394817 Distributed data caching in hybrid peer-to-peer systems  
A method for caching data in a hybrid peer-to-peer system comprising a plurality of interconnected peer computers is disclosed. The method comprising the steps of establishing ( 1702 ) a...
7392352 Computer architecture for shared memory access  
A computer architecture that includes a hierarchical memory system and one or more processors. The processors execute memory access instructions whose semantics are defined in terms of the...
7389387 Distributed memory module cache writeback  
One embodiment of a distributed memory module cache includes tag memory and associated logic implemented at the memory controller end of a memory channel. The memory controller is coupled to at...
7389383 Selectively unmarking load-marked cache lines during transactional program execution  
One embodiment of the present invention provides a system that facilitates selectively unmarking load-marked cache lines during transactional program execution, wherein load-marked cache lines are...
7386659 Memory system  
A memory controller converts controller output signals output from a controller into memory input signals according to the operation specifications of memory chips to operate, and outputs the...
7380069 Method and apparatus for DMA-generated memory write-back  
A method for memory write-back provides a memory access controller and then generates a write-back pattern in the memory access controller. The write-back pattern is then written back into a memory...
7376799 System for reducing the latency of exclusive read requests in a symmetric multi-processing system  
A symmetric multi-processing system for processing exclusive read requests. The system includes a plurality of cell boards, each of which further includes at least one CPU and cache memory, with...
7370148 Storage system, control method thereof, and program  
When a write-back request for writing back new data in a cache memory to disk devices forming a redundant configuration of RAID is generated, a write-back processing unit, reserves a parity buffer...
7370145 Write back method for RAID apparatus  
A RAID control apparatus comprises at least a cache memory; an update information management table for storing update information; an update information storage unit for storing, in the update...
7366846 Redirection of storage access requests  
Provided are a method, system, and article of manufacture, wherein a controller receives a request from one of a plurality of hosts. The controller determines whether a primary storage control unit...
7356651 Data-aware cache state machine  
A method and system directed to improve effectiveness and efficiency of cache and data management by differentiating data based on certain attributes associated with the data and reducing the...
7355601 System and method for transfer of data between processors using a locked set, head and tail pointers  
A CPU module includes a host element configured to perform a high-level host-related task, and one or more data-generating processing elements configured to perform a data-generating task...
7353341 System and method for canceling write back operation during simultaneous snoop push or snoop kill operation in write back caches  
A cache write back operation, write back modified data to memory from cache data array to fix inconsistency between them can be cancelled by the results of a comparison of the progress between a...
7350031 Mechanism for automatic backups in a mobile system  
According to one embodiment, a system is disclosed. The system includes a first processor to operate a host system and a chipset, coupled to the first processor and the hard disk drive to operate...
7340563 Data transmission device having the shape of a standard 3.5″ disk  
A data transmission device includes a memory cache table ( 4 ) composed of a DRAM memory, a standard 2.5″ hard disk ( 5 ), a control CPU ( 7 ), a FPGA ( 6 ) (or ASIC), a disk interface ( 3 ) and...
7337281 Storage system and data caching method in the system  
A channel adapter connected to a host has a local cache memory. The channel adapter duplexes and writes the write-data in the local cache memory in response to a data-write request from the host....
7334089 Methods and apparatus for providing cache state information  
According to the present invention, methods and apparatus are provided for increasing the efficiency of data access in a multiple processor, multiple cluster system. Mechanisms for allowing a...
7330941 Global modified indicator to reduce power consumption on cache miss  
A processor includes a cache memory having at least one entry managed according to a copy-back algorithm. A global modified indicator (GMI) indicates whether any copy-back entry in the cache...
7328313 Methods to perform cache coherency in multiprocessor system using reserve signals and control bits  
A cache controller prevents the use of data in a write-back cache memory from being propagated except to a client asserting a reserve signal, if a first control bit is set, or until the data is...
7321955 Control device, control method and storage medium recording a control program for controlling write-back schedule of data from cache memory to a plurality of storage devices  
The storage control device of the present invention controls a plurality of storage devices. The storage control device comprises an LRU write-back unit writing back data stored in the cache memory...
7320055 Storage system, and control method and program thereof  
A cache processing unit manages the data, which is in a cache memory, in a page unit including plurality pieces of block data each of which serves as an access unit of a host, and processes input...
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