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9094090 Decentralized caching system  
In a satellite communication system comprising at least a hub and a plurality of terminals, at least one terminal may include a cache for storing data objects. The cache may be based on a...
9043557 Heterogeneous memory system  
A heterogeneous memory system includes a main memory arrangement, a first-level cache, and a memory management unit (MMU). The first-level cache includes an SRAM arrangement and a DRAM...
9043579 Prefetch optimizer measuring execution time of instruction sequence cycling through each selectable hardware prefetch depth and cycling through disabling each software prefetch instruction of an instruction sequence of interest  
A prefetch optimizer tool for an information handling system (IHS) may improve effective memory access time by controlling both hardware prefetch operations and software prefetch operations. The...
9043389 Flow control method and apparatus for enhancing the performance of web browsers over bandwidth constrained links  
Flow control is applied to increasing the performance of a browser while pre-fetching Web objects while operating over bandwidth constrained links to increase the level of concurrency, thus...
9037810 Pre-fetching of data packets  
Some of the embodiments of the present disclosure provide a method comprising receiving a data packet, and storing the received data packet in a memory; generating a descriptor for the data...
9032159 Data prefetcher with complex stride predictor  
A hardware data prefetcher includes a queue of indexed storage elements into which are queued strides associated with a stream of temporally adjacent load requests. Each stride is a difference...
9032158 Method, system and apparatus for identifying a cache line  
A method of identifying a cache line of a cache memory (180) for replacement, is disclosed. Each cache line in the cache memory has a stored sequence number and a stored transaction data stream...
9026740 Prefetch data needed in the near future for delta compression  
A computer-implemented method and system for improving efficiency in a delta compression process selects a data chunk to delta compress and generate matching criteria for the selected data chunk....
9026738 Cache memory device, cache memory control method, program and integrated circuit  
To aim to provide a cache memory device that performs a line size determination process for determining a refill size, in advance of a refill process that is performed at cache miss time....
9026739 Multimode prefetcher  
One or more lines of a cache are prefetched according to a first prefetch routine while training a prefetcher to prefetch one or more lines of the cache according to a second prefetch routine. In...
9026741 System and method for warming cache  
A method, computer program product, and computing system for receiving an indication of a cold cache event within a storage system. The storage system includes a multi-tiered data array including...
9021210 Cache prefetching based on non-sequential lagging cache affinity  
A mechanism is provided in a cache subsystem for cache prefetching based on non-sequential access. The mechanism determines frequently accessed non-sequential cache records in the cache subsystem....
9015422 Access map-pattern match based prefetch unit for a processor  
In an embodiment, a processor may implement an access map-pattern match (AMPM)-based prefetcher in which patterns may include wild cards for some cache blocks. The wild card may match any access...
9009445 Memory management unit speculative hardware table walk scheme  
A system and method for efficiently handling translation look-aside buffer (TLB) misses. A memory management unit (MMU) detects when a given virtual address misses in each available...
9009414 Prefetch address hit prediction to reduce memory access latency  
A prefetch unit receives a memory read request having an associated address for accessing data that is stored in memory. A next predicted address is determined in response to a prefetch address...
8996815 Cache memory controller  
An integrated circuit (IC) may include a cache memory, and a cache memory controller coupled to the cache memory. The cache memory controller may be configured to receive a cache miss associated...
8990508 Memory prefetch systems and methods  
Systems and methods are disclosed herein, including those that operate to prefetch a programmable number of data words from a selected memory vault in a stacked-die memory system when a pipeline...
8984231 Methods and apparatus to perform adaptive pre-fetch operations in managed runtime environments  
Methods and apparatus to perform adaptive pre-fetch operations in managed runtime environments are disclosed herein. An example pre-fetch unit for use with a pre-fetch operation includes a first...
8978022 Reducing instruction miss penalties in applications  
Embodiments include systems and methods for reducing instruction cache miss penalties during application execution. Application code is profiled to determine “hot” code regions likely to...
8977819 Prefetch stream filter with FIFO allocation and stream direction prediction  
A prefetch filter receives a memory read request having an associated address for accessing data that is stored in a line of memory. An address window is determined that has an address range that...
8966186 Cache memory prefetching  
According to exemplary embodiments, a computer program product, system, and method for prefetching in memory include determining a missed access request for a first line in a first cache level and...
8965995 Wireless storage management system  
A wireless storage management system adapted for being used in an electronic product for wirelessly communicating with a plurality of wireless storage devices includes an identity module assigning...
8966180 Scatter-gather intelligent memory architecture for unstructured streaming data on multiprocessor systems  
A scatter/gather technique optimizes unstructured streaming memory accesses, providing off-chip bandwidth efficiency by accessing only useful data at a fine granularity, and off-loading memory...
8966185 Cache memory prefetching  
According to exemplary embodiments, a computer program product, system, and method for prefetching in memory include determining a missed access request for a first line in a first cache level and...
8959307 Reduced latency memory read transactions in storage devices  
A solution for performing reduced latency memory read transactions is disclosed. In one example, a storage apparatus has a memory array that includes: a flash device having a data register, a...
8954672 System and method for cache organization in row-based memories  
The present disclosure relates to a method and system for mapping cache lines to a row-based cache. In particular, a method includes, in response to a plurality of memory access requests each...
8954674 Scatter-gather intelligent memory architecture for unstructured streaming data on multiprocessor systems  
A scatter/gather technique optimizes unstructured streaming memory accesses, providing off-chip bandwidth efficiency by accessing only useful data at a fine granularity, and off-loading memory...
8954474 Managing data systems to support semantic-independent schemas  
A method of maintaining data described in a plurality of data models. An ontology is used to describe the data models. The data models are managed using the ontology and using a validation schema...
8954680 Modifying data prefetching operation based on a past prefetching attempt  
A method, apparatus and product for data prefetching. The method comprising: prefetching data associated with a load instruction of a computer program, wherein the prefetching is performed in...
8949522 Performance of a stride-based prefetcher on an out-of-order processing unit (CPU)  
Systems, apparatusses, and methods are disclosed for improving performance of a stride-based prefetcher on an out-of-order central processing unit (CPU). The present disclosure teaches a processor...
8949543 Filtering obsolete read requests in networked client-server architecture  
Read messages are issued by a client for data stored in a storage system of the networked client-server architecture. A client agent mediates between the client and the storage system. A sequence...
8935479 Adaptive cache promotions in a two level caching system  
Provided are a computer program product, system, and method for managing data in a first cache and a second cache. A reference count is maintained in the second cache for the page when the page is...
8935478 Variable cache line size management  
According to one aspect of the present disclosure, a system and technique for variable cache line size management is disclosed. The system includes a processor and a cache hierarchy, where the...
8930968 Method and driver for processing data in a virtualized environment  
A data processing method and driver capable of reducing transactions between operating systems (OS) in a virtualization environment that supports a plurality of operating systems are provided. The...
8930632 Methods and systems for application controlled pre-fetch  
Methods and systems for application controlled pre-fetch are described. The system receives pre-fetch information, over a network, at a first load balancer. The pre-fetch information is received...
8930624 Adaptive cache promotions in a two level caching system  
Provided are a computer program product, system, and method for managing data in a first cache and a second cache. A reference count is maintained in the second cache for the page when the page is...
8924651 Prefetch optimization in shared resource multi-core systems  
An apparatus and method is described herein for optimization to prefetch throttling, which potentially enhances performance, reduces power consumption, and maintains positive gain for workloads...
8922565 System and method for using a secondary processor in a graphics system  
A system, method and apparatus are disclosed, in which a processing unit is configured to perform secondary processing on graphics pipeline data outside the graphics pipeline, with the output from...
8918618 Adaptive memory system for enhancing the performance of an external computing device  
An adaptive memory system is provided for improving the performance of an external computing device. The adaptive memory system includes a single controller, a first memory type (e.g., Static...
8918589 Memory controller, memory system, semiconductor integrated circuit, and memory control method  
A memory controller (101) according to this invention includes: a command generation unit (102) which generates access commands each including a physical address, based on an access request...
8914590 Data processing method and device  
In a data-processing method, first result data may be obtained using a plurality of configurable coarse-granular elements, the first result data may be written into a memory that includes...
8909866 Prefetching to a cache based on buffer fullness  
A processor transfers prefetch requests from their targeted cache to another cache in a memory hierarchy based on a fullness of a miss address buffer (MAB) or based on confidence levels of the...
8898390 Scheduling workloads based on cache asymmetry  
In one embodiment, a processor includes a first cache and a second cache, a first core associated with the first cache and a second core associated with the second cache. The caches are of...
8892822 Selectively dropping prefetch requests based on prefetch accuracy information  
The disclosed embodiments relate to a system that selectively drops a prefetch request at a cache. During operation, the system receives the prefetch request at the cache. Next, the system...
8892821 Method and system for thread-based memory speculation in a memory subsystem of a data processing system  
A data processing system includes a system memory, one or more processing cores, and a memory controller that controls access to a system memory. The memory controller includes a memory...
8886895 System and method for fetching information in response to hazard indication information  
A method for fetching information in response to hazard indication information, the method includes: (i) associating hazard indication information to at least one information unit that is being...
8886914 Multiplex restore using next relative addressing  
According to one embodiment of the present disclosure, a method for multiplex restore using next relative address may be provided. The method may include identifying an address of a first data...
8886887 Uniform external and internal interfaces for delinquent memory operations to facilitate cache optimization  
A computer implemented method, software infrastructure and computer usable program code for improving application performance. A delinquent memory operation instruction is identified. A delinquent...
8880807 Bounding box prefetcher  
A data prefetcher in a microprocessor. The data prefetcher includes a plurality of period match counters associated with a corresponding plurality of different pattern periods. The data prefetcher...
8880652 Heuristic browser predictive pre-caching  
A method and computer readable medium are disclosed for predictive caching of web pages for display through a screen of a mobile computing device. A load request is received at a mobile computing...