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6978351 Method and system to improve prefetching operations  
To reduce prefetch overshoot when prefetching partial data sets along the path from input-output bus to system memory, a prefetch field is used to communicate the amount of data that a prefetching...
6976125 Method and apparatus for predicting hot spots in cache memories  
One embodiment of the present invention provides a system for predicting hot spots in a cache memory. Upon receiving a memory operation at the cache, the system determines a target location within...
6976147 Stride-based prefetch mechanism using a prediction confidence value  
A prefetch mechanism includes a prefetch predictor table coupled to a prefetch control. The prefetch predictor table may include a plurality of locations configured to store a plurality of entries...
6973547 Coherence message prediction mechanism and multiprocessing computer system employing the same  
A coherence prediction mechanism includes a history cache for storing a plurality of cache entries each storing coherence history information for a corresponding block of data. Entries in the...
6970985 Statically speculative memory accessing  
A processor framework includes a compiler which compiles a computer program, the compiler extracting speculative static information about memory accesses during compilation, and a...
6970978 System and method for providing a pre-fetch memory controller  
A system and method is disclosed for providing a pre-fetch memory controller in a computer system that comprises a plurality of master agents. The memory controller comprises a bus interface, a...
6968430 Circuit and method for improving instruction fetch time from a cache memory device  
A circuit and method are contemplated herein for improving instruction fetch time by determining mapping information prior to storage of the mapping information in a lower-level memory device. In...
6968423 Dynamic data access pattern detection in a block data storage device  
Method and apparatus for transferring data between a host device and a data storage device having a first memory space (such as a buffer) and a second memory space (such as magnetic discs). Data...
6965967 Disk memory device, data pre-reading method, and recorded medium  
Based on an area which was accessed by a just-previous read command and an area which is required by a present read command, the direction of the access, the interval between the areas, and the...
6965966 Disk drive pre-computing seek parameters for a continuation track and a next command to facilitate continuing a read-ahead or aborting the read-ahead  
A disk drive is disclosed which pre-computes first seek parameters to seek to a continuation track storing read-ahead data, and second seek parameters to seek to a target track of a next command....
6963954 Method and apparatus for optimizing prefetching based on memory addresses  
Address based prefetch logic varies prefetching according to address values in read requests. The address based prefetch logic can vary how much data is initially read into a prefetch buffer or...
6961830 Semiconductor memory device with fast masking process in burst write mode  
A semiconductor memory device has a burst write mode in which predetermined plural command signals are input through a plurality of command pads and a mask control operation in the burst write...
6961823 Stream-down prefetching cache  
An apparatus and method for prefetching cache data in response to data requests. The prefetching uses the memory addresses of requested data to search for other data, from a related address, in a...
6961824 Deterministic setting of replacement policy in a cache  
A cache is configured to receive direct access transactions. Each direct access transaction explicitly specifies a way of the cache. The cache may alter the state of its replacement policy in...
6961814 Disk drive maintaining a cache link attribute for each of a plurality of allocation states  
A disk drive is disclosed comprising a cache buffer for caching data written to the disk and data read from the disk, the cache buffer comprising a plurality of cache segments linked together to...
6959363 Cache memory operation  
A cache memory comprises a fetch engine arranged to issue fetch requests for accessing data items from locations in a main memory identified by access addresses in a program being executed, a...
6957306 System and method for controlling prefetching  
Systems and methods that control prefetching are provided. In one embodiment, a system may include, for example, a prefetch buffer system coupled to a processing unit and to a memory. The prefetch...
6957317 Apparatus and method for facilitating memory data access with generic read/write patterns  
An apparatus and method facilitating memory data access with generic read/write patterns are described. In one embodiment, the method includes the detection, in response to a load instruction, of...
6957305 Data streaming mechanism in a microprocessor  
This invention provides a dual usage cache reload buffer (CRB) to hold both demand loads as well as prefetch loads. A new form of a data cache block touch (DCBT) instruction specifies which level...
6957304 Runahead allocation protection (RAP)  
A method and apparatus are described for protecting cache lines allocated to a cache by a run-ahead prefetcher from premature eviction, preventing thrashing. The invention also prevents premature...
6957300 Reducing delay of command completion due to overlap condition  
Method and apparatus for transferring data between a host device and a data storage device having a first memory space and a second memory space. The host issues access commands to store and...
6954840 Method and apparatus for content-aware prefetching  
A content prefetcher including a virtual address predictor. The virtual address predictor identifies candidate virtual addresses in a cache line without reference to an external address source.
6950905 Write posting memory interface with block-based read-ahead mechanism  
A method may involve: receiving a request to perform a block write to a target device and data associated with the block write; buffering the data associated with the block write prior to...
6944725 Reciprocally adjustable dual queue mechanism  
A data storage mechanism is provided where a plurality of data items are stored in a plurality of register elements. Each registered element is capable of storing at least one data item. The...
6944718 Apparatus and method for speculative prefetching after data cache misses  
A microprocessor is configured to continue execution in a special Speculative Prefetching After Data Cache Miss (SPAM) mode after a data cache miss is encountered. The microprocessor includes...
6941310 System and method for caching data for a mobile application  
A cache table comprises a set of access parameters and a set of data columns. One or more instances of a cache table are stored on a mobile computing device. Each instance includes an argument (a...
6938126 Cache-line reuse-buffer  
A method, apparatus, and system that compares a current fetch request having a first start address and length associated with the current fetch request to a second start address of the next fetch...
6934810 Delayed leaky write system and method for a cache memory  
A mechanism to selectively leak data signals from a cache memory is provided. According to one aspect of the invention, an Instruction Processor (IP) is coupled to generate requests to access data...
6934802 Band detection and performance optimization for a data storage device  
A data storage device with a cache memory in communication with a control processor programmed with a routine to effect data throughput with a host device. The data storage device includes a...
6934811 Microprocessor having a low-power cache memory  
A cache is provided which has low power dissipation. An execution engine generates a sequential fetch signal indicating that data required at a next cycle is stored at a next location of just...
6934809 Automatic prefetch of pointers  
Techniques have been developed whereby likely pointer values are identified at runtime and contents of corresponding storage location can be prefetched into a cache hierarchy to reduce effective...
6931505 Distributed memory module cache command formatting  
One embodiment of a distributed memory module cache includes tag memory and associated logic implemented at the memory controller end of a memory channel. The memory controller is coupled to at...
6931477 Method and apparatus for patching code and data residing on a memory  
A method and apparatus for applying patches to a code or data residing on a non-volatile memory device is illustrated. A code residing at a first location in a non-volatile memory can be replaced...
6931490 Set address correlation address predictors for long memory latencies  
Set address correlation correlates between addresses belonging to a common address set. Addresses are grouped into address sets and correlations are created between addresses by set. The...
6925534 Distributed memory module cache prefetch  
One embodiment of a distributed memory module cache includes tag memory and associated logic implemented at the memory controller end of a memory channel. The memory controller is coupled to at...
6925535 Program control flow conditioned on presence of requested data in cache memory  
Method and apparatus for conditioning program control flow on the presence of requested data in a cache memory. In a data processing system that includes a cache memory and a system memory coupled...
6922753 Cache prefetching  
Method and apparatus for prefetching cache with requested data are described. A processor initiates a read access to main memory for data which is not in the main memory. After the requested data...
6920530 Scheme for reordering instructions via an instruction caching mechanism  
A method and system for storing instructions retrieved from memory in a memory cache to provide said instructions to a processor. First a new instruction is received from the memory. The system...
6918009 Cache device and control method for controlling cache memories in a multiprocessor system  
In the case that at the time of generation of a pre-fetch request following a read request from one of the processors the data stored in other cache devices cannot be read unless its state tag is...
6918010 Method and system for prefetching data  
In prefetching cache lines from a main memory to a cache memory, an array of memory locations to be prefetched is determined and a base address indicating a highest address in the array is...
6915404 Computer system implementing a multi-threaded stride prediction read ahead algorithm  
A computer system includes a read ahead engine that receives a sequence of read requests and performs read ahead operations in accordance with various patterns detected within the sequence of read...
6915415 Method and apparatus for mapping software prefetch instructions to hardware prefetch logic  
A method and apparatus for mapping some software prefetch instructions in a microprocessor system to a modified set of hardware prefetch instructions and executing the software prefetch by...
6910099 Disk drive adjusting read-ahead to optimize cache memory allocation  
A disk drive is disclosed which receives a read command from a host computer, the read command comprising a command size representing a number of blocks of read data to read from the disk. A...
6901486 Method and system for optimizing pre-fetch memory transactions  
A method of determining whether to issue a pre-fetch transaction in a memory control system comprising generating a pre-fetch threshold dependent on a demand load of a memory controller,...
6898674 Apparatus, method, and system for synchronizing information prefetch between processors and memory controllers  
According to one embodiment of the invention, a prefetcher in a memory controller is described which includes logic to receive memory request hints from a CPU. The memory request hints are used by...
6895475 Prefetch buffer method and apparatus  
Methods and apparatus are provided for supplying data to a processor in a digital processing system. The method includes holding data required by the processor in a cache memory, supplying data...
6892281 Apparatus, method, and system for reducing latency of memory devices  
According to one embodiment of the invention, a method is provided in which memory requests from a first component and a second component are received. The memory requests are issued by the first...
6892173 Analyzing effectiveness of a computer cache by estimating a hit rate based on applying a subset of real-time addresses to a model of the cache  
A system and method for analyzing the effectiveness of a computer cache memory. A bus with memory transactions is monitored. A subset of addresses, along with associated transaction data, on the...
6892280 Multiprocessor system having distributed shared memory and instruction scheduling method used in the same system  
In multiprocessing system executing processing called NUMA prefetch, when a prefetch instruction is issued to a prefetch unit, an address converter converts an address specified by an operand of...
6886080 Computing system for implementing a shared cache  
In a multi-threaded computing environment, a shared cache system reduces the amount of redundant information stored in memory. A cache memory area provides both global readable data and private...