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9043556 Optimizing a cache back invalidation policy  
A method, a system and a computer program product for enhancing a cache back invalidation policy by utilizing least recently used (LRU) bits and presence bits in selecting cache-lines for...
9043555 Single instance buffer cache method and system  
Provided is a method and system for reducing duplicate buffers in buffer cache associated with a storage device. Reducing buffer duplication in a buffer cache includes accessing a file reference...
9043533 Sizing volatile memory cache based on flash-based cache usage  
A method is used in sizing volatile memory (VM) cache based on flash-based cache usage. A user selection for a flash-based cache is received. Based on the selection, configuration and sizing...
9043530 Data storage within hybrid storage aggregate  
Among other things, one or more techniques and/or systems are provided for storing data within a hybrid storage aggregate comprising a lower-latency storage tier and a higher-latency storage tier....
9043551 Efficient processing of cache segment waiters  
For a plurality of input/output (I/O) operations waiting to assemble complete data tracks from data segments, a process, separate from a process responsible for the data assembly into the complete...
9043550 Adjustment of the number of task control blocks allocated for discard scans  
A controller receives a request to perform a release space operation. A determination is made that a new discard scan has to be performed on a cache, in response to the received request to perform...
9043507 Information processing system  
An information processing system includes a CPU that is connected to a bus; a device that is connected to the bus; a memory that is accessed by the CPU or the device; and a power mode control...
9043552 Systems and methods for operating a flash memory file system  
A flash memory file system including a plurality of flash modules. Each of the plurality of flash modules includes a respective cache memory, a respective flash memory, and a respective flash...
9037799 Rebuild of redundant secondary storage cache  
System and techniques for rebuilding a redundant secondary storage cache including a first storage device and a second storage device are described. A metadata entry indicative of a validity of a...
9035961 Display pipe alternate cache hint  
A system and method for efficiently allocating data in a memory hierarchy. A system includes a memory controller for controlling accesses to a memory and a display controller for processing video...
9037791 Tiered caching and migration in differing granularities  
For data processing in a computing storage environment by a processor device, the computing storage environment incorporating at least high-speed and lower-speed caches, and managed tiered levels...
9037806 Reducing store operation busy times  
A computer product for reducing store operation busy times is provided. The computer product includes a tangible storage medium readable by a processing circuit and storing instructions for...
9037504 System and method for an interactive shopping news and price information service  
A system and associated method for assisting a user to efficiently query for product information and promotional information available from electronic commerce websites over the Internet includes...
9037798 System and method of operating a computing device to perform memoization including transforming input/output parameters to reduce redundancies and efficiently cache data  
A system (200) and a method (100) of operating a computing device to perform memoization are disclosed. The method includes determining whether a result of a function is stored in a cache and, if...
9037797 Intelligent caching  
Intelligent caching includes defining a cache policy for a data source, selecting parameters of data in the data source to monitor, the parameters forming a portion of the cache policy, and...
9037800 Speculative copying of data from main buffer cache to solid-state secondary cache of a storage server  
A network storage server includes a main buffer cache to buffer writes requested by clients before committing them to primary persistent storage. The server further uses a secondary cache,...
9037803 Randomized page weights for optimizing buffer pool page reuse  
In general, the disclosure is directed to techniques for choosing which pages to evict from the buffer pool to make room for caching additional pages in the context of a database table scan. A...
9032151 Method and system for ensuring reliability of cache data and metadata subsequent to a reboot  
To ensure that the contents of a non-volatile memory device cache may be relied upon as accurately reflecting data stored on disk storage, it may be determined whether the cache contents and/or...
9032153 Use of flash cache to improve tiered migration performance  
For data processing in a computing storage environment by a processor device, the computing storage environment incorporating at least high-speed and lower-speed caches, and tiered levels of...
9032152 Cache miss detection filter  
Systems and methods are provided that facilitate cache miss detection in an electronic device. The system contains a probabilistic filter coupled to the processing device. A probing component...
9026731 Memory scheduling for RAM caches based on tag caching  
A system, method and computer program product to store tag blocks in a tag buffer in order to provide early row-buffer miss detection, early page closing, and reductions in tag block transfers. A...
9026737 Enhancing memory buffering by using secondary storage  
A method is used in enhancing memory buffering by using secondary storage. A buffer cache pool is supplemented with a secondary storage. A portion of a volatile memory of a data storage system is...
9026749 Data storage system having multi-bit memory device and on-chip buffer program method thereof  
Disclosed is an on-chip buffer program method for a data storage device which comprises a multi-bit memory device and a memory controller. The on-chip buffer program method includes measuring a...
9026732 Demoting partial tracks from a first cache to a second cache  
A determination is made of a track to demote from the first cache to the second cache, wherein the track in the first cache corresponds to a track in the storage system and is comprised of a...
9026739 Multimode prefetcher  
One or more lines of a cache are prefetched according to a first prefetch routine while training a prefetcher to prefetch one or more lines of the cache according to a second prefetch routine. In...
9026733 Content-based caching using a content identifier at a point in time  
Described are techniques for data processing and caching. In response to a client failing to retrieve contents of a data element from a cache location specified by a first data element identifier...
9026696 Using I/O track information for continuous push with splitter for storage device  
Methods and apparatus for eliminating the need for a complete synchronization due to failure of a data protection appliance in a continuous data protection system having a replication splitter. In...
9021186 Partial allocate paging mechanism using a controller and a buffer  
A memory system is provided. The system includes a controller that regulates read and write access to one or more FLASH memory devices that are employed for random access memory applications. A...
9021205 Page replacement in cache memory  
A mechanism for page replacement for cache memory is disclosed. A method of the disclosure includes referencing an entry of a data structure of a cache in memory to identify a stored value of an...
9021213 System and method for sharing media in a computer network  
A computerized method for sharing removable storage media in a network, the method comprising associating, in an index entry, a first piece of removable storage media in a first storage device...
9021176 Memory device and method with on-board cache system for facilitating interface with multiple processors, and computer system using same  
A memory device includes an on-board cache system that facilitates the ability of the memory device to interface with a plurality of processors operating in a parallel processing manner. The cache...
9021208 Information processing device, memory management method, and computer-readable recording medium  
An information processing device includes a memory and a processor coupled to the memory, wherein the processor executes a process comprising selecting data included in a same file as deletion...
9021201 Demoting partial tracks from a first cache to a second cache  
A determination is made of a track to demote from the first cache to the second cache, wherein the track in the first cache corresponds to a track in the storage system and is comprised of a...
9015415 Multi-processor computing system having fast processor response to cache agent request capacity limit warning  
An apparatus is described that includes a plurality of processors, a plurality of cache slices and respective cache agents. Each of the cache agents have a buffer to store requests from the...
9015420 Mitigate flash write latency and bandwidth limitation by preferentially storing frequently written sectors in cache memory during a databurst  
A method of operating a memory system is provided. The method includes a controller that regulates read and write access to one or more FLASH memory devices that are employed for random access...
9015722 Efficient cache reuse through application determined scheduling  
A method of determining a thread from a plurality of threads to execute a task in a multi-processor computer system. The plurality of threads is grouped into at least one subset associated with a...
9015423 Reducing store operation busy times  
A computer product for reducing store operation busy times is provided and relates to associating first and second platform registers with a cache array, determining that first and second store...
9015424 Write transaction management within a memory interconnect  
A memory interconnect between transaction masters and a shared memory. A first snoop request is sent to other transaction masters to trigger them to invalidate any local copy of that data they may...
9015414 Load balancing based upon data usage  
A method of load balancing can include segmenting data from a plurality of servers into usage patterns determined from accesses to the data. Items of the data can be cached in one or more servers...
9015418 Self-sizing dynamic cache for virtualized environments  
A method and system for self-sizing dynamic cache for virtualized environments is disclosed. The preferred embodiment self sizes unequal portions of the total amount of cache and allocates to a...
9009416 System and method for managing cache system content directories  
A method, computer program product, and computing system for reclassifying a first assigned cache portion associated with a first machine as a public cache portion associated with the first...
9009411 Flexible control mechanism for store gathering in a write buffer  
A store gathering policy is enabled or disabled at a data processing device. A store gathering policy to be implemented by a store buffer can be selected from a plurality of store gathering...
9009422 Information processing apparatus and interrupt control method  
A memory stores therein a program status word containing an address of data that is to be read when an interrupt process is executed. a processor determines whether or not the program status word...
9009406 Determining server write activity levels to use to adjust write cache size  
Provided are a computer program product, system, and method for determining server write activity levels to use to adjust write cache size. Information on server write activity to the cache is...
9009392 Leveraging a hybrid infrastructure for dynamic memory allocation and persistent file storage  
Dynamic allocation of memory in a hybrid system is provided. In particular, a method and system is provided to leverage a hybrid infrastructure for dynamic memory allocation and persistent file...
9009414 Prefetch address hit prediction to reduce memory access latency  
A prefetch unit receives a memory read request having an associated address for accessing data that is stored in memory. A next predicted address is determined in response to a prefetch address...
9009407 System and method for performing system memory save in tiered/cached storage  
In accordance with the present disclosure, a system and method for performing a system memory save in tiered or cached storage during transition to a decreased power state is disclosed. As...
9009420 Structure for performing cacheline polling utilizing a store and reserve instruction  
A design structure for performing cacheline polling utilizing a store and reserve instruction are disclosed. In accordance with one embodiment of the present invention, a first process initially...
9003118 Systems and methods for non-volatile cache control  
In some embodiments, a method for controlling a cache having a volatile memory and a non-volatile memory during a power up sequence is provided. The method includes receiving, at a controller...
9003119 Control apparatus and method, and storage apparatus  
In a storage apparatus, in the case where a data block to be written to a storage medium is a zero data block containing only zero data, a zero data information memory stores zero data...