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7620777 |
Method and apparatus for prefetching data from a data structure
A method, apparatus, and computer instructions for providing hardware assistance to prefetch data during execution of code by a process or in the data processing system. In response to loading of...
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7620776 |
Method, apparatus, and computer program product for a cache coherency protocol state that predicts locations of modified memory blocks
A method, apparatus, and computer program product are disclosed for reducing the number of unnecessarily broadcast remote requests to reduce the latency to access data from local nodes and to...
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7617377 |
Splitting endpoint address translation cache management responsibilities between a device driver and device driver services
Mechanisms for splitting responsibilities for communicating with an endpoint between a device driver and device driver services are provided. With these mechanisms, the device driver is responsible...
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7617367 |
Memory system including a two-on-one link memory subsystem interconnection
A memory system including a first memory subsystem having a buffer device with a first port and a second port, one or more memory devices coupled to the buffer device via the second port, and a...
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7617329 |
Programmable protocol to support coherent and non-coherent transactions in a multinode system
A system includes a scalability port switch (SPS) and a plurality of nodes. The SPS has a plurality of ports, each port coupled to a node. Each port is connected to a scalability port protocol...
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7616210 |
Memory apparatus and memory control method
A memory apparatus having first and second memories generates an address corresponding to input data, and compares an address corresponding to data stored in the second memory with the generated...
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7615857 |
Modular three-dimensional chip multiprocessor
A chip multiprocessor die supports optional stacking of additional dies. The chip multiprocessor includes a plurality of processor cores, a memory controller, and stacked cache interface circuitry....
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7614077 |
Persistent access control of protected content
A system for providing persistent access control of protected content is disclosed. The method on a client system includes sending a first request for authentication of the client to a server...
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7613884 |
Multiprocessor system and method ensuring coherency between a main memory and a cache memory
A directory of each node in a shared memory multiprocessor is made up of directory entries each including one or more directory bits indicating whether the cache memory of another node stores a...
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7613880 |
Memory module, memory system, and information device
A memory system including large-capacity ROM and RAM in which high-speed reading and writing are enabled is provided. A memory system including a non-volatile memory (CHIP 1 ), DRAM (CHIP 3 ), a...
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7613870 |
Efficient memory usage in systems including volatile and high-density memories
A first method for efficient memory usage includes (1) determining whether data retrieved from a first storage device is characterized as data that is primarily read; and (2) if data retrieved from...
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7613065 |
Multi-port memory device
In a multi-port memory device, a plurality of ports simultaneously access a plurality of banks through global data buses. A data conflict detector compares valid data signals input from the...
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7610448 |
Obscuring memory access patterns
For each memory location in a set of memory locations associated with a thread, setting an indication associated with the memory location to request a signal if data from the memory location is...
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7606994 |
Cache memory system including a partially hashed index
In one embodiment, a cache memory system includes a cache memory coupled to a cache controller. The cache memory controller may receive an address and generate an index value corresponding to the...
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7606977 |
Context save and restore with a stack-based memory structure
A multi-threaded processor adapted to couple to external memory comprises a controller and data storage operated by the controller. The data storage comprises a first portion and a second portion,...
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7606976 |
Dynamically scalable cache architecture
A technique for managing power consumption of a cache memory system dynamically adjusts the size of the cache memory system according to an energy level of an energy storage device. In at least one...
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7606975 |
Trace cache for efficient self-modifying code processing
A trace cache for efficient self-modifying code processing enables selective invalidation of entries of the trace cache, advantageously retaining some of the entries in the trace cache even during...
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7606974 |
Automatic caching generation in network applications
Automatic software controlled caching generations in network applications are described herein. In one embodiment, a candidate representing a plurality of instructions of a plurality of threads...
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7606167 |
Apparatus and method for defining a static fibre channel fabric
A storage area network and method for defining a static Fibre Channel Fabric that does not require a Principal Switch. The storage area network comprises one or more hosts, one or more storage...
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7603533 |
System and method for data protection on a storage medium
A method of and system for protecting a disk drive or other data storage includes mounting a virtual storage that combines a full access temporary storage and a READ-only portion of a main storage,...
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7603524 |
Method and apparatus for filtering snoop requests using multiple snoop caches
A method and apparatus for implementing a snoop filter unit associated with a single processor in a multiprocessor system. The snoop filter unit has a plurality of ports, each port receiving snoop...
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7603523 |
Method and apparatus for filtering snoop requests in a point-to-point interconnect architecture
A method and apparatus for supporting cache coherency in a multiprocessor computing environment having multiple processing units, each processing unit having one or more local cache memories...
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7603520 |
Record apparatus, record method, and program for writing data to optical disc in a second unit larger than a first unit
A record apparatus is disclosed. The record apparatus has a memory, a record section, and a record control section. The memory stores data in a first unit. The record section writes data to an...
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7603519 |
Storage system and method of controlling the same
A storage system which manages a plurality of storage control apparatus in an integrated manner is provided. An I/O request issued by a host apparatus to a second storage control apparatus is...
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7603510 |
Semiconductor device and storage cell having multiple latch circuits
A semiconductor storage device including a first latch circuit for latching stored data and a storage cell part including a plurality of second latch circuits that operate with inverted logic from...
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7600092 |
Configuration management apparatus and method
To migrate a configuration that an old storage device has to a new storage device. A new storage device obtains a configuration of an old storage device, by using a migration manager, and prepares...
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7600080 |
Avoiding deadlocks in a multiprocessor system
In one embodiment, the present invention includes a method for receiving a first memory request from a first caching agent associated with a first processor, in a home agent associated with a...
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7600076 |
Method, system, apparatus, and article of manufacture for performing cacheline polling utilizing store with reserve and load when reservation lost instructions
A method, system, apparatus, and article of manufacture for performing cacheline polling utilizing store and reserve and load when reservation lost instructions is disclosed. In one embodiment a...
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7596793 |
Smart event parser for autonomic computing
An autonomic event parser configured for association with a message adapter. An autonomic event parser can include a store of parsing rules, the parsing rules having a strategically specified...
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7594078 |
D-cache miss prediction and scheduling
A method and apparatus for D-cache miss prediction and scheduling is provided. In one embodiment, execution of an instruction in a processor is scheduled. The processor may have at least one...
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7594042 |
Effective caching mechanism with comparator coupled to programmable registers to store plurality of thresholds in order to determine when to throttle memory requests
A system includes a plurality of bus masters that generate direct memory access requests to access a protected memory device. Before granting the access, the system checks for memory protection...
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7591019 |
Method and system for optimization of anti-virus scan
A system and method for optimizing a process of synchronization of a database of files checked by an anti-virus (AV) application implemented as a special AV driver. The database is updated by a...
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7590884 |
Storage system, storage control device, and storage control method detecting read error response and performing retry read access to determine whether response includes an error or is valid
In a storage system, a disk device performs recovery and transfers read data to a control device, and the control device judges the validity of the recovery to prevent a transfer of erroneous data....
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7590845 |
Key cache management through multiple localities
A method for a plurality of key cache managers for a plurality of localities to share cryptographic key storage resources of a security chip, includes: loading an application key into the key...
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7590812 |
Apparatus, system, and method for archiving a log
An apparatus, system, and method are disclosed for archiving log data. In one embodiment, an allocation module allocates a plurality of log logical volumes in a storage pool for storing copies of...
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7590792 |
Cache memory analyzing method
It is done to read information containing an address of a memory at which a cache miss is generated, from a cache memory. The numbers of cache misses generated at each cache miss generated address...
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7587551 |
Virtual path storage system and control method for the same
Provided is a storage system having improved access performance. The storage system includes: a hard disk drive, and a storage controller for reading/writing data from/to the hard disk drive, the...
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7587515 |
Method and system for restrictive caching of user-specific fragments limited to a fragment cache closest to a user
A method, a system, an apparatus, and a computer program product are presented for a fragment caching methodology. Within the request path from a client to a server, a first computing device may...
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7581067 |
Load when reservation lost instruction for performing cacheline polling
A load when reservation lost instruction for performing cacheline polling is disclosed. Initially, a first process requests an action to be performed by a second process. The request is made via a...
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7581064 |
Utilizing cache information to manage memory access and cache utilization
In a method of utilizing cache metadata to optimize memory access, cache metadata associated with a set of cache locations is inspected by software. The cache metadata is analyzed to determine...
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7581063 |
Method, system, and program for improved throughput in remote mirroring systems
Disclosed is a method, system, and program for managing metadata in cache. A first policy is used to determine when to remove data from a primary cache, and a second policy is used to determine...
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7581025 |
System and method for synchronizing copies of data in a computer system
An improved synchronization system and method for copies of data in a computer system. The computer system comprises a cluster, wherein each computer in the cluster may store a local copy of a data...
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7580610 |
Hierarchical storage scheme and data playback scheme for enabling random access to realtime stream data
A hierarchical memory scheme capable of improving a hit rate for the segment containing the random access point rather than improving the overall hit rate of the cache, and a data playback scheme...
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7577797 |
Data processing system, cache system and method for precisely forming an invalid coherency state based upon a combined response
A cache coherent data processing system includes at least first and second coherency domains. The first coherency domain includes a system memory controller for a system memory and a first...
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7577795 |
Disowning cache entries on aging out of the entry
Portions of data in a processor system are stored in a slower main memory and are transferred to a faster memory comprising a hierarchy of cache structures between one or more processors and the...
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7577791 |
Virtualized load buffers
A memory addressing technique using load buffers is described. More particularly, embodiments of the invention relate to a method and apparatus for accessing data in a computer system by exploiting...
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7577790 |
Caching of dynamic arrays
Systems and methods are provided for caching dynamic arrays. According to one aspect, a cache memory device is provided for caching dynamic arrays or dynamic overlays. According to one embodiment,...
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7577690 |
Managing checkpoint queues in a multiple node system
Techniques are provided for managing caches in a system with multiple caches that may contain different copies of the same data item. Specifically, techniques are provided for coordinating the...
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7574564 |
Replacement pointer control for set associative cache and method
A set associative cache includes a plurality of sets, where each set has a plurality of ways. The set associative cache has a plurality of replacement pointers where each set of the plurality of...
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7574563 |
Method and system for efficient fragment caching
Methods for serving data include maintaining an incomplete version of an object at a server and at least one fragment at the server. In response to a request for the object from a client, the...
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