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7543273 |
Systems and methods for dynamic control of cache and pool sizes using a batch scheduler
The present invention provides users and processes with various features to control the memory usage by a cache and pool dynamically at runtime. The cache and pool can be initialized on demand to...
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7539818 |
Network object cache engine
The invention provides a method and system for caching information objects transmitted using a computer network. A cache engine determines directly when and where to store those objects in a memory...
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7539754 |
System for allocating storage performance resource
A method and structure for a multi-workload storage system is disclosed that is adapted to determine if an additional workload can be placed on the storage system. The invention has storage...
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7539822 |
Method and apparatus for facilitating faster execution of code on a memory-constrained computing device
One embodiment of the present invention provides a system that facilitates faster execution of code on a memory-constrained computing device that has fast on-chip RAM, wherein the fast on-chip RAM...
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7539840 |
Handling concurrent address translation cache misses and hits under those misses while maintaining command order
A method handles concurrent address translation cache misses and hits under those misses while maintaining command order based upon virtual channel. Commands are stored in a command processing unit...
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7536509 |
Method for fetching data from a non-volatile memory in an integrated circuit and corresponding integrated circuit
The method uses an integrated circuit comprising a processor ( 603 ), a non-volatile memory ( 602 ), especially a flash memory, a system clock and an interface ( 605 ), which is connected on the...
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7536528 |
Memory arrangement
A memory arrangement includes an interface configured to transmit, code and/or decode data in the form of data packets in accordance with a predefined protocol. The memory arrangement includes at...
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7536692 |
Thread-based engine cache partitioning
In general, in one aspect, the disclosure describes a processor that includes an instruction store to store instructions of at least a portion of at least one program and multiple engines coupled...
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7533238 |
Method for limiting the size of a local storage of a processor
A method for limiting the size of a local storage of a processor is provided. A facility is provided in association with a processor for setting a local storage size limit. This facility is a...
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7533234 |
Method and apparatus for storing compressed code without an index table
A method and apparatus is described herein for compressing a binary image in memory and decompressing a portion memory in response to a request, without using a compression index table to find...
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7533321 |
Fault tolerant encoding of directory states for stuck bits
A method of handling a stuck bit in a directory of a cache memory, by defining multiple binary encodings to indicate a defective cache state, detecting an error in a tag stored in a member of the...
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7529888 |
Software caching with bounded-error delayed update
In some embodiments, the invention involves a system and method relating to software caching with bounded-error delayed updates. Embodiments of the present invention describe a delayed-update...
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7529768 |
Determining which objects to place in a container based on relationships of the objects
An apparatus and method to analyze relationships of objects when all objects in combinations are required for the problem resolution to determine which objects to place in a container (cache) to...
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7529889 |
Data processing apparatus and method for performing a cache lookup in an energy efficient manner
A data processing apparatus and method are provided for performing a cache lookup in an energy efficient manner. The data processing apparatus has at least one processing unit for performing...
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7529759 |
System and method for batch operation of CMP beans
A method and system are provided for storing multiple instances of a CMP bean enrolled in a transaction by utilizing CMP batch operations to update multiple entries in a database table in one SQL...
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7525745 |
Magnetic disk drive apparatus and method of controlling the same
According to one embodiment, a magnetic disk drive apparatus includes a nonvolatile memory which serves as a cache memory when data is recorded in a magnetic disk which records data, a threshold...
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7526614 |
Method for tuning a cache
Embodiments of the present invention provide methods and systems for tuning the size of the cache. In particular, when a page fault occurs, non-resident page data is checked to determine if that...
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7526616 |
Method and apparatus for prefetching data from a data structure
A method, apparatus, and computer instructions for providing hardware assistance to prefetch data during execution of code by a process or in the data processing system. In response to loading of...
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7526607 |
Network acceleration and long-distance pattern detection using improved caching and disk mapping
A compression device recognizes patterns of data and compressing the data, and sends the compressed data to a decompression device that identifies a cached version of the data to decompress the...
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7523264 |
Apparatus, system, and method for dependent computations of streaming multiprocessors
An array of streaming multiprocessors shares data via a shared memory. A flushing mechanism is used to guarantee that data required for dependent computations is available in the shared memory.
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7523274 |
Data storage device and method using heterogeneous nonvolatile memory
A data storage device includes a memory block, a data classification unit, and a memory control unit. The memory block includes a high-speed nonvolatile memory and a low-speed nonvolatile memory,...
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7523265 |
Systems and arrangements for promoting a line to exclusive in a fill buffer of a cache
Systems and arrangements promoting a line from shared to exclusive in cache are contemplated. Embodiments include a cache controller adapted to determine whether a memory line for which the...
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7523259 |
Asynchronous read cache memory and device for controlling access to a data memory comprising such a cache memory
A cache memory includes a memory array comprising logic latches, and a circuit for reading the cache memory arranged for receiving a reference tag at input, comparing tags present in the cache...
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7523319 |
System and method for tracking changed LBAs on disk drive
When data changes in LBAs of a disk storage, the IDs of changed LBAs are written to a cache, with the LBAs being hashed to render a hash result. The hash result and contents of the cache are...
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7519776 |
Method and system for time-weighted cache management
Disclosed is a technique for managing memory items in a cache. An “age-lock” parameter is set to protect the newer memory items. When an incoming memory item (such as a history block header) is...
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7519772 |
Method of updating IC cache
A method of updating a cache in an integrated circuit is provided. The integrated circuit has the cache, a memory, a processor connected to the cache, and a memory interface connected to the cache,...
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7519771 |
System and method for processing memory instructions using a forced order queue
A novel system and method for processing memory instructions. One embodiment of the invention provides a method for processing a memory instruction. In this embodiment, the method includes...
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7519773 |
On-demand cache memory for storage subsystems
A cache on-demand module employing a cache performance module for managing size adjustments to a cache size of a cache memory in view of supporting an optimal performance of a storage subsystem...
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7516277 |
Cache monitoring using shared memory
A system and method to monitor caches of at least one Java virtual machine (“JVM”). A program is operated on the at least one JVM. Objects associated with the program are cached within a local...
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7516274 |
Power conservation via DRAM access reduction
Power conservation via DRAM access reduction is provided by a buffer/mini-cache selectively operable in a normal mode and a buffer mode. In the buffer mode, entered when CPUs begin operating in...
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7512753 |
Disk array control apparatus and method
A disk array control apparatus determines-whether or not a I/O process request from a host computer is causing a cache hit at a disk cache memory. The apparatus identifies the I/O process request...
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7512591 |
System and method to improve processing time of databases by cache optimization
A system and method are disclosed to improve processing time of a database system by continuous automatic background optimization of a cache memory that is fragmented into a plurality of cache...
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7512699 |
Managing position independent code using a software framework
A method for managing position independent code using a software framework is presented. A software framework provides the ability to cache multiple plug-in's which are loaded in a processor's...
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7512734 |
Adaptive storage system
A storage controller for a host device comprises a control module that receives data storing and data retrieving requests from the host device. A disk drive that is controlled by the control module...
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7509393 |
Method and system for caching role-specific fragments
A method, a system, an apparatus, and a computer program product are presented for a fragment caching methodology. After a message is received at a computing device, a fragment in the message body...
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7509460 |
DRAM remote access cache in local memory in a distributed shared memory system
In one embodiment, a memory controller for a node in a multi-node computer system comprises logic and a control unit. The logic is configured to determine if an address corresponding to a request...
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7509329 |
Technique for accelerating file deletion by preloading indirect blocks
A system and method for accelerating file deletion by preloading indirect blocks. When processing level 1 (L1) indirect blocks, the file server issues a read request for the next N indirect blocks...
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7509456 |
Apparatus and method for discovering a scratch pad memory configuration
The invention includes a method of debugging an embedded processor. Scratch pad memory of an embedded processor is accessed to form a configuration file characterizing the configuration of scratch...
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7506104 |
Packet processor memory interface with speculative memory reads
A mechanism receives memory reads and writes from a packet processing engine, each memory access having an associated packet identifier or sequence number. The mechanism is placed between a...
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7506102 |
Method and apparatus for local access authorization of cached resources
A method and apparatus is disclosed for local access authorization of cached resources. A first request to perform an operation on a first object that is stored in a cache is received. An entity...
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7502891 |
Storage management based on worklist
Systems and methods of storage management which are based on a worklist are described. The storage typically although not necessarily includes a faster access part and a slower access part. One of...
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7502877 |
Dynamically setting routing information to transfer input output data directly into processor caches in a multi processor system
According to some embodiments, IO traffic is transferred directly into a target processor cache in accordance with routing information.
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7502887 |
N-way set associative cache memory and control method thereof
The cache memory in the present invention is an N-way set-associative cache memory including a control register which indicates one or more ways among N ways, a control unit which activates the way...
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7500056 |
System and method to facilitate reset in a computer system
One disclosed embodiment may comprise a computer system that includes at least one processor having at least one cache. An interface includes an associated cache, the interface preloading the...
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7500055 |
Adaptable cache for dynamic digital media
A system and method are disclosed for eliminating many of the transactional performance limitations in current digital media server systems by augmenting those existing systems with an adaptable...
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7500057 |
Self-triggering outgoing buffers
A buffer output manager facilitates automatic self-triggering output of buffer contents. At least one processes writes control data to at least one buffer, the control data being such that a buffer...
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7496714 |
Method and system for adaptive back-off and advance for non-volatile storage (NVS) occupancy level management
A technique for determining when to destage write data from a fast, NVS of a computer system from an upper level to a lower level of storage in the computer system comprises adaptively varying a...
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7496642 |
Adaptive vicinity prefetching for filesystem metadata
Network latencies are reduced by detecting a metadata access call for filesystem metadata contained in a filesystem node of remotely located filesystem. The metadata corresponding to the metadata...
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7493445 |
Cache memory system and control method of the cache memory system
To improve the efficiency of access to a system memory associated with changes (writes) to cache data, a cache line having the same memory size as write data is selected and the write data is...
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7493446 |
System and method for completing full updates to entire cache lines stores with address-only bus operations
A method and processor system that substantially eliminates data bus operations when completing updates of an entire cache line with a full store queue entry. The store queue within a processor...
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