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6918020 |
Cache management
In one embodiment, a method is provided. The method of this embodiment may include determining whether requested data is stored in a memory. If the requested data is not stored in the memory, the...
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6918005 |
Method and apparatus for caching free memory cell pointers
A method and apparatus are provided for caching free cell pointers pointing to memory buffers configured to store data traffic of network connections. In one example, the method stores free cell...
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6915383 |
Receiver apparatus and method
In a DSM-CC receiver ( 12 ), a signal comprising a periodically repeated plurality of data sections is received. Storage means ( 14 ) is provided for caching the data sections included in the...
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6915385 |
Apparatus for unaligned cache reads and methods therefor
An apparatus and method for unaligned cache reads is implemented. Data signals on a system bus are remapped into a cache line wherein a plurality of data values to be read from the cache are output...
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6912645 |
Method and apparatus for archival data storage
Data storage techniques particularly well-suited for use in archival data storage are disclosed. In one aspect of the invention, a data block is processed to generate an address as a function of...
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6912636 |
System and method for providing safe data movement using third party copy techniques
Systems, methods, apparatus and software can utilize an indirect write driver to prevent possible error conditions associated with using a third-party copy operation directed at a storage resource....
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6910103 |
Caching data
A method of caching data is provided, which includes a plurality of processes 1602 to 1605 , a cache manager 813 and a data type register 805 including at least one data type 1901 and a...
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6907501 |
System for management of cacheable streaming content in a packet based communication network with mobile hosts
A cache handoff system for managing cacheable streaming content requested by a mobile node within a network architecture is disclosed. The network architecture includes a first subnet and a second...
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6907502 |
Method for moving snoop pushes to the front of a request queue
A method for prioritizing snoop pushes in a data processing system that schedules requests within a request FIFO. Each new request that is received is placed in the last position of the request...
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6907509 |
Automatic program restructuring to reduce average cache miss penalty
A method, a computer or computer program product for automatically restructuring a program having arrays in inner loops to reduce an average penalty incurred for bursty cache miss patterns by...
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6901495 |
Cache memory system allowing concurrent reads and writes to cache lines to increase snoop bandwith
A cache memory includes a plurality of memory chips, or other separately addressable memory sections, which are configured to collectively store a plurality of cache lines. Each cache line includes...
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6901589 |
System and method for determining a root cause of a failure
A system, comprising a receiving module to receive a request to load a component, a stack to record the request and a loader to fulfill the request, wherein when the request has been fulfilled the...
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6901587 |
Method and system of cache management using spatial separation of outliers
A method and a system of cache management using spatial separation of outliers. The system includes a dynamic compiler arranged to create compiled fragments of code having dominant code blocks and...
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6898690 |
Multi-tiered memory bank having different data buffer sizes with a programmable bank select
An apparatus having a core processor and a plurality of cache memory banks is disclosed. The cache memory banks are connected to the core processor in such a way as to provide substantially...
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6898675 |
Data received before coherency window for a snoopy bus
Where a null response can be expected from devices snooping a load operation, data may be used by a requesting processor prior to the coherency response window. A null snoop response may be...
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6898687 |
System and method for synchronizing access to shared resources
Resources may be shared between multiple controllers configured to access those resources by associating a portion of a semaphore shared memory region with each different shared resource. Whenever...
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6895473 |
Data control device and an ATM control device
A data control device capable of high-quality, high-efficiency control for speeding up data processing, thus permitting improvement of the throughput of a system. Attribute analyzing unit analyzes...
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6895471 |
Method and apparatus for synchronizing cache with target tables in a data warehousing system
A method and apparatus for processing (transporting) data, such as in a data warehouse system. In one embodiment, the data are received from a source and compared to data in a lookup cache...
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6892173 |
Analyzing effectiveness of a computer cache by estimating a hit rate based on applying a subset of real-time addresses to a model of the cache
A system and method for analyzing the effectiveness of a computer cache memory. A bus with memory transactions is monitored. A subset of addresses, along with associated transaction data, on the...
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6892278 |
Method and apparatus for efficiently implementing a last-in first-out buffer
One embodiment of the present invention provides a system that implements a last-in first-out buffer. The system includes a plurality of cells arranged in a linear array to form the last-in...
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6892285 |
System and method for operating a packet buffer
A technique for implementing a novel high-speed high-density packet buffer utilizing a combination of high-speed and low-speed memory devices. The novel packet buffer is organized as a plurality of...
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6892277 |
System and method for optimizing remote data content distribution
The present invention discloses a system and method for optimizing remote data distribution. A system and method for optimizing remote data includes receiving a request for content at a first...
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6889288 |
Reducing data copy operations for writing data from a network to storage of a cached data storage system by organizing cache blocks as linked lists of data fragments
In a network attached cached disk storage system, data is transmitted over the network in data packets having a data length that is much smaller than the logical block size for reading or writing...
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6889289 |
Method of distributed caching
A system and method for distributed cache. Cache tag storage and cache data storage are maintained in separate pipeline stages. Cache tag storage is operated by a data producer. Cache data storage...
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6889291 |
Method and apparatus for cache replacement for a multiple variable-way associative cache
A method and apparatus for cache replacement in a multiple variable-way associative cache is disclosed. The method according to the present techniques partitions a cache array dynamically based...
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6885378 |
Method and apparatus for the implementation of full-scene anti-aliasing supersampling
According to one embodiment, a computer system is disclosed. The computer system includes a graphics accelerator and a graphics cache coupled to the graphics accelerator. The graphics cache stores...
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6883066 |
Method and system for cache management algorithm selection
In a data storage device, a system of method of optimizing cache management. A method includes selecting a set of cache management algorithms associated with a predetermined pattern in a sequence...
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6882568 |
Memory system with improved efficiency of data transfer between host, buffer and nonvolatile memory
The present invention provides a memory system which contributes to improvement in efficiency of a data process accompanying a memory access. A memory system has a rewritable nonvolatile memory, a...
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6883067 |
Evaluation and optimization of code
A memory map evaluation tool is provided that organizes a program in a manner most compatible with use of a cache. The tool includes a method that involves executing a first version of the program...
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6880047 |
Local emulation of data RAM utilizing write-through cache hardware within a CPU module
In a processor module having a local software visible data memory and a write through cache connected to an external memory space external to the processor module over a bus, a method and apparatus...
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6880144 |
High speed low power bitline
A circuit for controlling a bitline during a memory access operation is provided. The circuit includes a plurality of sub-arrays with each sub-array having a plurality of memory cells. Each of the...
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6879998 |
Viewer object proxy
A method for increasing transfer quality between a content requestor and a content source on a content distribution system. The method involves determining transfer quality between the requestor...
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6880043 |
Range-based cache control system and method
The present invention relates to disk drive having a cache control system that generates scan results that permit response to a host command using existing cached data having a logical block...
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6880044 |
Distributed memory module cache tag look-up
One embodiment of a distributed memory module cache includes tag memory and associated logic implemented at the memory controller end of a memory channel. The memory controller is coupled to at...
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6877066 |
Method and system for adaptive caching in a network management framework using skeleton caches
A method, system, apparatus, and computer program product is presented for management of a distributed data processing system. A network management framework dynamically adapts database operations...
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6877070 |
Method and apparatus for implementing command queue ordering with benefit determination of prefetch operations
A method and apparatus are provided for implementing command queue ordering with benefit determination of a prefetch operation. For each command in a hard disk drive command queue, a rotational...
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6874035 |
System and methods for transforming data from a source to target platform using snapshot
The invention transforms source data from a source platform to a target platform with a single copy. A data request signal is communicated from the target platform to the source platform and a...
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6871102 |
Apparatus and method for verifying memory coherency of duplication processor
An apparatus for verifying memory coherency of a duplication processor having a symmetrical structure includes: an active processor in which a standby memory read command (SMRC) is generated and...
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6871259 |
File system including non-volatile semiconductor memory device having a plurality of banks
A flash memory includes a data bank having a plurality of banks, a merge bank, and an update data bank. A file system using the flash memory includes a unit storing update data corresponding to a...
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6871267 |
Method for increasing efficiency in a multi-processor system and multi-processor system with increased efficiency
A multi-processor system includes a system bus communicating between processors, and a bus arbiter. Responsive to a cache line invalidation command, a processor cache conditionally casts back the...
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6868450 |
System and method for a process attribute based computer network filter
A system and method for a process attribute based computer network filter assigns a process attribute to a process executing on a computing device and assigns a network attribute to a network...
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6868472 |
Method of Controlling and addressing a cache memory which acts as a random address memory to increase an access speed to a main memory
In a cache memory control method and computer of the present invention, a cache memory is connected to a main memory and divided into a plurality of cache blocks, and a lock/unlock signal is...
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6868484 |
Replacement data error detector
A cache includes an error circuit for detecting errors in the replacement data. If an error is detected, the cache may update the replacement data to eliminate the error. For example, a...
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6868483 |
Balanced access to prevent gateword dominance in a multiprocessor write-into-cache environment
In a multiprocessor data processing system including: a main memory; at least first and second shared caches; a system bus coupling the main memory and the first and second shared caches; at least...
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6865646 |
Segmented distributed memory module cache
One embodiment of a distributed memory module cache includes tag memory and associated logic implemented at the memory controller end of a memory channel. The memory controller is coupled to at...
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6865644 |
System and method for industrial controller with an I/O processor using cache memory to optimize exchange of shared data
A system and method for industrial control I/O forcing is provided. The invention includes a processor, shared memory and an I/O processor with cache memory. The invention provides for the cache...
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6862663 |
Cache having a prioritized replacement technique and method therefor
Briefly, in accordance with one embodiment of the invention, a method by which one or more ways of a cache may be locked so that they are not overwritten with data. Further, the ways of a cache...
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6862670 |
Tagged address stack and microprocessor using same
A tag address stack (TAS) for reducing the number of address latches and address comparators needed to insure data coherency in a pipelined microprocessor. The TAS is a small pool of address...
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6862662 |
High density storage scheme for semiconductor memory
A memory device comprising a compression and decompression engine and a error detection and correction engine connected between a cache memory and a main memory in the same semiconductor chip.
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6862660 |
Tag memory disk cache architecture
The present invention is embodied in the disk drive having a cache control system that is configured to efficiently respond to host commands by forming variable length segments of memory clusters...
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