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6967890 Battery power measuring system and method for a battery-backed SRAM  
A battery power measuring system for a Battery-Backed SRAM includes a nonvolatile memory ( 11 ), a clock ( 12 ), a CPU ( 10 ) and a buzzer ( 13 ). The nonvolatile memory is for storing a system...
6965968 Policy-based caching  
A policy-based cache manager, including a memory storing a cache of digital content, a plurality of policies, and a policy index to the cache contents, the policy index indicating allowable cache...
6965962 Method and system to overlap pointer load cache misses  
A computer implemented method of managing processor requests to load data items provides for the classification of the requests based on the type of data being loaded. In one approach, a pointer...
6964052 Caching output from an object in an application server environment  
A method and system of streaming a page of data are described. In one embodiment, an object corresponding to the page of data is allocated. The object is executed. If the object is a proxy, then...
6961822 Free memory manager scheme and cache  
Free memory can be managed by creating a free list having entries with address of free memory location. A portion of this free list can then be cached in a cache that includes an upper threshold...
6961788 Disk control device and control method therefor  
A disk control device of the present invention comprises a plurality of disk control units. Each disk control unit includes: at least one channel controller having an interface to a host computer;...
6961820 System and method for identifying and accessing streaming data in a locked portion of a cache  
A system and method are provided for efficiently processing data with a cache in a computer system. The computer system has a processor, a cache and a system memory. The processor issues a data...
6957305 Data streaming mechanism in a microprocessor  
This invention provides a dual usage cache reload buffer (CRB) to hold both demand loads as well as prefetch loads. A new form of a data cache block touch (DCBT) instruction specifies which level...
6957303 System and managing method for cluster-type storage  
The storage system is configured to expand from small to large configurations at a reasonable cost with performance decided approximately to a target system scale. The storage system has a...
6956507 Method and apparatus for morphing memory compressed machines  
A computer system having a main memory for storing data in a compressed format and a processor cache for storing decompressed data, a method for converting the data of said main memory from...
6957306 System and method for controlling prefetching  
Systems and methods that control prefetching are provided. In one embodiment, a system may include, for example, a prefetch buffer system coupled to a processing unit and to a memory. The prefetch...
6957317 Apparatus and method for facilitating memory data access with generic read/write patterns  
An apparatus and method facilitating memory data access with generic read/write patterns are described. In one embodiment, the method includes the detection, in response to a load instruction, of a...
6954768 Method, system, and article of manufacture for managing storage pools  
Provided are a method, system, and article of manufacture for pooling of storage. Volume attributes are assigned to a plurality of physical volumes. Pool attributes are assigned to a plurality of...
6952741 System and method for synchronizing copies of data in a computer system  
An improved synchronization system and method for copies of data in a computer system. The computer system comprises a cluster, wherein each computer in the cluster may store a local copy of a data...
6952712 Method and apparatus for distributing content data over a network  
A content distribution system includes plurality of cache server apparatus configured to obtain content from a distribution apparatus, and to store the content temporarily; a location information...
6952664 System and method for predicting cache performance  
A system and methods for simulating the performance (e.g., miss rate) of one or more caches. A cache simulator comprises a segmented list of buffers, with each buffer configured to store a data...
6950902 Cache memory system  
A cache memory system having a small-capacity and high-speed access cache memory provided between a processor and a main memory, including a software cache controller for performing software...
6950924 Passing decoded instructions to both trace cache building engine and allocation module operating in trace cache or decoder reading state  
A system and method of managing processor instructions provides enhanced performance. The system and method provide for decoding a first instruction into a plurality of operations with a decoder. A...
6950838 Locating references and roots for in-cache garbage collection  
A computer system providing hardware states for garbage collection including a plurality of processors, an object cache operatively connected to at least one of the plurality of processors, and a...
6947440 System and method for internet page acceleration including multicast transmissions  
A broadband communication system with improved latency is disclosed. The system employs distributed caching techniques to assemble data objects at locations proximate to a source to avoid latency...
6948035 Data pend mechanism  
A node comprises an interconnect, circuitry coupled to the interconnect and configured to initiate a transaction on the interconnect, and a control circuit coupled to provide a response to the...
6947052 Visual program memory hierarchy optimization  
In general, and in a form of the present invention, a method is provided for reducing execution time of a program executed on a digital system by improving hit rate in a cache of the digital...
6944721 Asynchronous non-blocking snoop invalidation  
A method and system for avoiding live locks caused by repeated retry responses sent from a first cache memory that is in the process of manipulating a cache line that a second cache memory is...
6944724 Method and apparatus for decoupling tag and data accesses in a cache memory  
One embodiment of the present invention provides a system that decouples a tag access from a corresponding data access within a cache memory. The system operates by receiving a memory request at...
6944714 Method and apparatus for saving microprocessor power when sequentially accessing the microprocessor's instruction cache  
An embodiment of the invention provides a circuit and method for reducing power in multi-way set associative arrays. A control circuit detects when the next cache access will be taken from the same...
6944711 Cache management method for storage device  
A cache management method disclosed herein enables optimal cache space settings to be provided on a storage device in a computer system where database management systems (DBMSs) run. Through the...
6944713 Low power set associative cache  
A processor having an L1 cache memory that may use a compare circuit to determine matches of stored tag information against an address and gate sense amps of the cache memory with a cache-hit signal.
6944720 Memory system for multiple data types  
A memory system is provided for storing multiple data types. The memory system includes a main memory, a local cache, and a translation unit. The local cache has multiple entries, each of which...
6941291 Method and device for a user profile repository  
A method and device for providing access, via a single point, to information stored on multiple data sources. One embodiment comprises a method in which first an interface (port) receives a call...
6941414 High speed embedded DRAM with SRAM-like interface  
The invention provides a simple interface circuit between a large capacity, high speed DRAM and a single port SRAM cache to achieve fast-cycle memory performance. The interface circuit provides...
6941432 Caching of objects in disk-based databases  
A data processing device (DPD) comprises a main memory (MM) and a processing means (PM). Data from a data base system (DBS) is stored as pages in the main memory (MM). During processing of the...
6938129 Distributed memory module cache  
One embodiment of a distributed memory module cache includes tag memory and associated logic implemented at the memory controller end of a memory channel. The memory controller is coupled to at...
6938126 Cache-line reuse-buffer  
A method, apparatus, and system that compares a current fetch request having a first start address and length associated with the current fetch request to a second start address of the next fetch...
6938252 Hardware-assisted method for scheduling threads using data cache locality  
A method is provided for scheduling threads in a multi-processor system. In a first structure thread ids are stored for threads associated with a context switch. Each thread id identifies one...
6937246 Cache invalidation method and apparatus for a graphics processing system  
A cache for a graphics system storing both an address tag and an identification number for each block of data stored in the data cache. An address and identification number of a requested block of...
6934813 System and method for caching data based on identity of requestor  
In a computer or microprocessor system having a plurality of resources making memory requests, a caching system includes a source tag generator which, depending on the embodiment, could reside in...
6933945 Design for a non-blocking cache for texture mapping  
A non-blocking cache for texture mapping is implemented by separating Cache Tags from Cache Data. Multiple requests for data may be processed in parallel without strict ordering or synchronization....
6934701 Using a stored procedure to access index configuration data in a remote database management system  
An index advisor specifies an optimal index configuration for use in performing workloads against a database managed by a database management system. If the database and database management system...
6931488 Reconfigurable cache for application-based memory configuration  
A computer system includes a cache memory a functional unit in communication with the cache memory, and a reconfiguration module. The functional unit executes applications using the cache memory....
6931505 Distributed memory module cache command formatting  
One embodiment of a distributed memory module cache includes tag memory and associated logic implemented at the memory controller end of a memory channel. The memory controller is coupled to at...
6931439 Modifying web page links for display on a mobile terminal to indicate the cache status of linked web pages  
A method of operating a mobile terminal comprising a local memory and a screen is disclosed. Web pages are received by the mobile terminal and stored in the local memory. A cache status of each web...
6928516 Image data processing system and method with image data organization into tile cache memory  
An image data processing system and method are disclosed in which image data is organized for fast and efficient transfer of image data to and from an image memory using a tile cache. Image data is...
6925579 Device and method for configuring a cache tag in accordance with burst length  
In a cache tag integrated on an SRAM with a memory cache, laser fuses are programmed to indicate which, if any, tag subarrays in the cache tag are not functioning properly. In addition, the burst...
6925533 Virtual disk image system with local cache disk for iSCSI communications  
A system and method for caching data received over a network connection comprising: a target device for receiving requests for routing data packetized for transport according to an Internet SCSI...
6925534 Distributed memory module cache prefetch  
One embodiment of a distributed memory module cache includes tag memory and associated logic implemented at the memory controller end of a memory channel. The memory controller is coupled to at...
6924810 Hierarchical texture cache  
A dynamically configurable portion of a cache shared between central processing and graphics units in a highly integrated multimedia processor is engaged as a secondary level in a hierarchical...
6924811 Circuit and method for addressing a texture cache  
A method of storing a texel in a texel cache comprising reading a t coordinate of the texel, the t coordinate comprising a plurality of bits, reading a s coordinate of the texel, the s coordinate...
6924812 Method and apparatus for reading texture data from a cache  
A texture data reading apparatus includes a cache memory including a plurality of read ports and a plurality of regions to store pixel texture data. An address comparator includes a plurality of...
6920477 Distributed, compressed Bloom filter Web cache server  
Compressed Bloom filters that act as a message as well as a data structure provide smaller false positive rates, reduced bits broadcast and/or reduced computational overhead in distributed Web...
6920533 System boot time reduction method  
A system and method to reduce the time for system initializations is disclosed. In accordance with the invention, data accessed during a system initialization is loaded into a non-volatile cache...