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7620753 Lockless access to a ring buffer  
A reader and writer access a ring buffer without using a locking mechanism, thereby avoiding any delays attendant to using a locking mechanism when performing read operations to supply the reader...
7620752 Circuit for and method of processing data input to a first-in first-out memory  
A method of processing data input to a first-in first-out memory is disclosed. The method comprises steps of receiving input data words from a pipeline stage at an input of the first-in first-out...
7620750 Time budgeting by determining status of a streaming buffer during an autonomous non-data transfer operations in drive units  
Between data accesses to a storage medium, requested by an initiator, a logical unit may need to perform autonomous operations. The logical unit receives information from the initiator to allow the...
7620038 Using hot swap logic in a communication system  
Methods and systems are provided for providing hot swapability of TSIs in a TDM system using FPGA hot swap logic. The hot swap logic is used to provide isolation for the TSIs from a system TDM bus...
7617332 Method and apparatus for implementing packet command instructions for network processing  
A method, apparatus and computer program product are provided for implementing packet command instructions for network processing. A set of packet commands is provided. Each packet command defines...
7613887 System and method for managing a memory storage device  
A memory management system for a memory in a data storage device comprises a memory controller module that receives a frame of data including a plurality of data words from a host, that generates...
7613853 Output buffer circuit capable of synchronous and asynchronous data buffering using sensing circuit, and method and system of same  
An improved output buffer having single ended as well as differential signaling capabilities, providing symmetrical outputs for differential output configurations for both synchronous and...
7613852 Block modeling input/output buffer having first and second block of block diagram for passing a plurality of data between said first and second blocks  
In one embodiment, a data element is passed between a first block and a second block of a block diagram during execution of the block diagram. The first block and the second block negotiate use of...
7613849 Integrated circuit and method for transaction abortion  
An integrated circuit includes processing modules and an interconnect device for coupling the processing modules and for enabling a device-level communication based on transactions between the...
7610420 Data aggregation-distribution apparatus, date transmission system and method thereof  
A data aggregation-distribution apparatus includes a plurality of port route units and a data processing unit. Every port route unit has a sending buffer and a receiving buffer. The data processing...
7610415 System and method for processing data streams  
A system and method of transferring characters from a first device through a buffer memory to a second device. A descriptor is read and a buffer address and a buffer length are extracted from the...
7606993 Flash memory controller, memory control circuit, flash memory system, and method for controlling data exchange between host computer and flash memory  
A controller included in a flash memory system, which can be applied to a memory interface of a host computer is disclosed. A buffer is used for data exchange operation between the host computer...
7606954 Data storage using compression  
A write request is received from a host, to write data from memory to storage. The request indicates whether or not to compress the data. The data is either compressed or not compressed, as...
7606951 Memory reuse for multiple endpoints in USB device  
In a system in which individual memory banks may be under individual power control, a subsequent need for a memory bank that is currently in a low power state may be anticipated, so that the memory...
7606944 Dynamic input/output optimization within a storage controller  
A system and method for optimizing accesses to storage devices based on RAID I/O request characteristics is disclosed. A current I/O request processed by a storage controller is analyzed for...
7606251 Method, system, and computer program product for reducing network copies by port-based routing to application-specific buffers  
A method, system, and computer program product for delivering data, received from a network on a network adapter to a pre-assigned port, to a storage buffer assigned to an application are...
7603517 Disk storage device and cache control method for disk storage device  
A disk storage device stores write data in a cache area of a data buffer according to a write command from a host, reports write completion to the host, and then writes the write data in the cache...
7603496 Buffering data during data transfer through a plurality of channels  
A buffer is disclosed for storing data being transferred using a plurality of control channels, a data item of said data being transferred between a data source and a data destination using one of...
7603495 Method of and device for changing an output rate  
This invention relates to a method and system for changing an output rate of information for a buffer ( 3 ) with a constant first output rate (R 1 ) which receives output data from a data source (...
7603487 Hardware configurable hub interface unit  
A data transfer apparatus with hub and ports includes design configurable hub interface units (HIU) between the ports and corresponding external application units. The configurable HIU provides a...
7603429 Network adapter with shared database for message context information  
A network interface adapter includes a network interface and a client interface, for coupling to a client device so as to receive from the client device work requests to send messages over the...
7596646 Wireless USB host apparatus supporting UWB  
A wireless USB host apparatus supporting UWB is disclosed. The wireless USB host apparatus allocates a Media Access Slot of USB super frame to each of a plurality of wireless USB devices to...
7596643 Storage subsystem with configurable buffer  
A storage subsystem includes a variable-size write buffer that temporarily stores write data received from a host system. The storage subsystem is capable of adjusting the size of the write buffer...
7596627 Methods and apparatus for network congestion control  
Methods and apparatus are provided for controlling congestion in a network such as a fibre channel network. Techniques are provided for characterizing traffic flow at a congested network node. The...
7594048 Determining transit time across an asynchronous FIFO memory by measuring fractional occupancy  
Measuring transit time across an asynchronous first-in-first-out (FIFO) memory can include sampling an indication of a value of a read pointer of the FIFO memory at a sampling frequency that...
7594047 Buffer circuit  
Systems, devices, and methods, including logic and/or executable instructions are described in connection with a buffer circuit. One buffer circuit includes a flip-flop based first-in first-out...
7594046 Data processing in which concurrently executed processes communicate via a FIFO buffer  
A processing circuit executes a data producing process and a data consuming process. The data producing process produces a stream of data, the data consuming process consumes the stream of data...
7594042 Effective caching mechanism with comparator coupled to programmable registers to store plurality of thresholds in order to determine when to throttle memory requests  
A system includes a plurality of bus masters that generate direct memory access requests to access a protected memory device. Before granting the access, the system checks for memory protection...
7594023 Data carousel receiving and caching  
Data objects are sent using a data carousel and forward error correction. This involves segregating a file into groups, wherein each group represents k data blocks. From the k data blocks of each...
7590789 Optimizing clock crossing and data path latency  
In one embodiment, the present invention includes a method for transmitting a predetermined data pattern from a first agent to a second agent of an interface, receiving an indication of correct...
7590778 Using operation codes to control a decoder's use of a buffer to generate data from an input data stream into an output data stream  
Provided are a method, system, and article of manufacture for using operation codes to control a decoder's use of a buffer to generate data from an input data stream into an output data stream. An...
7590777 Transferring data between system and storage in a shared buffer  
Provided are a method, system, and program for transferring data between system and storage in a shared buffer. An application requests a buffer from a component. The component allocates a buffer...
7590152 Router-based monitoring of EF-on-EF jitter  
A system for monitoring EF-on-EF jitter in a network node having an EP output queue into which EF packets are entered comprises a first counter that counts the packets entering the queue and also a...
7587532 Full/selector output from one of plural flag generation count outputs  
A method and apparatus for adaptive buffer sizing adjusts the size of the buffer at different levels using a “high water mark” to different levels for different system conditions. The high...
7587255 Software and process for play-cursor calculation  
A process and software for achieving minimal latency in digital audio playback, which includes calculating a repeatable play cursor lead and a play cursor position and writing audio data at the...
7584312 Data processing apparatus having improved buffer management  
A data processing apparatus stops a supply of data to a buffer when the buffer becomes full, and thereafter performs processing such as moving to a low-power mode and switching execution tasks. The...
7584311 Elasticity buffer restarting  
An elasticity buffer has a reset input that, when activated, causes the elasticity buffer to temporarily cease operation. When the reset input bit is released, the elasticity buffer may resume...
7581076 Methods and devices for treating and/or processing data  
At the inputs and/or outputs, memories are assigned to a reconfigurable module to achieve decoupling of internal data processing and in particular decoupling of the reconfiguration cycles from the...
7581071 Apparatus for and method of processing information, and program  
When an information processing apparatus is turned on, startup processes for an HDD and a DVD are started. When the startup process for the HDD is finished, the information processing apparatus...
7581045 Method, system, and article of manufacture for mapping programming interfaces  
Provided are a method, system, and article of manufacture for mapping programming interfaces. A synchronous request for reading data is received. An asynchronous request to fill selected buffers of...
7581044 Data transmission method and system using credits, a plurality of buffers and a plurality of credit buses  
A data flow management system and method in which the application and its clients are made aware of the available credits for each type of transfer before the transfer is attempted. This enables...
7581043 Dynamic buffer size allocation for multiplexed streaming  
A method and disc drive are disclosed that employ dynamic buffer size allocation for handling multiple data streams, such as time-sensitive audio/video data. The method involves allocating a...
7581042 I/O hub resident cache line monitor and device register update  
The apparatus and method described herein are for enabling cacheable writes to I/O device registers. A cache monitor, which may be present in a controller hub, monitors accesses to cache lines in a...
7581041 Methods and apparatus for high-speed serialized data transfer over network infrastructure using a different protocol  
An apparatus for transmitting data across a high-speed serial bus includes an IEEE 802.3-compliant PHY having a GMII interface; an IEEE 1394-compliant PHY in communication with the IEEE...
7574635 Circuit for and method of testing a memory device  
Circuit and methods for testing a memory device are disclosed. According to one aspect of the invention, a circuit for testing an asynchronous data transfer comprises a first circuit receiving a...
7574538 Contiguous I/O command queuing within a data storage device  
In a data storage system having a drive I/O command queue associated with a data storage device, contiguous I/O requests of at least a predetermined size may be processed in a pipeline mode of...
7571284 Out-of-order memory transactions in a fine-grain multithreaded/multi-core processor  
A method and apparatus for implementing out-of-order memory transactions in a multithreaded, multicore processor. In the present invention, circular queue comprising a plurality of queue buffers is...
7570727 Data transmission controller and sampling frequency converter  
In a data transmission controller apparatus, a first-in first-out storage stores newly inputted data in response to a write request signal, and reads and outputs the stored data which has been...
7570534 Enqueue event first-in, first-out buffer (FIFO)  
In one embodiment, an apparatus comprises a queue, write control logic coupled to the queue and operable in a write clock domain, and a first-in, first-out buffer (FIFO) coupled to the write...
7568057 Method and apparatus for maintaining synchronization of audio in a computing system  
A new audio playback architecture may be used, which allows the use of much larger buffering than that used by a typical audio subsystem in a computing system to improve power efficiency of the...