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8145805 |
Method for re-sequencing commands and data between a master and target devices utilizing parallel processing
Re-sequencing commands and data between a master and slave device utilizing parallel processing is disclosed. When utilizing parallel processing while reading and writing data, there is a chance...
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8145806 |
Storage-side storage request management
Techniques are provided for managing, within a storage system, the sequence in which I/O requests are processed by the storage system based, at least in part, on a one or more logical...
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8140348 |
Method, system, and program for facilitating flow control
Disclosed is a technique for flow control. It is detected that a work request is being transferred to an in-memory structure. A maximum limit is compared with a number of work requests stored in...
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8131889 |
Command queue for peripheral component
In an embodiment, a peripheral component configured to control an external interface of an integrated circuit. For example, the peripheral component may be a memory interface unit such as a flash...
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8108573 |
Apparatus, system, and method for enqueue prioritization
An apparatus, system, and method are disclosed for enqueue prioritization. The apparatus for enqueue prioritization is provided with a plurality of modules configured to functionally execute the...
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8108571 |
Multithreaded DMA controller
A channel-less system and method are provided for multithreaded communications with a direct memory access (DMA) controller. The method accepts a plurality of DMA command messages directed to a...
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8099562 |
Scalable interface for a memory array
A technique for accessing a memory array includes receiving, from multiple requesters, memory access requests directed to a single port of the memory array. The memory access requests associated...
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8078764 |
Method for switching I/O path in a computer system having an I/O switch
The physical server includes a hypervisor for managing an association between the virtual server and the I/O device allocated to the virtual server. The I/O switch includes: a setting register for...
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8055816 |
Memory controllers, memory systems, solid state drives and methods for processing a number of commands
The present disclosure includes methods and devices for a memory controller. In one or more embodiments, a memory controller includes a plurality of back end channels, and a command queue...
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8041902 |
Direct memory move of multiple buffers between logical partitions
A method, apparatus and program product are provided for moving data from a source memory zone to a target memory zone of a computer. A source host operating system invokes a synchronous multiple...
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8032688 |
Micro-tile memory interfaces
In one embodiment of the invention, a memory integrated circuit is provided including an address decoder to selectively access memory cells within a memory array; a mode register with bit storage...
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8031606 |
Packet switching
In an embodiment, an apparatus is provided that may include an integrated circuit including switch circuitry to determine, at least in part, an action to be executed involving a packet. This...
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8024498 |
Transitions between ordered and ad hoc I/O request queueing
Disclosed is a computer implemented method and apparatus for queuing I/O requests to a pending queue. The I/O device driver sets a maximum ordered queue length for an I/O device driver coupled to a...
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8024489 |
System for communicating command parameters between a processor and a memory flow controller
A system for communicating command parameters between a processor and a memory flow controller is provided. The system makes use of a channel interface as the primary mechanism for communicating...
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8019902 |
Network adapter with shared database for message context information
A network interface adapter includes a network interface and a client interface, for coupling to a client device so as to receive from the client device work requests to send messages over the...
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8019918 |
Information processing apparatus requesting registration with peripheral
In a system in which an information processing apparatus and a peripheral are connected to each other. Initially, the information processing apparatus transmits, to the peripheral, a request to use...
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8019914 |
Disk drive implementing shared buffer memory with reduced interrupt latency
A disk drive is disclosed having a disk, a head actuated over the disk, a buffer memory for storing control routine op codes and control routine data, and a microprocessor for receiving the control...
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8019912 |
Blade center USB locking
A computer-implemented method, system and computer program product for managing USB ports on blades in a blade center are presented. A set of remotely-transmitted instructions causes a multiplexer...
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8010719 |
Virtual machine system
Arbitration of IO accesses and band control based on the priority of virtual servers is enabled while curbing performance overhead during IO sharing among the virtual servers. A virtual machine...
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8006003 |
Apparatus, system, and method for enqueue prioritization
An apparatus, system, and method are disclosed for enqueue prioritization. The apparatus for enqueue prioritization is provided with a plurality of modules configured to functionally execute the...
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8006000 |
Bridge, processor unit, information processing apparatus, and access control method
There is provided a technique of accessing a memory of a processor from a peripheral device, thereby the security is ensured while efficiency is being pursued. An address converter 14 includes an...
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7970977 |
Deadlock-resistant bus bridge with pipeline-restricted address ranges
A method of bridging a plurality of buses within a bus bridge can include determining whether a queue of the bus bridge includes a transaction request directed to a restricted address range and,...
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7966481 |
Computer system and method for executing port communications without interrupting the receiving computer
A microprocessor system in which an array of processors communicates more efficiently through the use of a worker mode function. Processors that are not currently executing code remain in an...
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7958510 |
Device, system and method of managing a resource request
Embodiments of the present invention provide a resource management mechanism to monitor the availability of resources, detect the cause of a rejection, distinguish between different types of...
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7937503 |
Apparatus for maintaining a limit value of a resource
An apparatus for maintaining a limit value of a resource for use in a concurrent limit checking system comprising: a resource having an associated limit value; a plurality of request handlers...
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7930457 |
Channel mechanisms for communicating with a processor event facility
Mechanisms for communicating with a processor event facility are provided. The mechanisms make use of a channel interface as the primary mechanism for communicating with the processor event...
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7925796 |
Methods, systems, and computer program products for performing an input/output (I/O) operation that includes a virtual drain
Methods, systems, and computer program products for performing an input/output (I/O) operation that includes a virtual drain. According to one aspect, the subject matter described herein includes a...
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7908434 |
Raid apparatus, cache management method, and computer program product
A cache managing unit creates a list of elements corresponding to each data block arranged based on a priority of writing data blocks to a magnetic disk apparatus, and when a group of elements...
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7899920 |
Network apparatus capable of handling reservation commands
A network apparatus is provided that is capable of requiring a reservation for an access right to a peripheral device that is not yet connected to the network apparatus from one of the terminals on...
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7870334 |
Distributed task queues in a multiple-port storage system
A storage system, consisting of one or more data storage logical units (LUs) formed in physical media. The LUs are adapted to receive command and respond to the commands to store and recall data....
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7869459 |
Communicating instructions and data between a processor and external devices
A mechanism for communicating instructions and data between a processor and external devices are provided. The mechanism makes use of a channel interface as the primary mechanism for communicating...
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7861042 |
Processor acquisition of ownership of access coordinator for shared resource
A processor of an apparatus in an example upon a failure of an earlier attempt to directly acquire ownership of an access coordinator for a resource shared with one or more additional processors,...
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7853735 |
Efficient processing of groups of host access requests that may include zero length requests
This is directed to methods and systems for handling access requests from a device to a host. The device may be a device that is part of the host, such as an HBA, an NIC, etc. The device may...
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7844758 |
Dynamic resource allocation scheme for efficient use of a queue
A method and mechanism for managing requests to a resource. A request queue receives requests from multiple requestors and maintains a status for each requestor indicating how many requests the...
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7840737 |
Data processor and semiconductor integrated circuits
This invention provide a data processor capable of multiplexing data transfers with desired data transfer characteristics guaranteed, without multiplexing buses. The data processor includes: a...
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7840751 |
Command queue management of back watered requests
Apparatus and method for command queue management of back watered requests. A selected request is released from a command queue, and further release of requests from the queue is interrupted when a...
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7840720 |
Using priority to determine whether to queue an input/output (I/O) request directed to storage
Provided are a method, system, and article of manufacture for using priority to determine whether to queue an Input/Output (I/O) request directed to storage. A maximum number of concurrent requests...
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7822885 |
Channel-less multithreaded DMA controller
A channel-less system and method are provided for multithreaded communications with a direct memory access (DMA) controller. The method accepts a plurality of DMA command messages directed to a...
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7805549 |
Transfer apparatus and method
There is provided a transfer apparatus having a bridge that transfers a transaction between a first and a second bus, and a data transfer unit that performs a data transfer by DMA between the first...
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7797468 |
Method and system for achieving fair command processing in storage systems that implement command-associated priority queuing
In certain, currently available data-storage systems, incoming commands from remote host computers are subject to several levels of command-queue-depth-fairness-related throttles to ensure that all...
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7797699 |
Method and apparatus for scheduling virtual machine access to shared resources
A method for managing IO requests from a virtual machine to access IO resources on a physical machine includes determining a request priority associated with an IO request. The IO request is placed...
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7778271 |
Method for communicating instructions and data between a processor and external devices
A method for communicating instructions and data between a processor and external devices are provided. The method makes use of a channel interface as the primary mechanism for communicating...
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7779179 |
Interface controller, method for controlling the interface controller, and a computer system
An interface controller is connected to a host apparatus and a memory, and receiving multiple responses to one request. The interface controller includes a packet generation unit which adds header...
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7774356 |
Method and apparatus for application state synchronization
A method and an apparatus that synchronize an application state in a client with a data source in a backend system in an asynchronous manner are described. A response is sent to the client based on...
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7774517 |
Information processing apparatus having an access protection function and method of controlling access to the information processing apparatus
An information processing apparatus according to an embodiment of the present invention includes: a CPU; a plurality of peripheral devices connected to the CPU through a bus; and a peripheral...
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7769909 |
Device and method for access time reduction by speculatively decoding non-memory read commands on a serial interface
An apparatus and method of speculatively decoding non-memory read commands. A command register and decoder, within the apparatus, compares high-order command bits provided on a serial bus with...
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7752411 |
Chips providing single and consolidated commands
In some embodiments, a chip includes a link interface, monitoring circuitry to provide an activity indicator that is indicative of activity of the chip, and scheduling circuitry to schedule...
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7734854 |
Device, system, and method of handling transactions
Some embodiments include, for example, devices, systems, and methods of handling transactions. In some demonstrative embodiments, an apparatus to handle transactions in a computing system may...
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7730279 |
System for limiting the size of a local storage of a processor
A system for limiting the size of a local storage of a processor is provided. A facility is provided in association with a processor for setting a local storage size limit. This facility is a...
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7725623 |
Command transfer controlling apparatus and command transfer controlling method
Commands received from an apparatus that does not support virtual channels are assigned to a virtual channel. A command receiver 210 receives, from an external command transmitting entity that does...
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