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7353316 System and method for re-routing signals between memory system components  
A plurality of memory modules used in a computer system each include a memory hub that is connected to a plurality of memory devices. The memory modules are connected to each other in series so...
7350015 Data transmission device  
A data transmission device forwards data that have been received from a first device, intended for a second device, to the second device. The data transmission device is distinguished in that it...
7346729 Peripherals of computer  
A peripheral for notifying a USB-connected upper apparatus of a device descriptor and allowing the upper apparatus to specify a communication partner destination by the function information shown...
7346722 Apparatus for use in a computer systems  
Apparatus for use in a computer system comprises a bus architecture, a plurality of modules connected to the bus architecture, at least one module being latency tolerant and at least one module...
7343440 Integrated circuit with a scalable high-bandwidth architecture  
An integrated circuit component is provided comprising logic capable of being configured to interface with a first companion integrated circuit and to receive information that is communicated from...
7340167 Fibre channel transparent switch for mixed switch fabrics  
A method and a Fibre Channel switch element are provided that allows communication between a host system and a target device attached to a proprietary switch fabric in a network. The Fibre Channel...
7340556 Signal switch for console and peripheral devices  
A signal switch for sharing a video monitor, a plurality of console devices compliant with an industry standard and one or more than one peripheral device in any of a plurality of computer...
7340557 Switching method and system for multiple GPU support  
A system and method for supporting multiple graphics processing units (GPUs) includes a first communication path coupled to a root complex device and a first connection point of a first GPU. A...
7337258 Dynamically allocating devices to buses  
Devices are assigned to different buses at development time as well as dynamically during operation, based on actual performance. At development time, bus assignment can be determined based on...
7334075 Managing transmissions between devices  
Provided are a method, system, and program for processing a transmission from a first device to a second device. An identification transmission is received including an interface address from the...
7334071 Expansion of cross-domain addressing for PCI-express packets passing through non-transparent bridge  
A PCI-Express compatible switch is provided with two or more, internal virtual buses. In one embodiment, at least one of the plural virtual buses is designated as a special bus that is limited to...
7328298 Apparatus and method for controlling I/O between different interface standards and method of identifying the apparatus  
According to the present invention, an input/output controller connected between an interface connection port of an information processing apparatus and a network device so as to connect the...
7315914 Systems and methods for managing virtualized logical units using vendor specific storage array commands  
Systems and methods are provided for executing a vendor specific command in a storage area network including a plurality of data storage volumes and at least one host. In one embodiment, a system...
7310694 Reducing information reception delays  
A technique for reducing information reception delays is provided. The technique reduces delays that may be caused by protocols that guarantee order and delivery, such as TCP/IP. The technique...
7308523 Flow-splitting and buffering PCI express switch to reduce head-of-line blocking  
An enhanced Peripheral Component Interconnect Express (PCIe) switch eliminates or reduces head-of-line blocking for memory reads initiated by peripheral endpoint devices. A memory-read request...
7305494 Multiplexed computer peripheral device connection switching interface  
A multiplexed computer peripheral device connection switching interface is proposed, which is designed for use with a clustering computer system equipped with a plurality of independent processing...
7305511 Providing both wireline and wireless connections to a wireline interface  
In one embodiment, a system for providing both wireline and wireless connections to a wireline interface includes a first wireline interface, a second wireline interface, a wireless interface, and...
7305512 Programme-controlled unit with crossbar employing a diagnostic port  
A programme-controlled unit comprises a crossbar with a multiplicity of ports, a multiplicity of devices which are connected to the ports of the crossbar and can exchange data via the crossbar,...
7296105 Method and apparatus for configuring an interconnect to implement arbitration  
Various methods and apparatuses are described in which an interconnect couples to a plurality of initiator network resources and a plurality of target network resources. The interconnect may...
7290075 Performing arbitration in a data processing apparatus  
An apparatus for arbitration within a data processing apparatus between a plurality of transfers to be routed over a corresponding plurality of paths provided by an interconnect circuit. The...
7287114 Simulating multiple virtual channels in switched fabric networks  
Methods and systems, including computer program products, implementing techniques for receiving, at a first device of a switched fabric network, requests from one or more applications, each...
7284082 Controller apparatus and method for improved data transfer  
Embodiments of the invention include a controller apparatus, system and method for transferring data between data storage devices within a computer system. The inventive controller apparatus...
7269679 PCI-X error correcting code (ECC) pin sharing configuration  
A method is provided for utilizing four error correcting code (ECC) pin connections of a PCI/PCI-X bus for one of Grant (GNT) and Request (REQ) pin connections. The method determines a mode of the...
7260688 Method and apparatus for controlling access to memory circuitry  
Method and apparatus for controlling access to memory circuitry is described. In one example, access to the memory circuitry is controlled among a plurality of bus interfaces of a data processing...
7260613 Storage system, disk control cluster including channel interface units, disk interface units, local shared memory units, and connection portions, and a method of increasing of disk control cluster  
In a storage system in which: LSW 110 is a local switch, GSW 115 is a global switch, and 21 is a global shared memory unit; when a host computer 3 makes a data read request to a disk control...
7251704 Store and forward switch device, system and method  
Disclosed are a system and method for forwarding data packets from ingress ports to egress ports on a switch. A forwarding circuit may commence forwarding data packets from an ingress port through...
7246189 Method and apparatus for enhancing universal serial bus  
A system for enhancing universal serial bus (USB) applications comprises an upstream processor, a downstream processor and a main controller. The upstream processor accepts standard USB signals...
7245606 Switching device comprising a common voltage reference path  
The invention relates to a switching device comprising a plurality of inputs and outputs which are interconnected by an interconnection point matrix for transmitting electric signals supplied from...
7243180 Semiconductor memory device with bus driver circuit configured to transfer an output on a common bus onto an output bus with inversion or no inversion  
A semiconductor memory device includes first to third data buses, and first and second connection circuits. The first connection circuit inverts and transfers a first output signal on the first...
7240175 Scheduling data frames for processing: apparatus, system and method  
A scheduler in, for example, an off-load engine reports events for processing data frames to processing engines. Each event to report has associated to it an event information to report to a...
7237054 Switching interfaces in external disk drives  
In an external disk drive system comprising a disk drive, a bridge controller comprising a plurality of Bridge Controller Host (BCH) interfaces adapted to establish communication between the...
7234011 Advanced microcontroller bus architecture (AMBA) system with reduced power consumption and method of driving AMBA system  
In an advanced microcontroller bus architecture (AMBA) system with reduced power consumption, a signal transition is allowed to occur only in loads required for transferring bus signals by...
7234015 PCIXCAP pin input sharing configuration for additional use as PCI hot plug interface pin input  
A method is provided for selectively using a PCIXCAP pin input to detect PCI/PCI-X bus mode or as DC pin input. The method provides a PCI/PCI-X device having PCIXCAP pin input, and a circuit...
7231478 Programmed access latency in mock multiport memory  
A computer memory arrangement comprises a first plurality of input port facilities (17–19) that are collectively coupled through a first router facility (32) to selectively feed a second plurality...
7231469 Disk controller  
A disk controller has a channel adapter having a connection interface to a host computer or a disk drive; a memory adapter for temporarily storing data to be transferred between the host computer...
7225281 Multiprocessor infrastructure for providing flexible bandwidth allocation via multiple instantiations of separate data buses, control buses and support mechanisms  
A bus mechanism to control information exchanges between bus masters and bus targets over a bus structure that includes separate command, push and pull data buses. Commands are generated by bus...
7225290 ATA and SATA compliant controller  
An ATA (Advanced Technology Attachment) controller is provided that comprises at least one parallel port for connecting to at least one ATA compliant storage device, and at least one serial port...
7219178 Bus deadlock avoidance  
Bus logic couples plural master logic units with plural slave logic units to enable data transfers. Each master unit performs an address transfer which, when received by a specified slave unit,...
7219183 Switching apparatus and method for providing shared I/O within a load-store fabric  
An apparatus and method for sharing I/O devices. The apparatus has a first plurality of I/O ports, a second I/O port, and core logic. The first plurality is coupled to a plurality of operating...
7219179 ***WITHDRAWN PATENT AS PER THE LATEST USPTO WITHDRAWN LIST***
Apparatus for arbitrating between a plurality of transfers to be routed over a corresponding plurality of paths provided by an interconnect circuit of a data processing apparatus
 
An apparatus for arbitration within a data processing apparatus between a plurality of transfers to be routed over a corresponding plurality of paths provided by an interconnect circuit. The...
7216191 System for programmed control of signal input and output to and from cable conductors  
An input/output module for implementing directions from a controller for sending and receiving signals to and from devices. The input/output module includes a microprocessor for communication...
7216195 Architecture for managing disk drives  
Disclosed are ways of providing a highly flexible high availability storage system. Disk drive carriers for insertion into enclosures in a storage system include several disk drives. The...
7213091 SRAM bus architecture and interconnect to an FPGA  
An SRAM bus architecture includes pass-through interconnect conductors. Each of the pass-through interconnect conductors is connected to routing channels of the general interconnect architecture...
7210000 Transmitting peer-to-peer transactions through a coherent interface  
In various embodiments, the present invention includes a method for receiving a transaction having first header information from a first peer device at a first agent of a coherent system,...
7206888 Backplane configuration with shortest-path-relative-shift routing  
A novel backplane routing and configuration (200) supports a full mesh architecture. In this novel configuration, a circuit pack determines which backplane signals to use for a transmission based...
7200687 Location-based non-uniform allocation of memory resources in memory mapped input/output fabric  
An apparatus, program product and method in which a memory address space is allocated non-uniformly to IO resources in a memory mapped IO fabric based upon the locations of individual IO endpoints...
7200704 Virtualization of an I/O adapter port using enablement and activation functions  
A method for configuring a communication port of a communications interface of an information handling system into a plurality of virtual ports. A first command is issued to obtain information...
7197592 Method for exchanging data between several stations  
In a method for exchanging data between several stations belonging to various data bus systems. The data bus systems are spatially and physically separate from each other. The stations exchange...
7194561 Method and apparatus for scheduling requests to a resource using a configurable threshold  
The present invention provides for the scheduling of requests to one resource from a plurality of initiator devices. In one embodiment, scheduling of requests within threads and scheduling of...
7191277 Dynamic allocation of devices to host controllers  
The present technique is associated with a device-controller configuration system for a computer system having a plurality of controllers. The technique utilizes an automatic switching assembly so...