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7840743 Double network physical isolation circuit  
A double network physical isolation circuit includes a north bridge chip, a bus switch circuit, a first memory, and a second memory. The bus switch circuit includes a first and a second bus switch...
7840721 Devices with multiple functions, and methods for switching functions thereof  
Devices with multiple functions and methods for switching functions thereof are provided. The device comprises a plurality of hardware components, a plurality of functional modules, an input...
7840733 Power optimized dynamic port association  
A method, device, system, and computer readable medium are disclosed. In one embodiment the method includes dynamically associating a newly active port in a computer system with a first host...
7836241 Electronic apparatus having switching unit  
An electronic apparatus having switching unit is described. The electronic apparatus includes a first peripheral device, a second peripheral device and a switching unit. The first peripheral...
7836249 Disk subsystem  
A protocol controller disposed between switches in a fiber channel fabric switch circuit and disk drive units for converting a protocol to enable one-to-one connectivity established between...
7830902 Arbiter, crossbar, request selection method and information processing device  
A plurality of units (processing units) connected to a crossbar are divided into a plurality of groups and one is selected from requests selected for each group according to priority among the...
7831759 Method, apparatus, and computer program product for routing packets utilizing a unique identifier, included within a standard address, that identifies the destination host computer system  
A computer-implemented method, apparatus, and computer program product are disclosed in a data processing environment that includes host computer systems that are coupled to adapters utilizing a...
7827337 Sharing memory interface  
A device and a method for sharing a memory interface are disclosed. According to preferred embodiments of the present invention, a supplementary control unit included in a digital processor can...
7826349 Connection management mechanism  
A host device is disclosed. The host device includes a receive frame and primitive sequence processor and a connection manager to open a connection with a target device based on a probability of a...
7827345 Serially interfaced random access memory  
A serially interfaced massively parallel Random Access Memory (RAM) includes a matrix of control logic sections on one integrated circuit die, augmented by a switching matrix with an external...
7822901 KVM switch for controlling computers and method thereof  
A system for connecting a console device to computers comprising a graphic user interface menu apparatus for controlling the computers. The system comprises a user-side circuit, a central...
7818486 Method and apparatus for connecting USB devices to a remote computer  
A method and apparatus are provided to enable a plurality of standard USB peripheral devices, utilizing the USB specification, to be distributed at various nodes across a network, wherein...
7813362 Communication apparatus, electronic apparatus, imaging apparatus  
A communication apparatus is disclosed that includes a transmission circuit configured to transmit transmission data to a communication counterpart; a reception circuit configured to receive...
7814250 Serialization of data for multi-chip bus implementation  
Bus communication for components of a system on a chip. In one aspect of the invention, a system includes a matrix operative to select destinations for information on buses connected to the...
7809861 System memory map decoder logic  
Methods and apparatus are provided optimizing system memory map decoder logic. A system is configured with multiple master and slave components. Using information known about the system...
7809877 Host apparatus for controlling memory cards which minimizes interruption of writing to memory cards  
A host controller can divide a preliminary process for writing to a memory card, or the like, into a plurality of unit processes for execution. While writing or the like is being performed with...
7802045 Bus system for use with information processing apparatus  
A processor bus linked with at least a processor, a memory bus linked with a main memory, and a system bus linked with at least an input/output device are connected to a three-way connection...
7802049 Links having flexible lane allocation  
Machine-readable media, methods, and apparatus are described for flexibly establishing lanes of links. In some embodiments, any port of a device may be connected to another port of another device....
7797475 Flexibly configurable multi central processing unit (CPU) supported hypertransport switching  
Embodiments of the invention address deficiencies of the art in respect to hypertransport-based switching for multi-CPU systems and provide a method, system and computer program product for...
7796597 Auto configuration of static rendezvous points using bootstrap router protocol messages from PIM SM  
A process for configuring rendezvous points in switch routers of a PIM-SM network that includes static rendezvous point configuration and bootstrap router protocol messaging. A user will input...
7797474 Method and apparatus for enhancing universal serial bus applications  
A system for enhancing universal serial bus (USB) applications comprises an upstream processor, a downstream processor and a main controller. The upstream processor accepts standard USB signals...
7793032 Systems and methods for efficient handling of data traffic and processing within a processing device  
The present invention provides an improved platform hub that aims to, in some embodiments, optimize system resources to improve system performance and/or reduce consumption of power.
7793029 Translation device apparatus for configuring printed circuit board connectors  
An apparatus and method for selectively configuring a first PCI Express connector and a second PCI Express connector. The apparatus includes a PCB (printed circuit board) having a PCI Express...
7793089 Configurable backplane connectivity for an electrical device  
A method comprises obtaining connectivity information from a plurality of electrical devices. Each such electrical device is separately coupled to a backplane, and at least one electrical device...
7783808 Embedded self-checking asynchronous pipelined enforcement (escape)  
A network comprises a plurality of nodes; a plurality of bi-directional point-to-point communication links, wherein a priority-based arbitration scheme is used to communicate over each of the...
7783822 Systems and methods for improving performance of a routable fabric  
Systems and methods for improving performance of a rentable fabric are disclosed. In an exemplary embodiment a system may comprise a plurality of compute nodes, a routable fabric, and a plurality...
7783818 Modularized interconnect between root complexes and I/O modules  
Described are electronics enclosures having an I/O (input/output) module, a CPU (central processing unit) module having a root complex, and a pluggable, field-replaceable interconnect module...
7779197 Device and method for address matching with post matching limit check and nullification  
A device and method are disclosed for performing a limit address check validation in a switching device. The device includes a data selector circuit that is enabled to select the content of an...
7779194 Data modification module  
The present invention relates to a microcontroller including a central processing unit, at least one memory, a bus coupling the storage location to the central processing unit, and a data...
7769933 Serialization of data for communication with master in multi-chip bus implementation  
Bus communication for components of a system on a chip. In one aspect of the invention, a serializer for interfacing bus communications for a master in a bus system includes one or more shift...
7769941 USB matrix switch system  
An USB matrix switch system provided for a plurality of USB devices shared with a plurality of hosts is disclosed. The system comprises: (1) a plurality of DP PHYs, respectively, corresponding to...
7769940 Switching device configured to couple a first computer to a first peripheral device and one or more second peripheral devices and method of manufacturing same  
In some embodiments, a switching device is configured to couple a first computer to a first peripheral device and one or more second peripheral devices. The switching device is further configured...
7765357 PCI-express communications system  
To be able to transmit a response packet to the original request node after a bus ID/a device ID is replaced in the PCI-Express switch for a PCI-Express communication system, a unique node ID for...
7765358 Connecting multiple peripheral interfaces into one attachment point  
An interconnect apparatus is provided for connecting at least one peripheral device to a multi-channel interface. The apparatus includes an incoming connector having a first incoming channel...
7761647 Storage device with automatic interface-switching function  
A storage device with automatic-switching function is disclosed. When the storage device is coupled to a USB interface, the power provided by the USB interface turns the USB/SATA converter on to...
7761632 Serialization of data for communication with slave in multi-chip bus implementation  
Bus communication for components of a system on a chip. In one aspect of the invention, a serializer for interfacing bus communications for a slave in a bus system includes one or more shift...
7761612 Migrating domains from one physical data processing system to another  
A mechanism is provided for migrating domains from one physical data processing system to another are provided. Domains may be assigned direct access to physical I/O devices but in the case of...
7757014 Method for disconnecting a transceiver from a bus in multipoint/multidrop architecture  
The present invention relates to a method for disconnecting a transceiver from a bus in multipoint/multidrop architecture. A central processing unit (CPU) and a universal asynchronous receiver...
7757033 Data exchanges among SMP physical partitions and I/O interfaces enterprise servers  
Pluggable modules communicate via a switch fabric dataplane accessible via a backplane. Various embodiments are comprised of varying numbers and arrangements of the pluggable modules in accordance...
7757031 Data transmission coordinating method and system  
A data transmission coordinating method is used between a central processing unit and a bridge chip of a computer system. By entering the computer system into a coordinating state, the data...
7752360 Method and system to map virtual PCIe I/O devices and resources to a standard I/O bus  
A method and system to map virtual I/O devices and resources to a standard I/O bus is provided. The system, in one example embodiment, comprises a virtual device detector, a resource allocator,...
7752373 System and method for controlling memory operations  
A system and method for controlling memory operations is disclosed. In a particular embodiment, the system includes a memory controller that can request control of a contact that is shared between...
7747883 Computer system with non-support hyper-transport processor and controlling method of hyper-transport bus thereof  
A computer system with a non-support hyper-transport processor and a controlling method of a hyper-transport bus thereof. The computer system includes a system management controller, a...
7747796 Control data transfer rates for a serial ATA device by throttling values to control insertion of align primitives in data stream over serial ATA connection  
Systems and methods for performing data transfer rate throttling o improve the effective data transfer rate for SATA storage devices. The data transfer rate is diluted by inserting ALIGN...
7747801 Reducing information reception delays  
A technique for reducing information reception delays is provided. The technique reduces delays that may be caused by protocols that guarantee order and delivery, such as TCP/IP. The technique...
7743198 Load distribution in storage area networks  
A load balancing method and system for identifying an input/output (I/O) network path from a set off I/O network paths is provided by the invention. The set off I/O network paths connect a host...
7743199 Method and apparatus for obtaining trace information of multiple processors on an SoC using a segmented trace ring bus to enable a flexible trace output configuration  
An integrated bus architecture for transmitting trace information from a plurality of processors included on an integrated chip having one or more peripheral I/O channels comprises a segmented bus...
7739487 Method for booting a host device from an MMC/SD device, a host device bootable from an MMC/SD device and an MMC/SD device method a host device may booted from  
Systems and methods for booting a host device(s) from a peripheral device(s), via an interface, such as an MMC/SD interface, with power terminals, a data bus with data bus terminals, a clock line...
7734859 Virtualization of a host computer's native I/O system architecture via the internet and LANs  
A hardware/software system and method that collectively enables virtualization of the host computer's native I/O system architecture via the Internet and LANs. The invention includes a solution to...
7730228 System for dual use of an I/O circuit  
A system provides dual use of a general purpose input/output (I/O) line. In an embodiment, the system comprises a controlling circuit having a dual purpose I/O line that is selectively operable in...