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7620741 |
Proxy-based device sharing
A method is provided for supporting device sharing between hosts via a bus fabric. A master host owns a device tree and provides IO services to at least one client host. The client host comprises...
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7613864 |
Device sharing
An interconnect apparatus, for example a switch, supports PCI-Express. The apparatus has a first plurality of ports configurable as upstream ports, each connectable to a respective host, and at...
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7610431 |
Configuration space compaction
In an interconnect apparatus for interconnecting at least one host to at least a plurality of presentation registers provide a presentation interface for the device to the host. The interconnect...
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7610061 |
Communication device and method having a common platform
A communication device and method is provided, comprising: a signal modulator/demodulator having a digital signal processor for effecting radio communications; and an application processor (AP)...
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7593840 |
Peripheral bus switch having virtual peripheral bus and configurable host bridge
A peripheral bus switch includes a virtual peripheral bus, a plurality of bridges, and a configurable host bridge. A first bridge operably couples on a first side to the virtual peripheral bus and...
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7574549 |
Bridge design for SD and MMC multiplexing
A method for determining direction of signal transmission in a bi-directional signal line, including sampling data signals at two terminals, A and B, enabling data flow from A to B when data flow...
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7571273 |
Bus/device/function translation within and routing of communications packets in a PCI switched-fabric in a multi-host environment utilizing multiple root switches
A computer-implemented method, apparatus, and computer program product are disclosed for bus/device/function (BDF) translation and routing of communications packets through a fabric that utilizes...
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7562174 |
Motherboard having hard-wired private bus between graphics cards
A motherboard includes two bus connectors. Each connector has contact positions for a set of serial data lanes. A private bus is formed in the motherboard to couple a subset of the serial data...
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7546393 |
System for asynchronous DMA command completion notification wherein the DMA command comprising a tag belongs to a plurality of tag groups
The present invention provides for a system comprising a DMA queue configured to receive a DMA command comprising a tag, wherein the tag belongs to one of a plurality of tag groups. A counter...
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7543101 |
System of accessing data in a graphics system and method thereof
A central processor unit (CPU) is connected to a system/graphics controller generally comprising a monolithic semiconductor device. The system/graphics controller is connected to an input output...
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7519761 |
Transparent PCI-based multi-host switch
A transparent PCI-based multi-host switch. A switch is configured with multiple north facing ports to couple the switch to multiple hosts. The multi-host switch can be included in a variety of...
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7484028 |
Burst-capable bus bridges for coupling devices to interface buses
Disclosed are interface buses that facilitate communications among two or more electronic devices in standard mode and burst mode, and bus bridges from such buses to a memory unit of such a device....
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7472212 |
Multi CPU system
A multi CPU system is capable of performing exclusive control of a plurality of CPUs accessing to the same resource by a hardware without depending on an OS. The plurality of CPUs are connected...
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7447827 |
Multi-port bridge device
A bridge device electrically connected to a first AGP bus, a second AGP bus, and a PCI bus is provided. The bridge device has a first bridge, a second bridge, and a controller. The first bridge is...
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7446775 |
Data processor and graphic data processing device
An object of the present invention is to improve efficiency of transfer of control information, graphic data, and the like for drawing and display control in a graphic data processor. A graphic...
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7444454 |
Systems and methods for interconnection of multiple FPGA devices
Application Specific Integrated Circuit (“ASIC”) devices, such as Field Programmable Gate Arrays (“FPGAs”), may be interconnected using serial I/O connections, such as high speed...
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7443844 |
Switched fabric mezzanine storage module
A switched fabric mezzanine storage module ( 560 ) includes a storage module ( 562 ) and a switched fabric connector ( 563 ) coupled to the storage module. The storage module is coupled to directly...
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7441066 |
Managing a computer system having a plurality of partitions using a service processor
The inventive multiple partition computer system allows the reconfiguration of the installed hardware, possibly while the various partitions continue normal operations. This aspect includes adding...
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7440450 |
Payload module having a switched fabric enabled mezzanine card
A multi-service platform system, includes a backplane ( 104 ), a switched fabric ( 106 ) on the backplane, and at least one of a VMEbus network and a PCI network coincident with the switched fabric...
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7428222 |
Method of bus configuration to enable device bridging over dissimilar buses
Several local IEEE1394 buses are bridged together over a second bus type to create a global bus wherein each local bus node is able to address nodes across the global bus without the local nodes...
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7426599 |
Systems and methods for writing data with a FIFO interface
Application Specific Integrated Circuit (“ASIC”) devices, such as Field Programmable Gate Arrays (“FPGAs”), may be interconnected using serial I/O connections, such as high speed...
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7376778 |
Audio device
The present invention provides a digital bus circuit comprising: a bus conductor having two sections each connected to a pass circuit, each bus section being connected to two bus interfaces for...
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7376775 |
Apparatus, system, and method to enable transparent memory hot plug/remove
In some embodiments, an apparatus includes a processor, an expander memory bridge location, a memory coupled to the expander memory bridge location, and a bus controller including intercept logic...
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7366798 |
Allocation of differently sized memory address ranges to input/output endpoints in memory mapped input/output fabric based upon determined locations of input/output endpoints
An apparatus, program product and method in which a memory address space is allocated non-uniformly to IO resources in a memory mapped IO fabric based upon the locations of individual IO endpoints...
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7334071 |
Expansion of cross-domain addressing for PCI-express packets passing through non-transparent bridge
A PCI-Express compatible switch is provided with two or more, internal virtual buses. In one embodiment, at least one of the plural virtual buses is designated as a special bus that is limited to...
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7328300 |
Method and system for keeping two independent busses coherent
Methods and systems for keeping two independent busses coherent that includes writing data from an Input/Output (I/O) controller to a memory. The I/O controller sends the data to the memory via a...
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7325125 |
Computer system for accessing initialization data and method therefor
A method and computer system for accessing initialization data stored in a boot memory space. After the power supply starts up, the south bridge starts up and sends an initiating signal to the...
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7315913 |
CPU system, bus bridge, control method therefor, and computer system
In a system having an arrangement that a CPU ( 101 ) connected to a bus ( 107 ) via bus bridge ( 103 ) and a CPU 102 connected to a bus ( 107 ) via bus bridge ( 104 ), when the bus bridge ( 103 )...
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7284082 |
Controller apparatus and method for improved data transfer
Embodiments of the invention include a controller apparatus, system and method for transferring data between data storage devices within a computer system. The inventive controller apparatus...
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7284081 |
Method and system for routing data between USB ports
Aspects for high speed USB data routing are presented. The aspects include routing a data stream to and from USB I/O ports serially, and maintaining a frequency of the data stream during the...
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7275124 |
Method and system for controlling forwarding or terminating of a request at a bus interface based on buffer availability
A bus bridge for coupling between a first bus and a second bus includes: a number of data buffers for a particular request type; a counter for monitoring a number of requests of the particular type...
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7263570 |
Method of providing an interface to a plurality of peripheral devices using bus adapter chips
A method of electrically coupling a central processing unit (CPU) of a network server to a plurality of network interface modules. The method comprises providing each of the plurality of network...
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7251703 |
Method of time stamping to enable device bridging over dissimilar buses
Several local IEEE1394 buses are bridged together over a second bus type to create a global bus wherein each local bus node is able to address nodes across the global bus without the local nodes...
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7200688 |
System and method asynchronous DMA command completion notification by accessing register via attached processing unit to determine progress of DMA command
The present invention provides for asynchronous DMA command completion notification in a computer system. A command tag, associated with a plurality DMA command is generated. A DMA data movement...
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7162654 |
Isolation of I2C buses in a multiple power domain environment using switches
A disk enclosure includes a first enclosure controller powered by a first voltage circuit and coupled to a first I2C bus, a second enclosure controller powered by a second voltage circuit and...
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7146452 |
Multi-port system and method for routing a data element within an interconnection fabric
The present invention relates generally to a generic fabric interconnect system and method for providing a data path between and among nodes and processing elements within an interconnection...
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7130953 |
Bus architecture techniques employing busses with different complexities
An integrated circuit system ( 70 ) includes a processor ( 130 ) and a system bus ( 12 ) with a first complexity coupled to the processor. Apparatus for enabling communication between the processor...
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7111105 |
System to optimally order cycles originating from a single physical link
A method and architecture optimizes transaction ordering in a hierarchical bridge environment. A parent-bridge is one level above a child-bridge, which in turn is one level above a grand-child...
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7103703 |
Back to back connection of PCI host bridges on a single PCI bus
Duplicate PCI bridge devices are configured for synchronous initializations based on shared initialization signals. A first of the PCI bridge devices is configured to rely on bus arbitration...
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7096306 |
Distributed system with cross-connect interconnect transaction aliasing
An aliasing technique allows transparently connecting multiple interconnects across a shared cross-connect interconnect, allowing devices on one interconnect to communicate with devices on another...
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7096305 |
Peripheral bus switch having virtual peripheral bus and configurable host bridge
A peripheral bus switch includes a virtual peripheral bus, a plurality of bridges, and a configurable host bridge. A first bridge operably couples on a first side to the virtual peripheral bus and...
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7073008 |
Method of function activation on a bridge system
A bridge system having at least one bridge chip to control the operations of the bridge. Each bridge chip uniquely connects to a bus interface allowing communications between a host system and the...
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7062594 |
Root complex connection system
A data processing system includes first and second data processing devices coupled to each other through a midplane. Each data processing device includes a data storage processor; a root complex...
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7054978 |
Logical PCI bus
A method of and apparatus for improving the efficiency of a data processing system employing multiple busses operating at multiple data transfer rates. Each of the multiple physical busses has its...
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7051139 |
CPU expandability bus
Embodiments of the present invention provide a computer system with a high speed, high bandwidth expandability bus for integrated and non-integrated CPU products. The computer system includes a...
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7047348 |
Method and architecture for accessing hardware devices in computer system and chipset thereof
A method and an architecture for accessing hardware devices in a computer system and the chipset thereof are provided. A bi-directional two-wired serial interface, for instance, a system management...
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7035953 |
Computer system architecture with hot pluggable main memory boards
The specification discloses a server system implementing hot pluggable memory boards in an architecture using X86 processors and off-the-shelf operating system, such as Windows® or Netware, which...
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7024510 |
Supporting a host-to-input/output (I/O) bridge
In a computer system, a host-to-I/O bridge (e.g., a host-to-PCI-X bridge) includes core logic that interfaces with at least two host buses for coupling a central processing unit(s) and the bridge,...
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7024503 |
Link bus between control chipsets and arbitration method thereof
A bus structure is implemented within a control chipset between a first control chip and a second control chip, comprising a first AD bus and a second AD bus. According to an arbitration method...
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7020734 |
Connecting device of storage device and computer system including the same connecting device
In an environment in which plural external storage devices having different function control interfaces are intermixed, when a function of a storage device is controlled from a computer, a common...
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