Matches 151 - 158 out of 158 < 1 2 3 4
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5721931 Multiprocessing system employing an adaptive interrupt mapping mechanism and method  
A symmetrical multiprocessing system is provided that includes a central interrupt control unit. The central interrupt control unit is coupled to a plurality of processing units and to a plurality...
5682509 Bus interface to a RAID architecture  
A file server system provides increased bandwidth between a processor, a memory and a redundant array of inexpensive disks (RAID). The file server includes a processor connected to a processor bus....
5664117 Apparatus and method for prefetching data to load buffers in a bridge between two buses in a computer  
A bridge circuit providing for efficient data transfer between a first bus and a second bus in a computer system. The bridge circuit receives an address indicating a memory location storing a data...
5632021 Computer system with cascaded peripheral component interconnect (PCI) buses  
A system including primary and secondary PCI (Peripheral Component Interconnect) buses which do not "livelock". The system includes two PCI to PCI bridges between the primary and secondary buses....
5630145 Method and apparatus for reducing power consumption according to bus activity as determined by bus access times  
A power conservation computer architecture is provided for disabling a clock signal to all peripheral devices and bus controllers located on a plurality of Peripheral Component Interconnect (PCI)...
5396602 Arbitration logic for multiple bus computer system  
An arbitration mechanism is provided for use in a computer system which comprises (i) a central processing unit (CPU); (ii) a first system bus which connects the CPU to system memory so that the...
5359715 Architectures for computer systems having multiple processors, multiple system buses and multiple I/O buses interfaced via multiple ported interfaces  
Multiple processor systems are configured to include at least two system or memory buses with at least two processors coupled to each of the system buses, and at least two I/O buses which are...
4468733 Multi-computer system with plural serial bus loops  
A multi-computer system includes a plurality of data processors and at least one I/O device which is commonly accessible by the data processors. A plurality of serial bus loops are configurated in...
Matches 151 - 158 out of 158 < 1 2 3 4