Matches 51 - 100 out of 157 < 1 2 3 4 >
Match Document Document Title
7017001 Compact PCI backplane and method of data transfer across the compact PCI backplane  
A method of directly transferring data across a CompactPCI™ backplane ( 170 ) via a fully meshed orthogonal network ( 370 ). The CompactPCI backplane ( 170 ) incorporates a different type...
7003617 System and method for managing target resets  
A bus reset control module associated with a fibre-SCSI bridge manages target resets sent from a fibre bus to one or more SCSI buses to reduce or eliminate unnecessary bus resets of SCSI buses...
6985990 System and method for implementing private devices on a secondary peripheral component interface  
Private devices are implemented on the secondary interface of PCI bridge by re-routing the activation of device select signals (IDSEL) during the address phase of a Type 0 configuration operation...
6978337 Serial ATA controller having failover function  
A select circuit including a first device bridge to communicate a first stream of information between a first Serial ATA bus and a storage device bus. A second device bridge to communicate a second...
6954817 Providing at least one peer connection between a plurality of coupling facilities to couple the plurality of coupling facilities  
A coupling facility is coupled to one or more other coupling facilities via one or more peer links. The coupling of the facilities enables various functions to be supported, including the duplexing...
6944706 System and method for efficiently processing broadband network traffic  
A broadband gateway 135 that combines a broadband modem 120 and a residential gateway 130 in a single unit. The single unit features a unique dual bridge, shared module architecture that...
6928509 Method and apparatus for enhancing reliability and scalability of serial storage devices  
A method, system and apparatus for providing inter-connective access of a plurality of controllers to a plurality of serial storage devices are provided. Serial storage devices are provided with a...
6918052 Managing operations of a computer system having a plurality of partitions  
The inventive multiple partition computer system allows the reconfiguration of the installed hardware, possibly while the various partitions continue normal operations. This aspect includes adding...
6901472 Data-processing unit with a circuit arrangement for connecting a first communications bus with a second communications bus  
A data processing configuration with a first circuit configuration ( 1 ) that connects a first communication bus ( 2 ) with a second communication bus ( 3 ). The first circuit configuration ( 1 )...
6877061 Data storage system having dummy printed circuit boards  
A method and system for producing a data storage system for transferring data between a host computer/server and a bank of disk drives through a system interface. The system interface has a...
6862646 Method and apparatus for eliminating the software generated ready-signal to hardware devices that are not part of the memory coherency domain  
The specification discloses a method and related system that allows hardware devices to participate in the coherency domain of a computer system. More particularly, hardware devices such as network...
6862642 Expander device and method for resetting bus segments in I/O subsystem segmented with expanders  
Expander device and method for resetting bus segments in I/O subsystem to clear bus hang in an I/O subsystem having a plurality of bus segments. Each bus segment in the I/O subsystem includes a set...
6836813 Switching I/O node for connection in a multiprocessor computer system  
A switching I/O node for connection in a multiprocessor computer system. An input/output node switch includes a bridge unit and a packet bus switch unit implemented on an integrated circuit chip....
6836839 Adaptive integrated circuitry with heterogeneous and reconfigurable matrices of diverse and adaptive computational units having fixed, application specific computational elements  
The present invention concerns a new category of integrated circuitry and a new methodology for adaptive or reconfigurable computing. The preferred IC embodiment includes a plurality of...
6820164 PERIPHERAL COMPONENT INTERCONNECT BUS DETECTION IN LOGICALLY PARTITIONED COMPUTER SYSTEM INVOLVING AUTHORIZING GUEST OPERATING SYSTEM TO CONDUCT CONFIGURATION INPUT-OUTPUT OPERATION WITH FUNCTIONS OF PCI DEVICES  
A method, which may be embodied upon a computer readable medium and executed by a processor, for detecting PCI buses in a logically partitioned system. The method may include determining PCI buses...
6816938 Method and apparatus for providing a modular system on-chip interface  
A system on-chip interface device includes a plurality of cores comprising core systems a plurality of standard interfaces interfaced to the plurality of cores a system bus, an on-chip bus, a...
6804742 System integrated circuit  
A system integrated circuit that identifies the cause of a malfunction even if the number of output terminals of a system LSI to be assigned to internal buses in the system LSI is strictly...
6751697 Method and system for a multi-phase net refresh on a bus bridge interconnect  
A method and system for a multi-phase net refresh on a bus bridge interconnect, the interconnect comprising a number of nodes, a bus bridge, and a number of buses, are described. In one embodiment,...
6748478 System function configurable computing platform  
Disclosed are a system and method of configuring processing resources for communication with one or more devices coupled to a data bus through a bridge. Resources at a processing system may be...
6728821 Method and system for adjusting isochronous bandwidths on a bus  
A method and system for adjusting the bandwidth allocated for isochronous data traffic on an interconnected data bus is disclosed. The present system uses an isochronous resource manager (IRM) to...
6725317 System and method for managing a computer system having a plurality of partitions  
The inventive multiple partition computer system allows the reconfiguration of the installed hardware, possibly while the various partitions continue normal operations. This aspect includes adding...
6701403 Service processor access of non-volatile memory  
Non-volatile memory access, such as firmware access by a service processor, is disclosed. The service processor asserts a controller signal to select either a first non-volatile memory, or a second...
6691200 Multi-port PCI-to-PCI bridge with combined address FIFOs but separate data FIFOs for concurrent transactions  
A multi-port Peripheral Component Interconnect (PCI) bus bridge allows for cascading of PCI buses and reduction of bus loading and traffic. The multi-port PCI bridge has three or more ports that...
6687240 Transaction routing system  
A method and implementing system is provided in which multiple nodes of a Peripheral Component Interconnect PCI bridge/router circuit are connected to corresponding plurality of PCI busses to...
6678781 Network configuration method  
A network configuration method ensuring high reliability of bridge manager selection and bus reset is disclosed. After configuring each of the IEEE 1394 buses according to IEEE 1394 standard, a...
6665759 Method and apparatus to implement logical partitioning of PCI I/O slots  
A method, system, and computer program product for enforcing logical partitioning of input/output slots within a data processing system is provided. In one embodiment, the system includes a...
6636904 Dynamic PCI device identification redirection on a configuration space access conflict  
A computer system reroutes a configuration cycle intended for an unused system bus address line to the IDSEL, or equivalent, configuration chip select input pin of a device which uses the same...
6636947 Coherency for DMA read cached data  
A method and implementing computer system are provided which enable a process for implementing a coherency system for bridge-cached data which is accessed by adapters and adapter bridge circuits...
6606675 Clock synchronization in systems with multi-channel high-speed bus subsystems  
A high-speed bus subsystem includes a plurality of bus channels, wherein each bus channel has an independent channel clock signal generated by an associated channel clock generator. A master device...
6598092 Trunk transmission network  
In a trunk transmission network for transmitting information signals between nodes via paths, flexible path operation is achieved by setting up paths between source nodes and destination nodes...
6598110 Method and apparatus for data conversion in a computer bus  
A system and method for reducing bottlenecks on a computer bus, by offloading specific types of high-bandwidth data from the system bus and passing that data directly to specialized target busses....
6581129 Intelligent PCI/PCI-X host bridge  
A PCI host bridge and an associated method of use are disclosed. The PCI host bridge includes a host bus interface, an I/O bus interface, and a PCI operation detection circuit. The host bus...
6557065 CPU expandability bus  
Embodiments of the present invention provide a computer system with a high speed, high bandwidth expandability bus for integrated and non-integrated CPU products. The computer system includes a...
6546447 Method and apparatus for dynamic PCI combining for PCI bridges  
A method and apparatus are provided for implementing peripheral component interconnect (PCI) combining function for PCI bridges. A programmable boundary for a combined operation is selected. A...
6546449 Video controller for accessing data in a system and method thereof  
A central processor unit (CPU) is connected to a system/graphics controller generally comprising a monolithic semiconductor device. The system/graphics controller is connected to an input output...
6542953 Method for configuring peer-to-peer bus bridges in a computer system using shadow configuration registers  
A method of configuring a computer system having a processor coupled by a host bus to first and second bus devices causes the processor to transmit on the host bus one or more configuration write...
6532511 Asochronous centralized multi-channel DMA controller  
An electronic bridging device for transferring electronic data between a first device attached to a system bus and a peripheral device attached to a peripheral bus using a bridging circuit. The DMA...
6507893 System and method for time window access frequency based caching for memory controllers  
A system and method for replacing cached data for a computer system utilizing one or more storage devices is disclosed. The storage devices are divided into a plurality of areas or bins. Each bin...
6463483 Low latency input-output interface  
A computing or processing system including a microprocessor and a memory coupled together by a local bus, and also includes a north bridge providing translation to a PCI or other standard bus. The...
6363448 Set top box integrated circuit  
An integrated circuit for use in a digital set top box including at least one control unit, a plurality of data processing units and common data bus for connecting at least two of the processing...
6349037 Backplane for common building block  
An electrical machine, such as a router, switch, hub, etc., includes a housing in which a Primary Backplane and Secondary Backplane are mounted in stacked spaced relationship. A primary Bus is...
6330630 Computer system having improved data transfer across a bus bridge  
A bus bridge receives an inbound read request from a master. In response to the read request, the bridge transmits multiple (e.g., two) read request packets to fetch data. The fetched data is...
6304930 Signal transmission system having multiple transmission modes  
If a normal transmission mode has been specified, then four drivers included in a transmitter unit are activated by the respective outputs of four logical elements such that parallel signal...
6298420 Coherent variable length reads from system memory  
Method and apparatus for processing serial bus read requests in a memory controller when the memory controller interfaces to both a pipelined bus and a serial bus. According to the method, the read...
6295570 Using multiple serial bus devices with a driver program  
A method for using a driver program to communicate with multiple serial bus devices includes selecting one of the serial bus devices and automatically coupling the selected serial bus device to a...
6286093 Multi-bus programmable interconnect architecture  
A programmable interconnect system having a plurality of PICs connected via a plurality of buses where each bus may have two or more branches connecting the PICs is disclosed. Generally speaking,...
6275888 Method for configuring peer-to-peer bus bridges in a computer system using shadow configuration registers  
A method of configuring a computer system having a processor coupled by a host bus to first and second bus devices causes the processor to transmit on the host bus one or more configuration write...
6263393 Bus switch for realizing bus transactions across two or more buses  
A bus switch for realizing bus transaction across two or more buses comprises N (N: integer larger than 1) bus bridges, a switch module and a scheduler. When a transaction cell is generated by a...
6263394 Bus switching structure and computer  
A bus switching structure and a computer using the same, wherein input/output (I/O) slot connections are switched to a desired I/O bus so that loads are distributed evenly over the I/O buses. The...
6260095 Buffer reservation method for a bus bridge system  
A method for transferring data through a bus bridge. The bus bridge includes a number of data buffers for storing data, prefetching data and write posting data. A device communicating with the bus...
Matches 51 - 100 out of 157 < 1 2 3 4 >