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7610430 |
System and method for memory hub-based expansion bus
A system memory includes a memory hub controller, a memory module accessible by the memory hub controller, and an expansion module having a processor circuit coupled to the memory module and also...
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7600068 |
Programmable control interface device
A programmable control interface is for circuits using complex commands. The programmable interface includes a memory for storing sampled commands and a sequencing circuit. The sequencing circuit...
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7596652 |
Integrated circuit having processor and bridging capabilities
An apparatus according to one embodiment may include an integrated circuit. The integrated circuit may include a processor, a bridge, and circuitry capable of coupling the bridge and the processor...
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7594055 |
Systems and methods for providing distributed technology independent memory controllers
Systems and methods for providing distributed technology independent memory controllers. Systems include a computer memory system for storing and retrieving data. The system includes a memory bus,...
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7581033 |
Intelligent network interface card (NIC) optimizations
Intelligent NIC optimizations includes system and methods for Token Table Posting, use of a Master Completion Queue, Notification Request Area (NRA) associated with completion queues, preferably in...
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7574550 |
Guaranteed isochronous services method and apparatus in bridged LAN
Provided are a guaranteed isochronous services method and apparatus in bridged LAN. Isochronous streams are transmitted through bridges to a plurality of listener stations in a distributed network,...
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7526595 |
Data path master/slave data processing device apparatus and method
An apparatus and method is described for data processing in a computer system. The apparatus comprises a data processing device having a data processing master, a functionally coupled data...
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7519754 |
Hard disk drive cache memory and playback device
A NOR emulating device using a controller and NAND memories can be used in a computer system in placed of the main memory or in place of the BIOS NOR memory. Thus, the emulating device can function...
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7512731 |
Computer system and memory bridge for processor socket thereof
A multi-processor computer system includes a memory bridge configured in a processor socket on a motherboard. The memory bridge module electrically connects a processor bus and a memory bus that...
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7500047 |
System and method for processing commands
Embodiments of the present invention provide for conversion between command protocols. A routing device, or other device in the command path, can receive a command from an initiator, determine if...
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7500046 |
Abstracted host bus interface for complex high performance ASICs
An interface is provided to couple an input/output device (e.g., a network interface unit) to one or more different host system buses without altering the configuration of the device (e.g., to...
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7500045 |
Minimizing memory barriers when enforcing strongly-ordered requests in a weakly-ordered processing system
The disclosure is directed to a weakly-ordered processing system and method for enforcing strongly-ordered memory access requests in a weakly-ordered processing system. The processing system...
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7484031 |
Bus connection device
A bus connection device, in the form of a hardware dongle, can be connected to a first electronic device, in the form of a USB peripheral device, and a second electronic device can be connected...
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7478189 |
Deadlock avoidance in a bus fabric
Circuits, apparatus, and methods for avoiding deadlock conditions in a bus fabric. One exemplary embodiment provides an address decoder for determining whether a received posted request is a...
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7467252 |
Configurable I/O bus architecture
An I/O bus architecture is configurable so that I/O bandwidth may be re-allocated from one I/O slot or device to another. A first intermediate bus couples a system bus interface device to a first...
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7457903 |
Interrupt controller for processing fast and regular interrupts
A method and system for generating interrupts in an embedded disk controller is provided. The method includes receiving vector values for an interrupt; determining if an interrupt request is...
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7457861 |
Optimizing virtual interface architecture (VIA) on multiprocessor servers and physically independent consolidated NICs
Optimization of the Virtual Interface Architecture (VIA) on Multiprocessor Servers using Physically Independent Consolidated NICs (Network Interface Cards) allows for improved throughput, increased...
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7454544 |
Input/output interface and device abstraction
An electronic Input/Output Interface and device abstraction system used in gaming machines includes: a game central processing unit (game “CPU”); an intelligent input/output controller board...
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7444453 |
Address translation device
A method to facilitate I2C communication between a host device and a slave device where the slave device shares a common physical address with another slave device on the I2C bus. The method...
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7441066 |
Managing a computer system having a plurality of partitions using a service processor
The inventive multiple partition computer system allows the reconfiguration of the installed hardware, possibly while the various partitions continue normal operations. This aspect includes adding...
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7424562 |
Intelligent PCI bridging consisting of prefetching data based upon descriptor data
A bridging device has at least two ports. The first port allows the device to communicate with devices on an expansion bus and at least one other port to allow the bridge to communicate with a...
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7418534 |
System on a chip for networking
A system on a chip for network devices. In one implementation, the system on a chip may include (integrated onto a single integrated circuit), a processor and one or more I/O devices for networking...
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7415564 |
Method and system for coordinating interoperability between devices of varying functionality in a network
Systems and methods for coordinating the interoperability of devices in a network are disclosed. Embodiments of the present invention may provide the ability for a host device in a storage network...
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7412557 |
Apparatus and method for preventing loops in a computer network
A network device is configured in a manner to prevent connectivity loops such as one way connectivity loops. A user configures a port of the network device to have an associated state. The state...
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7409486 |
Storage system, and storage control method
A protocol chip and a bridge are connected to a first bus, while the bridge and a micro processor (MP) are connected to a second bus. The MP generates parameter information and writes it into a...
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7376777 |
Performing an N-bit write access to an M×N-bit-only peripheral
A system-on-chip ( 100 ) includes a 16-bit DSP ( 102 ), a 16-bit data bus ( 202 ) coupled to the DSP, at least one 32-bit-only peripheral ( 110 ), a 32-bit data bus ( 212 ) coupled to the...
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7376775 |
Apparatus, system, and method to enable transparent memory hot plug/remove
In some embodiments, an apparatus includes a processor, an expander memory bridge location, a memory coupled to the expander memory bridge location, and a bus controller including intercept logic...
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7370134 |
System and method for memory hub-based expansion bus
A system memory includes a memory hub controller, a memory module accessible by the memory hub controller, and an expansion module having a processor circuit coupled to the memory module and also...
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7363412 |
Interrupting a microprocessor after a data transmission is complete
A network device includes a first port to allow the device to communicate with other devices on an expansion bus. The device also includes a second port to allow the device to communicate with...
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7363396 |
Supercharge message exchanger
A system with a first random access memory (RAM), a second RAM, a first processor coupled to the first RAM and a second processor coupled to the second RAM. The first RAM is configured to store...
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7359998 |
Low-power CD-ROM player with CD-ROM subsystem for portable computer capable of playing audio CDs without supply energy to CPU
A low-power audio CD player for portable computers permits operation of the CD-ROM subsystem when power is not being supplied to the computer subsystem. In one embodiment of the invention, the...
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7356635 |
Compressed report descriptors for USB devices
A method and apparatus for creating USB peripheral device report descriptors: A short, compressed, report descriptor is stored in a peripheral device. This short report descriptor is transmitted to...
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7353315 |
Bus controller with virtual bridge
A bus controller and a control method are used in a computer system. In a bus controller, a bus controller main circuit issues a first signal to the central processing unit in response to a bus...
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7350015 |
Data transmission device
A data transmission device forwards data that have been received from a first device, intended for a second device, to the second device. The data transmission device is distinguished in that it...
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7346727 |
Method and system for control of a first device by data storage device through storing different values within task file register by the data storage device and reading task file register and performing corresponding predetermined operations by the first device via an IDE bus
A system includes a first device; an Integrated Drive Electronics (IDE) bus; and a data storage device having a first task file register, the data storage device being coupled to the first device...
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7340557 |
Switching method and system for multiple GPU support
A system and method for supporting multiple graphics processing units (GPUs) includes a first communication path coupled to a root complex device and a first connection point of a first GPU. A...
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7340553 |
Data processing device and method for transferring data
The data processing device according to the invention comprises a first processing unit ( 1 ) linked to a first bus ( 5 ), a second processing unit ( 2 ) linked to a second bus ( 6 ), a first bus...
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7334074 |
Method and system for multi-channel transfer of data and control
A system and method for transferring information in a multi-channel, point-to-point environment are described. In one embodiment, a number of processing chips are connected to a bridge bus. A...
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7330926 |
Interruption control system
An interruption control system includes a PIC, an APIC and a power management unit disposed in a south bridge chip of a computer system. In response to the triggering of an interrupt status...
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7330925 |
Transaction flow control mechanism for a bus bridge
A transaction flow control mechanism is disclosed for a bus bridge in a high speed computer system with a high speed interface for a graphics processor. A preferred embodiment provides a flow...
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7325125 |
Computer system for accessing initialization data and method therefor
A method and computer system for accessing initialization data stored in a boot memory space. After the power supply starts up, the south bridge starts up and sends an initiating signal to the...
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7308522 |
Method and apparatus to allow dynamic variation of ordering enforcement between transactions in a strongly ordered computer interconnect
A method of enforcing the ordering of read and write transactions for an adapter unit connected to a strongly-ordered bus. The adapter unit has a set of read buffers and write buffers. Initiator...
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7293125 |
Dynamic reconfiguration of PCI express links
A method and circuitry for dynamically reconfiguring the links of a PCI Express bus. A computer system has been initially configured with PCI Express bus links to various endpoints, using the...
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7290127 |
System and method of remotely initializing a local processor
A system and method of initializing a core processing circuit are disclosed. The core processing circuit is held in a reset state while a reset vector is loaded to one or more registers at a boot...
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7284079 |
Method and apparatus for constructing wired-and bus systems
A large multimaster I 2 C bus system is partitioned into smaller bus segments. The bus segments are connected by bridges that isolate the segments and direct selected transactions and commands...
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7281171 |
System and method of checking a computer system for proper operation
The specification may disclose a computer system and related method of checking for proper operation of a computer system, and taking corrective action if the computer system is not functioning...
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7277974 |
Data communication method and apparatus utilizing credit-based data transfer protocol and credit loss detection mechanism
A communications bus for a digital device includes a credit-based flow control mechanism, in which a sending component maintains a local record of its credits. Credits are returned to the sender by...
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7275124 |
Method and system for controlling forwarding or terminating of a request at a bus interface based on buffer availability
A bus bridge for coupling between a first bus and a second bus includes: a number of data buffers for a particular request type; a counter for monitoring a number of requests of the particular type...
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7272681 |
System having parallel data processors which generate redundant effector date to detect errors
A high assurance processing system includes a plurality of data processors coupled in parallel, a bridge coupled to the plurality of data processors, and an input/output processor coupled to the...
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7269681 |
Arrangement for receiving and transmitting PCI-X data according to selected data modes
An integrated device (e.g., an integrated PCI bridge device) buffers received PCI bus strobe signals and distributes strobe signals for PCI receive data relative to the PCI data lines, enabling all...
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