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5594879 |
Method of and apparatus for arbitrarily disabling under processor control individual slots on a computer bus
The system bus in a computer system includes a number of slots for individual expansion cards. Generally, input/output and memory operations to those expansion cards enable all the cards when one...
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5594875 |
Method and apparatus to provide pended transaction on a non-pended system bus
A data processing system includes a plurality of nodes connected to a shared data path, one of said plurality of nodes being a commander node to initiate a transaction on said shared data path, and...
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5590338 |
Combined multiprocessor interrupt controller and interprocessor communication mechanism
A combined multiprocessor interrupt controller and interprocessor communication mechanism includes a system bus, an input/output bridge element coupled to the system bus, and a system controller...
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5566345 |
SCSI bus capacity expansion controller using gating circuits to arbitrate DMA requests from a plurality of disk drives
In a data processing system having a data processor coupled to a SCSI channel disposed for transmitting and receiving data between the data processor and a peripheral storage subsystem, a bridge...
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5555433 |
Circuit for interfacing data busses
A system for changing the source and destination devices of data transfers under software control. Default data transfers are made from numbered source devices to the same-numbered destination...
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5550991 |
Personal computer system having high speed local processor bus and storage controller with FIFO memory coupled directly thereto
This invention relates to personal computers, and more particularly to a personal computer using a small computer systems interface (SCSI) controller coupled directly to the local processor bus for...
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5542056 |
High speed bridge circuit with deadlock free time-shared bus for internal instructions and port-to-port data
A bridge circuit includes a microprocessor having a first I/O port which couples to a SCSI bus and a second I/O port which is coupled through transceivers to an EISA bus. Also, the bridge circuit...
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5519872 |
Fast address latch with automatic address incrementing
A latching mechanism captures an address transmitted on a multiplexed address/data bus and preserves it for the full bus cycle. A transparent latch with a multiplexed feedback path allows the...
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5509127 |
Transmission logic apparatus for dual bus network
A dual bus interface module, providing communication between a processor means and/or translation logic means and a set of dual system busses, provides a programmable transmit logic means which...
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5414818 |
Method and apparatus for controlling reselection of a bus by overriding a prioritization protocol
The present invention provides a method and apparatus for dynamically modifying the priority of access to a bus, where the bus has control and arbitration functions distributed among the devices...
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5355452 |
Dual bus local area network interfacing system
An improved local area network interfacing system. The inventive system includes a frontplane circuit for connecting the interfacing system to a local area network and a backplane circuit for...
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5283872 |
SCSI device having transfer parameter storage memory blocks which correspond to each apparatus
In a SCSI device in a small computer system including a plurality of apparatuses, each apparatuses having a SCSI device connected to the apparatus by a MPU bus, and connected to each other through...
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5278974 |
Method and apparatus for the dynamic adjustment of data transfer timing to equalize the bandwidths of two buses in a computer system having different bandwidths
The bandwidth of a first bus and a second bus, unequal due to differences in protocol overheads and cycle times between the buses, are equalized without sacrificing any bandwidth on the lower...
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5222216 |
High performance communications interface for multiplexing a plurality of computers to a high performance point to point communications bus
A high performance communications interface device for connecting a high speed computer to a high performance communications bus. The high performance communications interface device includes a...
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5129065 |
Apparatus and methods for interface register handshake for controlling devices
A method of initiating a write operation for a particular command from a first computer module through a system interface to a second computer module having data registers, and a status register...
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4918650 |
Memory control interface apparatus
A memory control interface is provided for use with at least one external memory device used in conjunction with a microprocessor based system of the type providing address, control and data...
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4504901 |
Communication line adapter for use with a communications controller
A line adapter for permitting the transfer of information between terminals and a bus connected to the central control unit CCU of a communications controller. The line adapter includes a...
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4225959 |
Tri-state bussing system
This relates to an apparatus and method for providing an accurate data group to the instruction buffer of a data processing system. The data group is simultaneously applied to the instruction...
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