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7257654 |
PCI bridge device configured for using JTAG scan for writing internal control registers and outputting debug state
An integrated device (e.g., an integrated PCI bridge device), having configuration registers for storing configuration values, device logic for generating internal state values based on the...
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7254657 |
Dual mode capability for system bus
A computing system with a mode-selectable bus interface. In one embodiment, the computing system includes a system bus, a processor coupled to the bus via an interface unit, and a controller...
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7251704 |
Store and forward switch device, system and method
Disclosed are a system and method for forwarding data packets from ingress ports to egress ports on a switch. A forwarding circuit may commence forwarding data packets from an ingress port through...
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7251703 |
Method of time stamping to enable device bridging over dissimilar buses
Several local IEEE1394 buses are bridged together over a second bus type to create a global bus wherein each local bus node is able to address nodes across the global bus without the local nodes...
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7246191 |
Method and apparatus for memory interface
A bridge mechanism enables efficient communication between first and second devices, e.g., processors, via an interface, such as PCI express.
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7246190 |
Method and apparatus for bringing bus lanes in a computer system using a jumper board
Methods and apparatuses are disclosed for providing a bus in a computer system. In one embodiment, an apparatus comprises: a central processing unit (CPU), a bridge coupled to the CPU, a first slot...
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7240140 |
Efficient detection of multiple assertions in a bus
A mechanism detects multiple assertions in a bus efficiently by encoding each of N bus lines with log 2 (N) pairs of bit lines.
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7231309 |
Method and apparatus for testing a bridge circuit
A method and an apparatus for testing a bridge circuit. The method includes inputting a first test clock to a first conversion unit for triggering the first conversion unit to transfer a test data...
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7225286 |
Method to measure transmission delay between 1394 bridges
In lieu of a strictly dedicated bus transaction such as a ping and self-identification, the timing delays for an IEEE 1394 serial bus are determined by an asynchronous transaction request and...
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7222209 |
Expandable slave device system
A bus system for use with addressable memory has a global bus of bidirectional signal lines. The global bus has a first end and a second end. A master device transmits data to and receives data...
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7216183 |
Method for facilitating read completion in a computer system supporting write posting operations
A method for facilitating read completion in a computer system supporting write posting operations. A posted memory write and its associated tag both need to be buffered, where the associated tag...
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7216195 |
Architecture for managing disk drives
Disclosed are ways of providing a highly flexible high availability storage system. Disk drive carriers for insertion into enclosures in a storage system include several disk drives. The enclosures...
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7209996 |
Multi-core multi-thread processor
In one embodiment, a processor is provided. The processor includes at least two cores, where each of the cores include a first level cache memory. Each of the cores are multi-threaded. In another...
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7209999 |
Expansion device for storage units
An expansion device for storage units is applicable to a data processing system such as a blade server, to allow the number of storage units connected with the expansion device to be adjusted or...
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7206883 |
Interruption control system and method
An interruption control system includes a first input/output interruption controller, a second input/output interruption controller, and an interruption control device bus. The first input/output...
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7203788 |
USB-to-VGA converter
A USB-to-VGA converter includes a USB controller connectable to a USB port of a computer for receiving USB based display signals from the computer, a VGA controller connectable to a display device...
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7203787 |
Information processing apparatus and method that utilizes stored information about a mountable device
An IEEE 1394-compliant communication bus connects a printer and host computer so as to allow communication. The configuration ROM of the printer stores information about devices mountable on the...
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7203781 |
Bus architecture with primary bus and secondary or slave bus wherein transfer via DMA is in single transfer phase engagement of primary bus
A microprocessor system includes a high speed primary bus, a plurality of master devices coupled to the high speed primary bus, and a plurality of peripherals coupled to the high speed primary bus....
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7200703 |
Configurable components for embedded system design
A system and method of designing an accelerator for a processor-based system. The accelerator design problem is partitioned into a data communicate module design problem and a data compute core...
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7197578 |
Power management system for bridge circuit
A power control signal controls a low-power mode, a USB connection, and an asynchronous reset function for a bridge circuit. Another power control signal controls both a high power mode and a low...
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7197590 |
Method and apparatus for connecting LPC bus and serial flash memory
A method and apparatus for connecting low pin count (LPC, hereinafter) bus and serial flash memory is provided for converting the interface between a LPC bus and a serial flash memory in personal...
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7197581 |
Integrated circuit, device and method for inputting/outputting images
The integrated circuit comprises, in addition to a first bus and a first DMA controller, a second bus and a second DMA controller that mutually connects the first bus and the second bus. A main...
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7191276 |
Hub chip for one or more memory modules
One embodiment of the invention provides a hub chip comprising: an address bus input for receiving a plurality of successively sent portions of address and/or command data, a shift register which...
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7188200 |
Method for data exchange between an operating and monitoring program and a field device
In connection with a method for the data exchange between an operating and monitoring program BA and a field device, which is connected via a field bus adapter with the internet, the operating and...
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7181556 |
Transaction request servicing mechanism
A data processing apparatus comprises a master device 150, 160, 170, 180 , a slave device 110, 120, 130 and a communication bus 140 via which transaction requests are passed from master to...
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7181555 |
Data communication apparatus, data communication method, and program
A data communication apparatus is provided, which is capable of properly transmitting and receiving data of low speed specifications such as MIDI data even via a transmission line of high speed...
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7174408 |
Interface for serial data communication
An interface connectable as a default host to a peripheral or as a default peripheral to a host, for serial data communication between host and peripheral during a session, and comprising:...
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7174470 |
Computer data bus interface control
A computer data bus interface control selectively connects a computer data bus to functional components of a circuit board or isolates the bus from the functional components. The bus interface...
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7171504 |
Transmission unit
A transmission unit that improves communication quality by making effective use of a line to a blocked port in compliance with a spanning tree protocol. Bridges have bridge ports and communicate at...
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7171540 |
Object-addressed memory hierarchy that facilitates accessing objects stored outside of main memory
One embodiment of the present invention provides an object-addressed memory hierarchy that is able to access objects stored outside of main memory. During operation, the system receives a request...
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7171505 |
Universal network interface connection
An interface connection is described for joining a host device, such as a Network Processor, to peripherals such as modems, printers, local area networks, Ethernets and Token-Ring interfaces. The...
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7167940 |
Data processing method, data processing apparatus, communications device, communications method, communications protocol and program
To prevent a command from being unsmoothly issued when a communications channel (LUN) from a conventional initiator to a target enters communications disabled state for any reason there is...
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7167929 |
Integrated-circuit implementation of a storage-shelf router and a path controller card for combined use in high-availability mass-storage-device shelves that may be incorporated within disk arrays, and a storage-shelf-interface tunneling method and system
An integrated circuit implementing a storage-shelf router, used in combination with path controller cards and optionally with other storage-shelf routers, to interconnect SATA disks within a...
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7167939 |
Asynchronous system bus adapter for a computer system having a hierarchical bus structure
A computer system having a hierarchical bus structure that allows decoupling of a local bus from a global bus thereof. Decoupling of the local bus is achieved through use of an asynchronous system...
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7165136 |
System and method for managing bus numbering
Bus numbering management for an information handling system, such as a personal computer, is provided by interfacing one or more selectively hidden devices with one or more buses through either a...
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7162566 |
USB-based host-to-host networking method
The present invention relates to a USB-based host-to-host networking method capable of transferring information between two hosts. Devices for the method comprise: a register, a pair of FIFO...
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7159063 |
Method and apparatus for hot-swapping a hard disk drive
Methods and apparatus are provided for hot swapping a hard disk drive. A gateway is connected between the disk drive and the bus leading to the host adapter. The gateway can isolate the disk drive...
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7159065 |
Method for issuing vendor specific requests for accessing ASIC configuration and descriptor memory while still using a mass storage class driver
A bridge-chip may interface a Universal Serial Bus to a mass storage device. Communications of the universal serial bus may be examined to determine a command block wrapper (CBW) of a bulk...
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7155537 |
Infiniband isolation bridge merged with architecture of an infiniband translation bridge
A method and system for facilitating communication between computer subnets are provided. One embodiment of the present invention comprises presetting buffers in an internal subnet, wherein the...
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7155553 |
PCI express to PCI translation bridge
A PCI Express to PCI bridge enables upstream and downstream isochronous data transfer by modifying the PCI bus arbiter so that the PCI device on the PCI bus is treated as a virtual port for the...
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7152134 |
Interfacing a legacy data bus with a wideband data bus utilizing an embedded bus controller
Various methods and systems provide interfaces between legacy data buses such as MIL-STD 1553 buses and wideband data buses such as IEEE 1394 data buses. One technique for interfacing a legacy bus...
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7152130 |
Bus system for use with information processing apparatus
A processor bus linked with at least a processor, a memory bus linked with a main memory, and a system bus linked with at least an input/output device are connected to a three-way connection...
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7152110 |
Information exchange between non-networked devices through an intermediary device via a piconet
Information exchange among non-networked devices is disclosed. The information exchange occurs through instantaneous networks, like piconets, established between the non-networked devices and an...
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7152129 |
Apparatus having an inter-module data transfer confirming function, storage controlling apparatus, and interface module for the apparatus
In a storage controlling apparatus controlling an access from a host to a disk apparatus, for example, when a data transfer confirmation flag set in a data transfer descriptor is “ON”, a data...
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7149823 |
System and method for direct memory access from host without processor intervention wherein automatic access to memory during host start up does not occur
A method and system for allowing a host device (e.g., server) to perform programmed direct accesses to peripheral memory (e.g., flash) located on a peripheral device (e.g., HBA), without the...
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7149848 |
Computer system cache controller and methods of operation of a cache controller
In at least some embodiments, a computer system comprises a central processing unit (“CPU”), a bridge device coupled to a main memory, and a cache controller coupled between the bridge device...
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7149838 |
Method and apparatus for configuring multiple segment wired-AND bus systems
A special bus master, called a configuration host, “walks” a bus system to discover the bus topology and bus bridges that form that topology. Once the bridges have been located, the...
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7143227 |
Broadcast bridge apparatus for transferring data to redundant memory subsystems in a storage controller
A bus bridge apparatus for performing broadcasted writes to redundant memory subsystems in a network storage controller is disclosed. The bus bridge includes a PCI-X target that receives a write...
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7139860 |
On chip network with independent logical and physical layers
An OCN with independent logical and physical layers for enabling communication among integrated processing elements, including ports, bus gaskets and a physical layer interface. Each bus gasket...
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7139859 |
Inter-queue ordering mechanism
A device for implementing transaction ordering enforcement between different queues of a computer system interconnect using an inter-queue ordering mechanism. The device includes first and second...
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