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8725924 Information backup system with storing mechanism and method of operation thereof  
A method of operation of an information backup system includes: supplying a power to a first communication port and a second communication port; electrically connecting a host microcontroller to...
8706942 Direct memory access (DMA) address translation between peer-to-peer input/output (I/O) devices  
A method and apparatus is described herein for supporting direct memory accesses between peer I/O devices. It is determined whether a guest physical address (GPA) referenced by an access generated...
8698816 Graphics processing systems with multiple processors connected in a ring topology  
Multiple graphics processors in a graphics processing system are interconnected in a unidirectional or bidirectional ring topology, allowing pixels to transferred from any one graphics processor...
8688886 Bus transaction maintenance protocol  
A system-on-a-chip (SOC) bridge is described that applies an adapted delay, or latency, to data transfers across the bridge to avoid data corruption without reducing data transfer performance. The...
8683109 Computer system and bus assignment method  
To make it possible to take over an IO configuration that is assigned to logical partitions in reallocation of the logical partitions, and to make an IO access work normally. A computer system has...
8683107 Memory mapped input/output bus address range translation  
In an embodiment, a north chip receives a secondary bus identifier that identifies a bus that is immediately downstream from a bridge in a south chip, a subordinate bus identifier that identifies...
8677048 Communication with two or more storage devices via one SAS communication port  
One or more techniques and/or systems are disclosed for enabling communication between a SAS communication port of a SAS communication component and multiple storage devices. In a first example, a...
8667191 Managing and indentifying multiple memory storage devices  
A management hub is disclosed. The management hub comprises an interface; a master hub controller coupled to the interface; a plurality of ports coupled to the master hub controller; a...
8667195 Bus-system including an interconnector, a master device, a slave device, and an operating method thereof  
A system-on-chip bus system and an operating method of the same are provided. The bus system includes a master device, a slave device and an interconnector coupled between the master device and...
8654556 Registered DIMM memory system  
A Registered DIMM (RDIMM) system with reduced electrical loading on the data bus for increases memory capacity and operation frequency. In one embodiment, the data bus is buffered on the DIMM. In...
8650349 Memory mapped input/output bus address range translation for virtual bridges  
In an embodiment, a south chip comprises a first virtual bridge connected to a shared egress port and a second virtual bridge also connected to the shared egress port. The first virtual bridge...
8645606 Upbound input/output expansion request and response processing in a PCIe architecture  
Embodiments of the invention relate to upbound input/output expansion requests and response processing in a PCIE architecture. A first request to perform an operation on a host system is...
8631168 Input selection mechanism for a display device  
A television includes at least two ports (e.g. HDMI ports). The television polls the ports before presenting a user interface that displays some or all of the ports and before toggling between any...
8631183 Integrated circuit system, and data readout method  
An integrated circuit system includes: a first integrated circuit that is connected with a first data bus having first bus width and requires first time to perform data transmission and reception...
8626974 Methods and systems for reduced signal path count for interconnect signals within a storage system expander  
Methods and systems for reducing the signal path count between circuits within a SAS expander used for establishing SAS connections. The system comprises a SAS expander. The SAS expander comprises...
8626976 Method and apparatus for performing a host enumeration process  
A method and apparatus for host enumeration process. One embodiment of the method provides a bit to indicate to the host whether enumeration process should start or continue. The bit may be set...
8619554 Interconnecting initiator devices and recipient devices  
An interconnect block for a data processing apparatus, said interconnect block being operable to provide data routes via which one or more initiator devices may access one or more recipient...
8621127 Multi-processor device with groups of processors and respective separate external bus interfaces  
The present invention intends to provide a high-performance multi-processor device in which independent buses and external bus interfaces are provided for each group of processors of different...
8615621 Memory management  
An Accelerated Storage Controller (ASC) in an electronic device allows both conventional (slower) application processor to memory interfaces to be employed transparently to existing software,...
8607077 Multi-function integrated device and operating method thereof  
A multi-function integrated device and an operating method thereof are provided. The multi-function integrated device includes a data reading module, a network access module, and a power control...
8606983 Device and method for manipulating communication messages  
A device for manipulating communication messages in a communication system is provided, which communication system includes a data bus, and a plurality of nodes connected thereto, and an...
8606986 Methods and apparatus for bridged data transmission and protocol translation in a high-speed serialized data system  
An apparatus for transmitting data across a high-speed serial bus includes an IEEE 802.3-compliant PHY having a GMII interface; an IEEE 1394-compliant PHY in communication with the IEEE...
8599886 Methods and apparatus for reducing transfer qualifier signaling on a two-channel bus  
To facilitate efficient communications in a multi bus master system that communicates with a plurality of peripheral devices, a two channel bus is used that shares write and read addresses with...
8601196 Connector assembly  
A connector assembly includes first and second connectors, a flexible printed circuit board, first and second peripheral component interconnection express (PCIe) slots, and a jumper card. When the...
8595405 Systems and methods of communicatively coupling a host computing device and a peripheral device  
A method includes providing a bridge device (105) connected to a host computing device (101-1, 101-2) and a peripheral device (103-1, 103-2, 103-N, 403-1, 403-2, 405-1, 405-2, 405-3), the bridge...
8595397 Storage array assist architecture  
Disclosed is a storage system architecture. An Environmental service module (ESM) is coupled to one or more array controllers. The ESM is configured with a central processing unit and one or more...
8595406 USB-to-SATA high-speed bridge  
A system including a first controller configured to communicate with a host via a first interface; a second controller configured to communicate with a storage device via a second interface, where...
8589613 Method and system to improve the operations of an integrated non-transparent bridge device  
A method and system to improve the operations of an integrated non-transparent bridge device (NTB) that is coupled to another NTB device or Root Port device. The integrated NTB device has logic to...
8578069 Prefetching for a shared direct memory access (DMA) engine  
A system is disclosed for fetching control instructions for a direct memory access (DMA) engine shared between a plurality of threads. For a data transfer from a first thread by a DMA engine, the...
8566496 Data prefetch in SAS expanders  
A SAS expander collects data access information associated with a nexus and determines whether a data prefetch is appropriate. The SAS expander identifies potential data blocks utilizing previous...
8560753 Method and apparatus for remote input/output in a computer system  
A method and system for providing computer input/output (I/O) functionality within a remote computing environment. The system comprises a host audio controller and a remote audio controller for...
8549463 Die expansion bus  
A die expansion bus efficiently couples a supplemental portion of a processing system to an original portion of the processing system on a die. The die expansion bus couples bus subsystems of the...
8543740 Apparatus and method for increased address range of an I2C or I2C compatible bus  
An integrated circuit (IC) configured to operate as a slave on an inter-integrated circuit (I2C) or I2C compatible bus. The IC is further configured to receive an address through the I2C bus and...
8543746 Self-synchronizing data streaming between address-based producer and consumer circuits  
A circuit arrangement and method facilitate the direct streaming of data between producer and consumer circuits (12P, 12C) that are otherwise configured to communicate over an address-based...
8539131 Root hub virtual transaction translator  
Systems and methods of operating root hub host controllers provide for determining, at a protocol engine having a dedicated port, a speed of a device in response to a coupling of the device to the...
8527782 Power hub  
A USB hub utilizes an external power supply connection and rechargeable battery to provide a fully functional USB hub that provides portable backup power for USB devices. The hub includes a...
8527673 Direct access to a hardware device for virtual machines of a virtualized computer system  
In a virtualized computer system in which a guest operating system runs on a virtual machine of a virtualized computer system, a computer-implemented method of providing the guest operating system...
8521939 Injection of I/O messages  
A data processing system includes a processor core, a system memory coupled to the processor core, an input/output adapter (IOA), and an input/output (I/O) host bridge coupled to the processor...
8516577 Regulating atomic memory operations to prevent denial of service attack  
In one embodiment, the present invention includes a method for identifying a termination sequence for an atomic memory operation executed by a first thread, associating a timer with the first...
8516290 Clocking scheme for bridge system  
Various techniques are provided for bridging interfaces, such as different interfaces for use with a host device. In one example, a system includes an asynchronous first interface adapted to...
8504756 System, circuit and method for improving system-on-chip bandwidth performance for high latency peripheral read accesses  
A system, circuit and method for improving system-on-chip (SoC) bandwidth performance for high latency peripheral read accesses using a bridge circuit are disclosed. In one embodiment, the SoC...
8495270 Communication interface device and communication method  
A communication interface device includes: a first interface circuit including a chip select terminal connected to a first terminal, a clock terminal connected to a second terminal, and a data...
8495252 Implementing PCI-express memory domains for single root virtualized devices  
A method, system and computer program product are provided for implementing PCI-Express memory domains for single root virtualized devices. A PCI host bridge (PHB) includes a memory mapped IO...
8495398 Information handling system remote input/output connection system  
An information handling system (IHS) remote input/output (I/O) connection system includes an enclosure having a power button, a communication bus connection point, and an audio connection point. A...
8495271 Injection of I/O messages  
A data processing system includes a processor core, a system memory coupled to the processor core, an input/output adapter (IOA), and an input/output (I/O) host bridge coupled to the processor...
8489792 Transaction performance monitoring in a processor bus bridge  
Described embodiments provide a system having a bridge for connecting two different processor buses. A process monitor within the bridge allows for measuring latency of commands issued on a first...
8489794 Processor bus bridge for network processors or the like  
Described embodiments provide a system having a bridge for connecting two different processor buses. The bridge receives a command from a first bus, the command having an identification field...
8489788 Data processor and control system  
Provided are a data processor, and a control system, in which an interrupt controller and an event link controller are adopted. The event link controller responds to a generated event signal to...
8489791 Processor bus bridge security feature for network processors or the like  
Described embodiments provide a system having a bridge for communicating information between two processor buses. The bridge receives a command from a first bus, the command having an...
8484401 Systems and methods for conducting communications among components of multidomain industrial automation system  
An improved industrial automation system and communication system for implementation therein, and related methods of operation, are described herein. In at least some embodiments, the improved...