Matches 601 - 650 out of 671 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 >
Match Document Document Title
5793996 Bridge for interconnecting a computer system bus, an expansion bus and a video frame buffer  
In a computer system an apparatus interconnects a first bus, a second bus and a frame buffer, wherein the first bus and the second bus are of incompatible bus architecture types. For example the...
5794000 Method and apparatus for avoiding erroneous abort occurrences in PCI-bus systems  
After a PCI device has commenced a transaction on an external PCI bus to access a PCI device on an internal PCI bus, an external PCI bus bridge implemented in a DS-PCI/ISA bridge device, connected...
5790884 Integrated controller with first and second controller controlling information transfers when the input address ranges falls within ranges controlled by first and second controller respectively  
The pin count of an integrated ISA-type bus controller and PCMCIA-type bus controller is reduced by utilizing a single external bus which supports both ISA-type and PCMCIA-type devices, and by...
5781746 Microprocessor with multiple bus configurations  
A microprocessor includes a processor unit with an internal bus and a programmable bus control unit with an external bus. The bus control unit interconnects the internal bus with the external bus...
5778203 Aircraft display and control system with virtual backplane architecture  
An aircraft control system improves system flexibility, scalability, redundancy, and separation. The system uses a "virtual backplane" architecture which maximizes system flexibility and...
5774681 Method and apparatus for controlling a response timing of a target ready signal on a PCI bridge  
A PCI-ISA bridge device includes a PCI interface for driving a target ready signal line when PCI-ISA bridge device is address-specified as a current target by a read cycle on a PCI bus, and a...
5768547 Multiple segmenting of main memory to streamline data paths in a computing system  
Within a computing system, the main memory is segmented in order to streamline data paths for data transactions between input/output devices. The computing system includes both a host bus and an...
5768548 Bus bridge for responding to received first write command by storing data and for responding to received second write command by transferring the stored data  
A bus with bus commands which optimize the management of buffers within a bus bridge is disclosed. The bus incorporates at least two types of write commands, a Postable Memory Write command and a...
5764934 Processor subsystem for use with a universal computer architecture  
A processor subsystem includes a processor and a bus bridge conversion device for insertion into a slot of a host computer system. The processor operates according to a signaling protocol which is...
5761462 Method and system for supporting peripheral component interconnect (PCI) peer-to-peer access across multiple PCI host bridges within a data-processing system  
A method for supporting peer-to-peer access across separate Peripheral Component Interconnect (PCI) host bridges within a data-processing system is described. In accordance with the method and...
5761461 Method and system for preventing peripheral component interconnect (PCI) peer-to-peer access across multiple PCI host bridges within a data processing system  
A method for preventing peer-to-peer access across separate Peripheral Component Interconnect (PCI) host bridges within a data-processing system is described. In accordance with the method and...
5761464 Prefetching variable length data  
An interface unit connected between a first bus and a second bus, the first bus having connected thereto a memory system and the second bus having connected thereto a plurality of devices which...
5745795 SCSI connector and Y cable configuration which selectively provides single or dual SCSI channels on a single standard SCSI connector  
A SCSI controller card which includes a standard SCSI connector that can support either one or two SCSI channels, as desired. The connector can receive either a standard single channel cable or a...
5740386 Adaptive expansion bus  
A bus system is disclosed which includes first and second buses are coupled via an bus switch. The bus switch may be selectively turned on and off thus allowing the bus system to be electronically...
5734850 Transparent bridge between of a computer system and a method of interfacing the buses to operate as a single logical bus  
A bridge and a method for interfacing a plurality of buses with the bridge provides electrical isolation between the buses but is transparent so that the plurality of buses is viewed by software as...
5729703 Bus control operating system having bi-directional address lines, integrated onto same chip as main controller  
A bus control operating system integrated in one chip with a main controller, which employs some of address bus lines operated in bi-directional mode, by interchanging signals between the main...
5704048 Integrated microprocessor with internal bus and on-chip peripheral  
A microprocessor assembly includes an integrated microprocessor and an external bus having a plurality of signal lines and a corresponding number of terminals connected to the integrated...
5680555 Host adapter providing automatic terminator configuration  
A host adapter, having at least two connectors which both belong to a single digital computer bus, includes a first terminator that is coupled to a first portion of the digital computer bus, and a...
5673400 Method and apparatus for identifying and controlling a target peripheral device in a multiple bus system  
An apparatus and method for controlling devices in a multiple bus system such as a system having two or more ISA type buses. Separate ISA bus controllers may be provided for each ISA bus, linked on...
5655112 Method and apparatus for enabling data paths on a remote bus  
A method for enabling data paths including the steps of receiving a request to enable a data path on a remote bus between a first processing apparatus and a second processing apparatus, determining...
5638541 System and method for managing power on desktop systems  
A Power Management driver employed within an APM system of a computer system including an operating system driver ("APM driver") and a Basic Input/Output System ("APM BIOS"). The Power Management...
5611056 Method for controlling the expansion of connections to a SCSI bus  
The present invention is useful in a data processing system having a data processor coupled to a SCSI channel disposed for transmitting and receiving data between the data processor and a...
5598543 Method of interfacing between data transmission systems having an unequal number of transceiver ports  
A method of interfacing between data transmission systems having an unequal number of transceiver ports includes generating an information signal within a first data transmission system and...
5588125 Method and apparatus for increasing bus bandwidth on a system bus by inhibiting interrupts while posted I/O write operations are pending  
A system for inhibiting interrupts during posted write transfers in a computer system utilizes a buffer to store incoming data and addresses while monitoring incoming addresses to determine if the...
5559968 Non-conforming PCI bus master timing compensation circuit  
A circuit for preventing a non-conforming PCI bus master from performing cycles where the address driven is not provided soon enough for receiving circuitry to latch the address. The circuit...
5557757 High performance integrated processor architecture including a sub-bus control unit for generating signals to control a secondary, non-multiplexed external bus  
An integrated processor that employs a bus interface unit to accommodate high performance data transfers via an external peripheral interconnect bus with multiplexed address/data lines. The...
5550989 Bridge circuit that can eliminate invalid data during information transfer between buses of different bitwidths  
Hardware logic within a host bridge that connects a CPU local bus to a peripheral bus that determines if data to be transmitted on the CPU local bus is non-contiguous and, if so, substitutes...
5548732 Bus adapter for transferring signals between a master unit and a slave unit, and system including the bus adapter  
Handshake control for data transfer in a computer system having a master unit connected to a bus adapter through an expansion bus, which bus adapter is connected to slave units through a main bus,...
5544334 Micro channel bus computer system with IDE hard drive interface  
A computer system having: a central processing unit (CPU), having a system bus associated therewith, a first bus interface circuit (BIC) in circuit communication with the CPU and generating a...
5542055 System for counting the number of peripheral buses in each hierarch connected to primary bus for creating map of peripheral buses to locate peripheral devices  
The present invention provides a program that creates a preliminary map of a multiple bus network used to connect peripheral devices to the central processing unit of an information handling...
5535343 Method and apparatus for generating write signals  
A write pulse generator circuit which uses first and second flip-flop circuits adapted to provide output pulses to an exclusive OR gate to generate write pulses. The circuit includes apparatus for...
5524217 System having different signal transfer modes for detecting and restoring logical levels and blocking operation when restored signal outputs are on a predetermined level  
To enable wired-OR signal lines to be connected without interlock in a bus linkage unit for connecting the bus of a computer system with the bus of an expansion device or the bus of another...
5511224 Configurable network using dual system busses with common protocol compatible for store-through and non-store-through cache memories  
A network of digital modules having store-through and non-store-through cache memories, is provided with intercommunication capability by means of two sets of system busses each of which are...
5500946 Integrated dual bus controller  
A dual bus controller includes a system bus control module connected to a local bus control module. An optional filter is also connected to the system bus control module. A plurality of...
5471585 Personal computer system with input/output controller having serial/parallel ports and a feedback line indicating readiness of the ports  
This invention relates to personal computers, and more particularly to a personal computer system having an Input/Output (I/O) controller which imparts flexibility to the system design and...
5434983 Data processing apparatus having first bus with bus arbitration independent of CPU, second bus for CPU, and gate between first and second buses  
An image processing apparatus containing a first bus, a second bus, a CPU connected to the first bus, a plurality of bus user units respectively connected to the second bus, a bus control unit...
5428751 Work station including a direct memory access controller and interfacing means to a data channel  
A work station having a local bus connected to a CPU, and an interface chip connected between an external bus and the local bus, The buses have different operating frequencies, The interface chip...
5410656 Work station interfacing means having burst mode capability  
A work station, including a central processing unit (CPU), first, second and third integrated circuit interface chips, connected to an external bus, memory and peripheral unit, respectively, and a...
5404464 Bus control system and method that selectively generate an early address strobe  
An improved bus architecture system for use in a multi-processor computer system has a shared address bus and a shared data bus, and has at least two separate memory modules. The system reduces the...
5377328 Technique for providing improved signal integrity on computer systems interface buses  
An interface system for transmitting a pulse waveform signal between a host computer and a plurality of peripheral units wherein such signal is transmitted on a dedicated bus, the peripheral units...
5371863 High speed processor bus extension  
A high speed, synchronous, processor bus is physically and electrically extended by a bus extension unit to provide data communication between a number of data handling units. The bus extension...
5363492 Internal bus for work station interfacing means  
A work station, including a central processing unit (CPU), first, second and third integrated circuit interface chips connected to an external bus, memory and peripheral unit, respectively, and a...
5355455 Method and apparatus for avoiding deadlock in a computer system with two or more protocol-controlled buses interconnected by a bus adaptor  
A method and an apparatus to avoid a deadlock in a computer system with several busses connected by a bus adapter. If units of different busses of the computer system simultaneously start...
5345566 Method and apparatus for controlling dual bus system  
A method and apparatus for controlling a dual bus system, capable of realizing high speed and continuous operation even if one of the buses of the dual bus system fails. The method and apparatus...
5335326 Multichannel FIFO device channel sequencer  
The present invention is bus to bus interface for connecting a first bus to a second bus. A control means includes first and second control sequence means, substantially similar, for tracking and...
5274795 Peripheral I/O bus and programmable bus interface for computer data acquisition  
A bus interfacing device suitable for use in computerized data acquisition systems for interfacing a main processor bus to an auxiliary peripheral bus. The operation of peripherals connected to the...
5265228 Apparatus for transfer of data units between buses  
The present invention includes a data transfer system (28) which includes a first bus (32) and a second bus (34) wherein both buses are bidirectionally connected to a first memory (30). Similarly,...
5261077 Configurable data path arrangement for resolving data type incompatibility  
Apparatus for sharing data between processors having certain incompatible data formats is provided. A configurable data path unit and an address mapping unit allow a peripheral processor to access...
5138703 Method of and apparatus for expanding system bus  
A method and apparatus for bus expansion, which provides a capability of transferring a data word from a first unit connected to a system bus to a second unit connected to an extension bus, with...
5079692 Controller which allows direct access by processor to peripheral units  
A controller such as a CRT controller is connected to a microprocessor via a system bus and has connecting terminals for its peripheral units. This controller is provided with a control terminal...
Matches 601 - 650 out of 671 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 >