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7043594 Local bus bridge  
In a serial bus network, an environment is provided, in which the serial bus is divided to two local buses and a specific terminal connected to one of the local buses can reliably occupy other...
7039746 Interface circuit, disc controller, disc drive apparatus and interface control method  
An interface circuit includes an interface communication section for performing communication with an upstream device; a system interface communication section for performing communication with a...
7035956 Transmission control circuit, reception control circuit, communications control circuit, and communications control unit  
A communications control circuit includes: a common work RAM storing communications data; an address register; a data-set-count register; an information register; an address counter; a data set...
7035957 Bus bridge circuit, bus connection system, and buffer control method for bus bridge circuit  
A PCI bridge circuit connects to first and second PCI buses and performs data transfer between PCI devices. The PCI bridge circuit has a data buffer and controller and the controller 70, prior to...
7028130 Generating multiple traffic classes on a PCI Express fabric from PCI devices  
A system having a PCI Express fabric and PCI devices connected thereto transmits data from the PCI devices having PCI Express traffic classes assigned. A PCI Express to PCI bridge assigns a...
7028129 Method and apparatus for converting an external memory access into a local memory access in a processor core  
A processor may include a processor core, which interprets and executes instructions, and a system bus interface, which enables the processor to communicate with a system. The system bus interface...
7024495 Programmable controller  
A programmable controller has a multi-purpose processor such as an MPU and an application specific control device such as an ASIC (application specific integrated circuit). When the MPU requests...
7024509 Passive release avoidance technique  
A system and method avoids passive release of interrupts in a computer system. The computer system includes a plurality of processors, a plurality of input/output (I/O) devices each capable of...
7020199 Method and apparatus for processing MPEG data  
A data proccssing device, for example, an MPEG decoder, comprises a bus system [BUS] over which a transmitter circuit, for example a variable length decoder circuit [VLD], can transfer a series of...
7020732 Split computer architecture  
A network interface is described in which a single computer bus is split over a long distance into two or more inter-communicating buses. On one bus, processing and applications are provided and...
7020728 Programmable serial interface  
A programmable serial interface device. The device generally comprises a programmable logic device and another die mounted to an assembly apparatus. The programmable logic device may comprise (i)...
7020733 Data bus system and method for performing cross-access between buses  
A data bus system, capable of distributing devices including first and second data buses capable of transmitting data among a plurality of devices; a register block that stores information on a...
7017000 Data transfer control circuit in system LSI  
Two bus masters share an external device. One particular bus master has an arrangement for issuing a data pre-read instruction, at the time of issuing a data read request. Upon reception of the...
7013358 System for signaling serialized interrupts using message signaled interrupts  
The present invention provides a system for signaling legacy serialized interrupts within a PCI-Express environment, using message signaled interrupts. The system provides structures and methods...
7010630 Communicating to system management in a data processing system  
A data processing system in which standard communication resource facilities are used to enable direct communication to a system management facility. In one implementation, the management adapter...
7010638 High speed bridge controller adaptable to non-standard device configuration  
A bridge controller controls the data flow to/from a USB bus to/from an ATA/ATAPI drive, such as an ATA hard drive or ATAPI CD or DVD drive. The bridge controller has a state machine which...
7007126 Accessing a primary bus messaging unit from a secondary bus through a PCI bridge  
An I/O subsystem having a processor, a bridge unit, and an I/O messaging unit that couple a primary, secondary and tertiary bus in a computer system. The bridge unit is configurable to claim...
7007097 Method and system for covering multiple resourcces with a single credit in a computer system  
A method and system for communicating to a sender an availability of receiving a new message includes providing buffers having at least one corresponding slot for storing a message and providing a...
7003614 Method and apparatus for utilizing different frequencies on a bus based on a number of cards coupled to the bus  
An apparatus and method are provided for operating a PCI-X bus. A device may be provided to determine a number of PCI-X cards coupled to the bus. A mechanism may be provided to control a frequency...
7003607 Managing a controller embedded in a bridge  
A method and apparatus is provided for managing a controller embedded in a south bridge. The method includes determining if the south bridge of a processor-based system is configured to operate in...
7000060 Method and apparatus for ordering interconnect transactions in a computer system  
A system allows queuing interconnect transactions of a first transaction type and a second transaction type according to an interconnect protocol for a computer system with multiple nodes in a...
6999454 Information routing system and apparatus  
An information routing system and apparatus includes separate control and forwarding planes. The control plane is split into box management control functions and routing control functions. The box...
7000057 Method and apparatus for adding OTG dual role device capability to a USB peripheral  
An apparatus comprising a first circuit, a second circuit and a third circuit. The first circuit may be configured to communicate as a host through a first interface. The second circuit may be...
6996659 Generic bridge core  
An apparatus comprising a plurality of first circuits and a second circuit. Each of the first circuits may be configured to translate attributes and data between one of a plurality of first...
6996654 Systems and methods for generating multiple transaction identifiers to reduced latency in computer architecture  
Systems and methods generate transaction identifiers. A plurality of available transaction identifiers are generated for use in identifying future transactions from a first bus. A new transaction...
6993614 Management methods and apparatus that are independent of operating systems  
The present invention relates to a management agent that can be ran on any operating system. More specifically, the management agent of the present invention is implemented with a set of...
6990549 Low pin count (LPC) I/O bridge  
A low pin count (LPC) input/output (I/O) bridge device and method for a portable computer having a plurality of legacy ports and a docking connector. The LPC I/O bridge device includes an LPC...
6985991 Bridge element enabled module and method  
In a computer system, a bridge element enabled module (102) includes a bridge element (106) that communicates with a communications network using a protocol (130) selected from a group of...
6985990 System and method for implementing private devices on a secondary peripheral component interface  
Private devices are implemented on the secondary interface of PCI bridge by re-routing the activation of device select signals (IDSEL) during the address phase of a Type 0 configuration operation...
6985365 Topology for flexible and precise signal timing adjustment  
The system and methods describe a computer system implementing an adjustable control signal path whose length may be precisely adjusted to control timing of a control signal that propagates along...
6985988 System-on-a-Chip structure having a multiple channel bus bridge  
A system-on-a-chip integrated circuit structure includes a bridge having a plurality of channels, a processor local bus connected to the bridge (wherein the bridge includes a first channel...
6981088 System and method of transferring data words between master and slave devices  
A data bus bridge circuit and method are provided for coupling a slave device with a data bus in a system in which data words are transferred between a master device and the slave device over the...
6978337 Serial ATA controller having failover function  
A select circuit including a first device bridge to communicate a first stream of information between a first Serial ATA bus and a storage device bus. A second device bridge to communicate a...
6976190 Serial ATA disk drive having a parallel ATA test interface and method  
A serial ATA disk drive having a parallel ATA test interface is disclosed. A bridge circuit has a serial ATA port that is coupled to a serial ATA interface for receiving and transmitting serial...
6976108 System on a chip having a system bus, an external bus, and a bus arbiter with programmable priorities for both buses, software, and method for assigning programmable priorities  
A system on a chip has functional blocks accommodated by at least one system bus, and an external bus for accommodating communication with external blocks. A single multi-jurisdictional bus...
6973527 Electrical circuit for a bus interface and/or a bus bridge for performing a function  
An electrical circuit for a bus interface and/or a bus bridge is described. The electrical circuit comprises a global master being coupled with a first bus and at least one function block being...
6968415 Opaque memory region for I/O adapter transparent bridge  
An opaque memory region for a bridge of an I/O adapter. The opaque memory region is inaccessible to memory transactions which traverse the bridge either from a primary bus to secondary bus or...
6968418 Data forwarding by host/PCI-X bridges with buffered packet size determined using system information  
Embodiments are provided in which a method is described for transferring data in a digital system comprising a first bus, a second bus, and a bridge coupling the first and second buses. During...
6965955 Peripheral apparatus, control method for peripheral apparatus, memory medium, and information processing system  
A peripheral apparatus, a control method for the peripheral apparatus, a memory medium, and an information processing system, in which performance of a connected host computer is not deteriorated...
6963948 Microcomputer bridge architecture with an embedded microcontroller  
An integrated circuit, a computer system, and a method of operating the computer system. The integrated circuit includes an internal bus, a microcontroller connected to the internal bus, an...
6963938 Information processing apparatus and method therefor  
If a block read cannot be used to read out from a configuration ROM information, the number of times of issue of a quadlet read request increases. This degrades the processing efficiently of a...
6961800 Method for improving processor performance  
Methods for improving processor performance. Specifically, by reducing some of the latency cycles within a host controller, request processing speed can be improved. One technique for improving...
6956588 Liaison technology to connect plural end user devices to an interface for a computing resource having one port assigned to the interface  
A port-multiplexed system (and associated method and software) are disclosed. Such a system includes: a computing resource having a port; a monitoring interface to the computing resource available...
6957288 Embedded control and monitoring of hard disk drives in an information handling system  
The need for a SAF-TE processor embedded on a SCSI backplane of a hot-swap hard disk drive enclosure is eliminated by utilizing the functionality of a RAID on motherboard (ROMB) controller and an...
6954818 Providing a burst mode data transfer proxy for bridging a bus  
A computer system component serves as a burst mode data transfer proxy for bridging a bus operable in burst transfer mode and a single transfer mode bus. FIFOs, associated with respective DMA...
6954817 Providing at least one peer connection between a plurality of coupling facilities to couple the plurality of coupling facilities  
A coupling facility is coupled to one or more other coupling facilities via one or more peer links. The coupling of the facilities enables various functions to be supported, including the...
6950897 Method and apparatus for a dual mode PCI/PCI-X device  
A technique is disclosed for facilitating data processing in a computer system. The technique utilizes logic to implement a dual mode design for PCI/PCI-X computer systems that enables optimal...
6949409 Register setting method and semiconductor device  
A register setting method which facilitates writing of change information into a register for storing operation condition information that defines the operation of a device. The method includes...
6948024 Expander device for isolating bus segments in I/O subsystem  
An expander device and method for isolating bus segments from one another in an I/O subsystem. The expander device is arranged to couple the bus segments for communication in the I/O subsystem....
6941406 System having interfaces and switch that separates coherent and packet traffic  
An apparatus includes one or more interface circuits, an interconnect, a memory controller, a memory bridge, a packet DMA circuit, and a switch. The memory controller, the memory bridge, and the...