Matches 551 - 600 out of 671 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 >
Match Document Document Title
6167477 Computer system bridge employing a resource control mechanism with programmable registers to control resource allocation  
A bridge for a computer system comprising at least a first processing set and a second processing set each connected to the bridge via an I/O bus. A resource control mechanism in the bridge...
6161165 High performance data path with XOR on the fly  
A high performance data path for performing XOR on the fly. A first memory is connected to a first bus and a second memory is connected to a second bus selectively coupled to the first bus. Logic...
6148358 Separately-controlled multi-task computer system  
A computer system is provided, by which USB devices or the like can be multi-task-operated. The system comprises a first input and output device for inputting and outputting data; a first...
6141717 Microcomputer having bus isolation means for selectively coupling an external bus to either a memory bus or a peripheral bus for testing of memory and peripheral circuits  
A microcomputer for allowing a connector in a bus isolation mode to connection an external bus to either a memory bus or a peripheral bus as designated by an externally input mode signal. The...
6119194 Method and apparatus for monitoring universal serial bus activity  
A USB host controller provides transaction type status signals indicating USB activity type. The status signals include a bulk status bit signal indicative of bulk activity on a USB, a control...
6115772 System and method for host expansion and connection adaptability for a SCSI storage array  
An interface for expanding the number of SCSI hosts that can access a storage array includes a SCSI interface chip for receiving a SCSI command from a host via a SCSI bus, a domain indicator for...
6112271 Multiconfiguration backplane  
A multiconfiguration backplane (100) can be configured in four different configurations: dual, extended, active/standby and active/active. The multiconfiguration backplane (100) has a first COMPACT...
6108739 Method and system for avoiding starvation and deadlocks in a split-response interconnect of a computer system  
A system and method for avoiding starvation and deadlocks in a split-response-bus multiprocessor computer system. The multiprocessor computer system includes a first node and a second node coupled...
6105096 Computer communication using fiber-optic cable  
A simple connection arrangement is provided for inter-communicating a portable computer and a desktop computer. Each computer is provided with a 2:1 optical coupler for transmitting and receiving...
6098136 Multiple bus system using a data transfer unit  
A processor bus linked with at least a processor, a memory bus linked with a main memory, and a system bus linked with at least an input/output device are connected to a three-way connection...
6088761 Reduced pin system interface  
The present invention provides an electronic system which includes an integrated circuit chip having a processor, a memory controller and a bus interface. The bus interface is both a memory...
6085269 Configurable expansion bus controller in a microprocessor-based system  
A host module (2) including a host CPU (10) and a configurable expansion bus controller (28, 28', 128) is disclosed. The expansion bus controller (28, 28', 128) is configurable by way of...
6078977 Hierarchical bus structure access system  
A system and method for reducing the time required to access peripheral devices or to perform peripheral device operations in a multiple bus architecture or hierarchical bus structure environment....
6078973 System controller interfacing a main memory and a modem and transferring data directly between dedicated region of the memory and the modem I/O circuitry  
Circuitry is described for interfacing a software-based modem in a computer system. Memory/modem interface circuitry is integrated within a system controller coupling a main memory with a...
6076142 User configurable raid system with multiple data bus segments and removable electrical bridges  
A user configurable RAID system designed to provide RAID functions as well as mass storage functions in a non-RAID mode. Flexibility is built into the system to allow the user to configure the SCSI...
6073195 Bus controllers ensuring reduced power consumption and stable operation  
A bus controller includes a plurality of bus connectors provided in a bus so as to respectively and selectively connect a plurality of bus agents to the bus and disconnect the plurality of bus...
6067596 Flexible placement of GTL end points using double termination points  
A highly parallel computer system including dual processors and dual memory controllers are coupled to an Assisted Gunning Transceiver Logic Plus (AGTL+) high speed system bus. The microprocessors...
6052752 Hierarchical dual bus architecture for use in an electronic switching system employing a distributed control architecture  
A bus architecture for use in a data communication system provides a communication path between processors and one or more external devices including (M+1) hierarchical processors. Each of the...
6041380 Method for increasing the number of devices capable of being operably connected to a host bus  
The present invention comprises a method of operating a computer system comprising issuing transactions on a first bus following a bus protocol, wherein the transactions comprise a plurality of bus...
6026218 Computer system employing a bus snooping multimedia subsystem for implementing video multicast transactions  
A bus snooping multimedia subsystem for implementing video multicast transactions. A multimedia data source such as a video input digitizer is coupled to an expansion bus of a computer system. A...
6003103 Method for attachment or integration of a bios device into a computer system using a local bus  
Chipset or a device for attachment of the ROM BIOS within the system architecture. Although normally attached to the ISA bus, the ROM BIOS may be attached to an alternate bus (typically a...
5958035 State machine based bus cycle completion checking in a bus bridge verification system  
In a computer system having a bus bridge connecting a plurality of system buses, a methodology for checking completion of a bus cycle in a bus bridge verification system is disclosed. The...
5951665 Interface optimized computer system architecture  
A computer system includes a bus system; a pluggable central processing unit circuit board, coupled to the bus system; a pluggable logic board coupled to the pluggable central processing unit...
5938777 Cycle list based bus cycle resolution checking in a bus bridge verification system  
In a computer system having a bus bridge connecting a plurality of system buses, a cycle list based bus cycle resolution checking system and method have been disclosed. Each bus in the system is...
5935233 Computer system with a switch interconnector for computer devices  
A computer bridge interconnects a plurality of computer buses. The computer bridge includes first and second bus interfaces structured for coupling to first and second computer buses, respectively....
5937170 Data communications with processor-assertable addresses mapped to peripheral-accessible-addresses-times-command product space  
A computer system includes a microprocessor running in big-endian mode and both big-endian and little-endian peripherals, including a little-endian SCSI controller that controls a hard disk. When a...
5930482 Transaction checking system for verifying bus bridges in multi-master bus systems  
A transaction checking system and method to verify bus bridges in multi-master bus systems are described. A state machine model is created for each bus in the system. An initiator cycle list and a...
5930488 Semiconductor integrated circuit device with a central processing unit, a data transfer controller and a memory storing data transfer parameters  
The invention provides a semiconductor integrated circuit device, which minimizes an increase in the physical and logical size, allows data transfers invoked by a large number of interrupts, and...
5923860 Apparatus, method and system for remote peripheral component interconnect bus using accelerated graphics port logic circuits  
A multiple use core logic chip set is provided in a computer system that may be configured either as a bridge between an accelerated graphics port ("AGP") bus and host and memory buses, as a bridge...
5918028 Apparatus and method for smart host bus adapter for personal computer cards  
A system is shown to improve data transfer between computers and PC Cards, which have a Host Bus Adapter (HBA). Previous HBA designs are limited in routing interrupts to the system and transferring...
5905879 System and method for transferring periodic data streams on a multimedia bus  
A computer system optimized for real-time applications which provides increased performance over current computer architectures. The system includes a standard local system bus, such as the PCI...
5881250 Host adapter system including an integrated PCI buffer controller and XOR function circuit  
A host adapter system includes a secondary computer bus, a plurality of I/O buses, and a plurality of host adapter circuits. Each host adapter circuit is connected to the secondary computer bus and...
5881249 I/O bus  
A new I/O bus which may be used in constructing a multiple drive library computer system which is repairable while the system remains online. The I/O bus generally operates under a SCSI-type...
5878239 Method and apparatus for processing a target retry from a PCI target device to an ISA master devise using a PCI/ISA bridge  
When an ISA bus master on an external ISA bus tries to access a device on a PCI bus, a desk station-PCI/ISA (DS-PSI/ISA) bridge device converts a bus cycle on the ISA bus to a PCI bus cycle and...
5872942 Computer system having a multimedia bus and comprising a centralized I/O processor which performs intelligent byte slicing  
A computer system optimized for real-time applications which provides increased performance over current computer architectures. The system includes a standard local system bus or expansion bus,...
5864688 Apparatus and method for positively and subtractively decoding addresses on a bus  
A computer system having an expansion base for docking a portable portion of the computer system includes a bridge circuit for adaptively decoding addresses on a bus based on the docking status....
5859988 Triple-port bus bridge  
A bridge coupling a primary bus to two secondary buses. The bridge contains three interfaces, one for the primary bus and the other two for the two secondary buses. Control circuitry is included...
5859989 Apparatus method and system for 64 bit peripheral component interconnect bus using accelerated graphics port logic circuits  
A multiple use core logic chip set is provided in a computer system that may be configured either as a bridge between an accelerated graphics port ("AGP") bus and host and memory buses, as a bridge...
5857085 Interface device for XT/AT system devices on high speed local bus  
A host bus interface device is provided for interfacing a processor coupled to a host bus to XT/AT legacy I/O devices and a high speed bus. The legacy I/O devices include an interrupt controller,...
5857086 Apparatus method and system for peripheral component interconnect bus using accelerated graphics port logic circuits  
A multiple use core logic chip set is provided in a computer system that may be configured either as a bridge between an accelerated graphics port ("AGP") bus and host and memory buses, as a bridge...
5848252 Peripheral component interconnect gateway controller  
A gateway controller (100) for facilitating the exchange of information between PCI busses (101,103). The controller (100) may comprise a single printed wiring board (301) or two printed wiring...
5838931 Method and apparatus for enabling a processor to access an external component through a private bus or a shared bus  
A method and an apparatus for enabling a processor to access an external component through either a private bus or a shared bus. One embodiment of the present invention is an external memory access...
5832242 Inter-chip bus with equal access between masters without arbitration  
A computer system, comprising a first expansion bus which operates according to a first transfer protocol. The first expansion bus is adapted to couple to one or more peripheral devices. A central...
5832245 Method for isochronous flow control across an inter-chip bus  
A method for communicating data to a plurality of peripheral devices in a computer system, the computer system comprising a first bus, a bus bridge for coupling to the first bus and for interfacing...
5826048 PCI bus with reduced number of signals  
A Mini-PCI (MPCI) interface, and associated circuits and methods are provided for connecting a Peripheral Component Interconnect (PCI) device to one or more external devices. The MPCI interface,...
5812800 Computer system which includes a local expansion bus and a dedicated real-time bus and including a multimedia memory for increased multi-media performance  
A computer system optimized for real-time applications which provides increased performance over current computer architectures. The system includes a standard local bus, such as the PCI bus, and...
5809260 Burst mode data transmission retry of previously aborted block transfer of data  
Blocks of data are transferred in burst mode from a first device attached to a first bus, to a second device attached to a second bus having time multiplexed address/data lines. A bridge circuit...
5809259 Semiconductor integrated circuit device  
The invention provides a semiconductor integrated circuit device, which minimizes an increase in the physical and logical size, allows data transfers invoked by a large number of interrupts, and...
5809261 System and method for transferring data streams simultaneously on multiple buses in a computer system  
A computer system optimized for real-time applications which provides increased performance over current computer architectures. The system includes a standard local system bus, such as the PCI...
5805845 Method for loading memory with program and data information from PC memory across a bridging bus  
A method for transferring data between devices in a computer system, the computer system comprising a first bus, a bus bridge for coupling to the first bus and for interfacing to a second bus, a...
Matches 551 - 600 out of 671 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 >