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7360006 Apparatus and method for managing voltage buses  
The present technique relates to a method and apparatus for managing voltage buses. In a memory device, such as SRAM or DRAM, a periphery voltage bus may supply voltage to periphery circuitry and...
7356634 Device including serial interface  
A bridge accessible by a host processor can expand access over a first bus to a second bus. The first bus and the second bus are each adapted to separately connect to respective ones of a...
7356633 Composing on-chip interconnects with configurable interfaces  
Embodiments of apparatuses, systems, and methods are described for composing on-chip interconnects with configurable interfaces. A configurable interface includes a configurable agent and...
7353315 Bus controller with virtual bridge  
A bus controller and a control method are used in a computer system. In a bus controller, a bus controller main circuit issues a first signal to the central processing unit in response to a bus...
7353314 Time-out control apparatus, terminal unit, time-out control system and time-out procedure  
The present invention is built on a time out control apparatus to control the time out when a packet is transferred between terminal units connected to different buses. In the time out control...
7353362 Multiprocessor subsystem in SoC with bridge between processor clusters interconnetion and SoC system bus  
A System-on-Chip (SoC) component comprising a single independent multiprocessor subsystem core including a plurality of multiple processors, each multiple processor having a local memory...
7350013 Bus communication apparatus for programmable logic devices and associated methods  
A programmable logic device (PLD) includes programmable logic circuitry and a bridge circuitry. The bridge circuitry includes a first interface circuitry and a first signal select circuitry. The...
7346721 Method and device for connecting a storage device with a plurality of controllers to a host computer during power-on time or hot plug time  
A method of connecting a storage device to a host computer has a first connection processing for enabling a host interface in advance even when the storage device is not ready yet, and a second...
7346725 Method and apparatus for generating traffic in an electronic bridge via a local controller  
A system to monitor performance of a computing device includes a first bridge to interface with a first set of devices, and a second bridge to interface with a second set of devices. Configuration...
7346727 Method and system for control of a first device by data storage device through storing different values within task file register by the data storage device and reading task file register and performing corresponding predetermined operations by the first device via an IDE bus  
A system includes a first device; an Integrated Drive Electronics (IDE) bus; and a data storage device having a first task file register, the data storage device being coupled to the first device...
7346724 Enabling multiple ATA devices using a single bus bridge  
Embodiments of the invention include a bus bridge that is capable of communicating with more than one MSC device coupled to it. In some embodiments, the bridge includes a LUN processor that...
7346717 Control board, image forming apparatus having the same, control board management method, computer program, and computer-readable storage medium  
A control board includes a main-board and a plurality of sub-boards which control loads. The sub-boards each include a providing unit which provides a board type ID, a read unit which reads an...
7346728 Method and apparatus for a hub capable of being self-powered for use in a USB-compliant system  
Method and apparatus are described for improving information transfer over USB. In one approach, hub-based extension is realized wherein power is distributed using auxiliary wiring distinct from...
7343451 Disk array device and remote copying control method for disk array device  
Various types of resources of the disk array device are divided for respective users and communications resources used in remote copying are appropriately assigned to the users so that functional...
7340548 On-chip bus  
This disclosure involves an on-chip bus architecture involving an on-chip bus that includes a collector node and at least one device node. Each device node is in communication with an on-chip...
7340552 Bus control system  
In a data processing system, a plurality of modules connected to a system bus thereof are assigned with identifiers. When a source module initiates a split read access to another module, the...
7340555 RAID system for performing efficient mirrored posted-write operations  
A bus bridge on a primary RAID controller receives user write data from a host and writes the data to its write cache and also broadcasts the data over a high speed link (e.g., PCI-Express) to a...
7340557 Switching method and system for multiple GPU support  
A system and method for supporting multiple graphics processing units (GPUs) includes a first communication path coupled to a root complex device and a first connection point of a first GPU. A...
7337259 Smart card virtual hub  
A smart card virtual hub combines an ISO7816 compliant smart card reader interface with a USB hub that provides one or more attachment points for connection of devices to the USB bus, thereby...
7334074 Method and system for multi-channel transfer of data and control  
A system and method for transferring information in a multi-channel, point-to-point environment are described. In one embodiment, a number of processing chips are connected to a bridge bus. A...
7334233 Method and apparatus for multiple slaves to receive data from multiple masters in a data processing system  
A method, apparatus, and computer instructions for managing requests for data by processes in a data processing system. Requests for data from the processes in slave mode are tracked. Data...
7334234 Method and apparatus for transferring data to virtual devices behind a bus expander  
A method, apparatus, and computer instructions for transferring data from a master to a set of applications executing on a slave. Data is received from a master at a device driver in the slave....
7334071 Expansion of cross-domain addressing for PCI-express packets passing through non-transparent bridge  
A PCI-Express compatible switch is provided with two or more, internal virtual buses. In one embodiment, at least one of the plural virtual buses is designated as a special bus that is limited to...
7330925 Transaction flow control mechanism for a bus bridge  
A transaction flow control mechanism is disclosed for a bus bridge in a high speed computer system with a high speed interface for a graphics processor. A preferred embodiment provides a flow...
7324231 Printer expansion method and apparatus  
The present invention is a computing system typically but not necessarily used in a printer, which includes a processor for managing operation of a print engine, expansion buses, and bridge...
7325085 Motherboard and control method thereof  
A motherboard includes a south-bridge chipset, a north-bridge chipset and a central processor unit (CPU). The south-bridge chipset generates at least control-setting data. The north-bridge chipset...
7321938 Data transfer apparatus, network system, and data transfer method  
Whether the node to which data has been sent is connected to a bus is determined according to destination information, and, when it is determined that the node is not connected to the bus,...
7320043 Split computer architecture to separate user and processor while retaining original user interface  
A network interface is described in which a single computer bus is split over a long distance into two or more inter-communicating buses. On one bus, processing and applications are provided and...
7310583 System and method of measurement and processing of electrical variables  
A system and method of measurement and processing of physical variables, and in particular electrical variables, comprising: a multimeter to measure multiple electrical variables, similar to any...
7308517 Gap count analysis for a high speed serialized bus  
A method of optimizing communication over a high-speed serial bus by minimizing the delay between packets transmitted over the bus is disclosed. The method comprises: calculating the round trip...
7308522 Method and apparatus to allow dynamic variation of ordering enforcement between transactions in a strongly ordered computer interconnect  
A method of enforcing the ordering of read and write transactions for an adapter unit connected to a strongly-ordered bus. The adapter unit has a set of read buffers and write buffers. Initiator...
7305510 Multiple master buses and slave buses transmitting simultaneously  
A bus system, such as an internal bus system located within a digital device, is disclosed herein. The bus system comprises a plurality of master buses, each master bus connected to at least one...
7290073 Master slave serial bus apparatus  
The present invention provides a master slave arrangement for providing communication between a master device and a slave device, the arrangement comprising: a first serial bus connecting said...
7289895 Electronic control systems for construction machine  
In an electronic control system for a construction machine, a governor control unit, an excavator body control unit, and an electric lever control unit are interconnected for transmission and...
7287113 Method of and apparatus for controlling bidirectional streams of isochronous data flowing between an application and a bus structure  
An isochronous data pipe provides a bi-directional path for data between an application and a bus structure. The isochronous data pipe includes the ability to send, receive and perform...
7275125 Pipeline bit handling circuit and method for a bus bridge  
A circuit and method to provide pipeline bit handling across a bus bridge between two different buses. In a preferred embodiment, the pipeline bit handling circuit provides rule enforcement for a...
7275124 Method and system for controlling forwarding or terminating of a request at a bus interface based on buffer availability  
A bus bridge for coupling between a first bus and a second bus includes: a number of data buffers for a particular request type; a counter for monitoring a number of requests of the particular...
7272671 Means of control bits protection in a logical partition environment having a first and second distinct operating system  
A method, system, and apparatus for secure programmable addressing is provided by relocating functions within a multifunctional chip to be distributed across multiple logical partitions and...
7269681 Arrangement for receiving and transmitting PCI-X data according to selected data modes  
An integrated device (e.g., an integrated PCI bridge device) buffers received PCI bus strobe signals and distributes strobe signals for PCI receive data relative to the PCI data lines, enabling...
7263571 Bus segment decoder  
Disclosed are a system and method of forwarding bus transactions from a source device to a target device in multiple data bus environment. A bridge is coupled between a first data bus and a second...
7260664 Interrupt mechanism on an IO adapter that supports virtualization  
A mechanism for handling event notifications or interrupts in a logically partitioned computing system having IO adapters that support adapter virtualization are provided. A virtual adapter...
7260667 Data transfer device, semiconductor integrated circuit, and microcomputer  
It is aimed at improving the efficiency of data transfer processing and the concurrent data processing on a central processing unit. A data transfer device can independently request a bus access...
7259876 Image processing apparatus, and, control method and control device therefor  
A first storage stores input image data. A second storage stores image data read from the first storage. A control part determines, with respect to a timing at which data transfer of image data...
7260669 Semiconductor integrated circuits  
When a peripheral LSI has a memory space which is other than the memory space of a CPU, access is made without one of the memory spaces being aware of the other memory spaces. A flexible bus...
7257654 PCI bridge device configured for using JTAG scan for writing internal control registers and outputting debug state  
An integrated device (e.g., an integrated PCI bridge device), having configuration registers for storing configuration values, device logic for generating internal state values based on the...
7254657 Dual mode capability for system bus  
A computing system with a mode-selectable bus interface. In one embodiment, the computing system includes a system bus, a processor coupled to the bus via an interface unit, and a controller...
7251703 Method of time stamping to enable device bridging over dissimilar buses  
Several local IEEE1394 buses are bridged together over a second bus type to create a global bus wherein each local bus node is able to address nodes across the global bus without the local nodes...
7251704 Store and forward switch device, system and method  
Disclosed are a system and method for forwarding data packets from ingress ports to egress ports on a switch. A forwarding circuit may commence forwarding data packets from an ingress port through...
7246190 Method and apparatus for bringing bus lanes in a computer system using a jumper board  
Methods and apparatuses are disclosed for providing a bus in a computer system. In one embodiment, an apparatus comprises: a central processing unit (CPU), a bridge coupled to the CPU, a first...
7246191 Method and apparatus for memory interface  
A bridge mechanism enables efficient communication between first and second devices, e.g., processors, via an interface, such as PCI express.