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7443844 |
Switched fabric mezzanine storage module
A switched fabric mezzanine storage module ( 560 ) includes a storage module ( 562 ) and a switched fabric connector ( 563 ) coupled to the storage module. The storage module is coupled to directly...
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7444448 |
Data bus mechanism for dynamic source synchronized sampling adjust
An integrated device for sampling data packets asserted sequentially on a system bus, including a clock input for receiving a bus clock signal, a data bus interface for receiving the data packets...
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7441059 |
Method and device for data communication
A device for data communication between a first host device or a further host device and at least one client device along a shared transmission path includes a first host device, which includes a...
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7441063 |
KVM system for controlling computers and method thereof
A system for connecting a console device to computers comprising a graphic user interface menu apparatus for controlling the computers. The system comprises a user-side circuit, a central...
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7441266 |
Wireless communication system utilizing wireless adapter
An electronic system is disclosed. In one embodiment, the electronic system comprises a wireless communication adapter that includes an antenna for transmitting and/or receiving information and a...
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7440450 |
Payload module having a switched fabric enabled mezzanine card
A multi-service platform system, includes a backplane ( 104 ), a switched fabric ( 106 ) on the backplane, and at least one of a VMEbus network and a PCI network coincident with the switched fabric...
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7433988 |
Port adapter for high-bandwidth bus
A port adapter for connecting zero or more network interfaces to a host system having a SPI-4 bus is disclosed. The port adapter comprises zero or more network interfaces; a SPI-4 bus coupled to a...
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7434192 |
Techniques for optimizing design of a hard intellectual property block for data transmission
Techniques are provided for implementing channel alignment for a data transmission interface in an HIP block on a programmable logic integrated circuit. The HIP block channel alignment logic can be...
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7430624 |
High speed on-chip serial link apparatus and method
A converter apparatus and method are provided that transforms an external low speed industry standard interface into an on-chip high speed serial link (HSSL). The converter of the present invention...
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7430629 |
Internet SCSI communication via UNDI services
A method and system for emulating a hardware Internet Small Computer System Interface (iSCSI) Host Bus Adapter (HBA) without risking an interruption of communication between a computer and a remote...
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7430252 |
Apparatus and method for WGIO phase modulation
An apparatus and method for WGIO phase modulation are described. In one embodiment, the method includes the receipt of a high-speed data stream, encoded according to an 8 b /10 b code. Once...
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7426584 |
Portable storage media as file servers
A data storage device includes a data storage medium, for example one or more flash memory modules, and a direct interface, to the data storage medium, that supports a file system protocol....
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7426596 |
Integrated circuit with a scalable high-bandwidth architecture
The present invention is broadly directed to a integrated circuit component with a scalable architecture. In one embodiment, an integrated circuit component is provided comprising logic capable of...
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7424564 |
PCI—express slot for coupling plural devices to a host system
A PCI-Express slot for coupling devices to a host system is provided. The slot includes a PCI-Express connector that can couple at least two devices using at least two independent PCI-Express...
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7424553 |
Method and apparatus for communicating data between a network transceiver and memory circuitry
Method and apparatus for communicating data between a network transceiver and memory circuitry is described. In one example, a transmit peripheral includes a streaming interface configured to...
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7421530 |
Noise attenuating bus structure and method for a mobile communication
A bus structure of a mobile communication terminal for reducing digital noise is disclosed. The bus structure comprises a bus switch controller, a first element having a first bus, a second element...
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7421520 |
High-speed I/O controller having separate control and data paths
An I/O controller having separate command and data paths, thereby eliminating the bandwidth used by the commands and thus increasing bandwidth available to the data buses. Additionally, the I/O...
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7420375 |
Method for digital bus testing
An interface for a bus test instrument is readily adaptable for testing a wide range of bus types. The interface includes a pair of transmit lines and a pair of receive lines. A transmitting...
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7420565 |
Point-to-point bus bridging without a bridge controller
A computer system includes an integrated graphics subsystem and a graphics connector for attaching either an auxiliary graphics subsystem or a loopback card. A first bus connection communicates...
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7421531 |
Isolating system that couples fieldbus data to a network
A system couples fieldbus data from a fieldbus line to a network line. The system includes a data format converter that converts the data to USB data. A coupler that includes a first insulating...
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7421558 |
System controlling interface timing in memory module and related method
A memory system for controlling interface timing in a memory module and a related timing control method are disclosed. The memory system comprises a memory module having a memory module controller...
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7418344 |
Removable computer with mass storage
The present invention provides a detachable add-on card unit to a host system that combines mass storage capability and a processor on the same card. The card can receive data from the host,...
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7418534 |
System on a chip for networking
A system on a chip for network devices. In one implementation, the system on a chip may include (integrated onto a single integrated circuit), a processor and one or more I/O devices for networking...
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7415563 |
Method and system for allowing a media player to determine if it supports the capabilities of an accessory
A method and system for allowing a media player to determine if it supports the capabilities of an accessory are disclosed. The method and system comprise requesting information about the...
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7414875 |
Apparatus and methods for a physical layout of simultaneously sub-accessible memory modules
A layout for simultaneously sub-accessible memory modules is disclosed. In one embodiment, a memory module includes a printed circuit board having a plurality of sectors, each sector being...
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7412554 |
Bus interface controller for cost-effective high performance graphics system with two or more graphics processing units
A bus interface controller manages a set of serial data lanes. The bus interface controller supports operating a subset of the serial data lanes as a private bus.
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7412553 |
Enhanced protocol conversion system capable of providing offloaded protocol instruction processing
Systems are provided for the offloading of protocol control and conversion information within microprocessor-based systems. A converter controller comprises a first interface and protocol, as well...
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7409485 |
Optimized data transfer for a data bus
A communications system is provided in which a host may receive data from a slave device over a polling bus. The slave device first reports to the host an initial amount of data to be transferred....
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7409478 |
Peripheral hardware devices providing multiple interfaces and related systems and methods
A peripheral hardware device may be provided for a computing system including a software operating system. The peripheral hardware device may include functional electronics configured to provide...
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7406557 |
Programmable logic device including programmable interface core and central processing unit
A programmable logic device (PLD) includes a central processing unit (CPU) and a programmable interface coupled to the CPU, wherein the programmable interface includes a core designated by a user....
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7406553 |
System and apparatus for early fixed latency subtractive decoding
Systems and methods for early fixed latency subtractive decoding are disclosed. The subtractive decoding device speculatively acknowledges a bus transaction within a fixed time period that is the...
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7406556 |
Method for reading and writing non-standard register of standard interface device
A method for reading and writing non-standard register of standard interface device is disclosed. An input no-available parameter of standard command is set as an executive parameter. While...
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7404027 |
Slave device in information processing system, operation control program for slave device, and operation control method for slave device
A slave device communicating with a host device may include a program for controlling operation of the slave device. The program may include a discriminating function for discriminating types of...
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7401126 |
Transaction switch and network interface adapter incorporating same
A transaction switch and integrated circuit incorporating said for switching data through a shared memory between a plurality of data interfaces that support different data protocols, namely...
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7401173 |
Method and apparatus for automatic detection and healing of signal pair crossover on a high performance serial bus
An automatic crossover and healing process is disclosed for the P1394b standard. In particular, a crossover process is disclosed which comprises coupling the transmitting logic of a PHY to TPA, and...
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7398293 |
System and method for using a shared bus for video communications
A system and method for using a shared bus to control a keyboard, video, and mouse (KVM) output is disclosed. The system may include a mid-plane having a video bus. At least one server module,...
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7398345 |
Inter-integrated circuit bus router for providing increased security
An inter-integrated circuit port for providing increased security. An electrical connector for communicative coupling to an inter-integrated circuit bus is provided. A controller coupled to the...
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7395364 |
Data transfer control apparatus
A data transfer control apparatus has a plurality of bus slaves connected to a bus master via a bus interface unit for RAM connected to the bus master via a master bus, and a transfer bus which...
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7395363 |
Methods and apparatus for multiple bit rate serial communication
Symbols are prepared for transmission by representing each bit of the symbols by a cluster of consecutive bits, identical to the bit, in a transmission bit sequence. The transmission bit sequence...
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7389374 |
High latency interface between hardware components
A computer program is stored on a computer-readable medium and executed by a processor and performs a method of transmitting and receiving signals between a hard disk controller and a read channel....
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7389338 |
Information processing method and system for reserving an information processing apparatus having globally unique identification information
In the case where a reservation has been made via a bridge in, e.g., an IEEE 1394 serial data bus, and bus resetting has occurred in a bus connected to the reserve owner, it is desirable that...
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7386750 |
Reduced bus turnaround time in a multiprocessor architecture
Systems and methods of reducing bus turnaround time in a multiprocessor architecture are disclosed. An exemplary method may include mastering the system bus within one idle bus clock cycle of a bus...
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7383365 |
Method and system for PCI express audiovisual output
Audio and visual information processing components are co-located on a PCI Express graphics card by communicating audio and visual information received through the PCI Express interface of the...
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7383371 |
Physical layer circuit, data transfer control device, and electronic instrument
A physical layer circuit including: a VBUS detection circuit which makes a VBUS detection signal VBDET active when a VBUS voltage has exceeded a predetermined voltage; a receiver circuit which...
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7382760 |
Communication of audio control signals for wireless audio headphones
A wireless audio headphone communication system has an audio input for receiving an audio signal from an audio source. A wireless transceiver receives and transmits radio frequency communications...
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7380042 |
Method of detecting and monitoring master device communication on system bus
A bus monitoring device includes a detector to detect a signal on the bus. The signal is initiated by one of a plurality of devices coupled to the bus. A clamp circuit is included to clamp the...
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7380018 |
Peripheral bus transaction routing using primary and node ID routing information
A processing device includes one or more resources, a plurality of peripheral bus interfaces that support resource sharing with a plurality of other processing devices, a primary routing resources...
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7380043 |
Method and apparatus for arbitrating for serial bus access
In a highly available storage system, an enclosure includes first and second power supplies, and first and second controller boards. Each of the first and second controller boards includes first...
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7376776 |
Motherboard assembly
A computer motherboard includes a board body and an expansion unit that is provided on the board body and that defines a hybrid expansion slot that complies with the Peripheral Component...
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7373447 |
Multi-port processor architecture with bidirectional interfaces between busses
A multi-port processor architecture having a first bus, a second bus and a central processing unit. The central processing unit having a first and second ports coupled to first and second busses...
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