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6973524 |
Interface for bus independent core
The present invention is directed to an interface. An interface system suitable for coupling a first bus interface controller with a second bus interface controller includes a first bus interface...
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6973515 |
Household appliance control method for converting program-specific commands selected at input-output control into functional commands for machine unit via interface between input output control and machine unit
The invention relates to a method for controlling a household appliance, particularly a washer or dishwasher, having an I/O control for programs and a machine unit comprising a central control that...
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6973078 |
Method and apparatus for implementing low latency crossbar switches with integrated storage signals
A digital crossbar switch utilizes an asynchronous RAM to provide high density and low latency storage and a write enable pulse generator to generate write enable pulses that are independent of the...
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6973523 |
Code division multiple access modem interface
A modem interface transfers data between a high data rate interface and a wireless interface. The modem interface has a plurality of parallel data highways. Each data highway has frames with time...
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6970912 |
Computer system having a plurality of computers each providing a shared storage access processing mechanism for controlling local/remote access to shared storage devices
A computer system having a plurality of computers connected to each other by a computer coupling mechanism. Each computer includes a processor, memory, I/O device, disk control mechanism, computer...
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6970967 |
Crossbar circuit having a plurality of repeaters forming different repeater arrangements
A crossbar circuit ( 30, 40, 50, 60, 70, 80, 90, 100 ) having programmable repeater structures adapted to allow configuration of the crossbar with inputs at multiple sides of the crossbar die. A...
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6970966 |
System of distributed microprocessor interfaces toward macro-cell based designs implemented as ASIC or FPGA bread boarding and relative common bus protocol
A distributed interface between a microprocessor or a standard bus and user macro-cells belonging to an ASIC, or FPGA, or similar silicon devices includes a main module connected to the...
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6968464 |
System and method for reconfiguring a system coupled to a host computer through a split bridge
System and method for configuring a second system in a split bridge distributed environment. A host computer system (host) includes a memory operable to store host driver software (drivers) and a...
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6968413 |
Method and system for configuring terminators in a serial communication system
A system and method is disclosed that efficiently provides standard termination blocks in an approved cell library that are flexible and customizable. A serial communications system includes a...
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6968406 |
System and method for arbitrating access between common access requests on a bus
A system and method of arbitrating access on a bus includes a bus, a bus expander, a boot module, and a management module. The bus expander includes an access engine, a first bus interface, a...
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6965960 |
xDSL symbol processor and method of operating same
A logical pipeline or logical hybrid pipeline is used for an xDSL communication system, and particularly for processing DMT symbols. This flexible arrangement permits easy and efficient sequencing...
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6965958 |
Searching for printers over a network using intermediate print data
A printer serving as an output destination can be automatically set from print data. Further, in order to search an optimum printer during a series of operations within a range from the issue of a...
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6965959 |
System and method for introducing proprietary signals into a standard backplane via physical separation
A system and method for introducing user-defined (e.g., proprietary) signals into a standard backplane. A front side backplane portion is provided with a set of connector holes that are...
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6963944 |
Method and device for the serial transmission of data
A serial transmission of data takes place on a bus ( 10 ) which has at least one forward line ( 8 ) and one return line ( 9 ) and is connected to a plurality of slaves (S 1 , S 2 , . . . ) and via...
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6963946 |
Descriptor management systems and methods for transferring data between a host and a peripheral
An improved descriptor system is provided in which read pointers indicate to a host and a peripheral the next location to read from a queue of descriptors, and write pointers indicate the next...
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6963938 |
Information processing apparatus and method therefor
If a block read cannot be used to read out from a configuration ROM information, the number of times of issue of a quadlet read request increases. This degrades the processing efficiently of a...
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6963945 |
Integrated circuit
It is the object of the invention to optimise the allocation of address ranges to modules of an integrated circuit. Since according to the invention the address ranges in the address space are...
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6961798 |
KVM extension configuration including a USB-to-non-USB adapter to support transmission of USB signals from a host to KVM devices located outside of USB operating ranges
A KVM extension configuration that includes a host connected to a transmitter for transmitting communication signals across an extension to a receiver where user interface devices are located. The...
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6961796 |
Extendable bus interface
A bus interface circuit arrangement and method. In various embodiments, a bus interface circuit arrangement interfaces with a bus functioning in accordance with a bus protocol. The bus interface...
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6961799 |
Method of detecting a source strobe event using change detection
A hub based computer system having a central hub that communicates with a plurality of satellite devices over respective link buses. Each link bus is substantially the same and adheres to a...
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6961797 |
Computer system using an interfacing circuit to increase general purpose input/output ports
According to the claimed invention, the computer system has a central processing unit, a north bridge electrically connected to the central processing unit, memory electrically connected to the...
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6961786 |
Fiber loop linking/detecting
A mechanism is provided for detecting new devices added to a Fiber Channel adapter. When a device is added to a connector, the mechanism generates a device detect signal for that port. The Fiber...
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6959350 |
Configurable USB interface with virtual register architecture
An interface controller includes configuration circuitry generated based on a configuration package associated with endpoint configuration parameters. The configuration circuitry is used for...
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6959357 |
Integrated circuit and method of controlling same
Bus-connected circuits are made to operate stably and at high speed. A cache memory for high-speed access and a DRAM for low-speed access are connected to a CPU by an address bus, control bus and...
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6957356 |
Method and apparatus for iTD scheduling
A device is presented including a host controller to generate a transaction schedule. The transaction schedule includes many transactions. The transactions are stored in many data structures. Each...
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6957288 |
Embedded control and monitoring of hard disk drives in an information handling system
The need for a SAF-TE processor embedded on a SCSI backplane of a hot-swap hard disk drive enclosure is eliminated by utilizing the functionality of a RAID on motherboard (ROMB) controller and an...
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6954808 |
Extender for universal serial bus
Cable length extension of universal serial bus (USB), through the provision of a transmitter hub coupled to a receiver hub over a non-USB data transport connection.
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6954816 |
Peripheral device with shared bus interface and operating method thereof
A peripheral device for use in a system including a storage unit coupled to a local bus. The peripheral device has a shared bus interface provided for interfacing with the storage unit and the...
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6954817 |
Providing at least one peer connection between a plurality of coupling facilities to couple the plurality of coupling facilities
A coupling facility is coupled to one or more other coupling facilities via one or more peer links. The coupling of the facilities enables various functions to be supported, including the duplexing...
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6954815 |
Microcomputer with universal serial bus interface circuit and method of controlling the same
A microcomputer includes a universal serial bus (USB) interface circuit wherein a program is written from a host to the microcomputer at high speed by utilizing a USB cable for connecting the host...
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6952750 |
Method and device for providing a low power embedded system bus architecture
The tristateless bus interface communication scheme according to the present invention addresses many of the shortcomings of the prior art. In accordance with various aspects of the present...
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6949409 |
Register setting method and semiconductor device
A register setting method which facilitates writing of change information into a register for storing operation condition information that defines the operation of a device. The method includes the...
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6950897 |
Method and apparatus for a dual mode PCI/PCI-X device
A technique is disclosed for facilitating data processing in a computer system. The technique utilizes logic to implement a dual mode design for PCI/PCI-X computer systems that enables optimal...
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6950898 |
Data amplifier having reduced data lines and/or higher data rates
A data amplifier configured to allow for fewer data lines and/or increased processing speeds. Specifically, multiple helper flip-flops are used to prefetch data in a data amplifier. The helper...
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6948047 |
Apparatus for providing a CPU cluster via a disk I/O bus using a CPU brick which fits into a disk cavity
A general purpose computer apparatus including a central processing unit, a main memory and a system bus. The general purpose computer apparatus further includes means for interfacing the central...
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6947335 |
Semiconductor device with an input/output interface circuit for a bus
There is provided a control circuit which instructs, using a control signal, validation and invalidation of operations of an input/output interface circuit suitable for a bus such as the IIC bus...
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6948022 |
Digital image transfer controller
A data transfer device ( 10 ) converts the data stream input to it by IEEE 1394 isochronous transmission from an image processing device ( 20 ) connected to it into data in a color signal mode...
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6948023 |
Transmission interface conversion device
The present invention provides a transmission interface conversion device, which can first convert the communication signal of a master equipment controller and then connect to a plurality of slave...
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6944686 |
Data transfer control circuit with terminal sharing
A DMA controller including a request queue for holding DMA transfer requests clears only the request queue without executing unnecessary DMA transfers and provides information about the states of...
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6944691 |
Architecture that converts a half-duplex bus to a full-duplex bus while keeping the bandwidth of the bus constant
An architecture comprising a first circuit, a second circuit, and one or more pairs of communication channels. The first circuit may be configured to transmit one or more first serial streams in...
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6944704 |
Method and apparatus for utilizing extended AV/C command frames including status inquiry, notify inquiry and control inquiry command types
A modified AV/C command set includes status inquiry, notify inquiry and control inquiry commands. The status inquiry, notify inquiry and control inquiry commands include an opcode and any number of...
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6941402 |
IC card, data processing apparatus, and system using common signal lines and common resistor for differential signals and single end signals
Single end signal communication is provided in a first direction from a single end signal transmitter to a single end signal receiver through at least one dumping resistor and may be provided in...
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6941256 |
Bus structure, database and method of designing interface
With respect to each application, libraries, corresponding to operation models, for describing operations respectively attained by employing a Neumann CPU (bus structure), a Harvard CPU (bus...
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6941405 |
System and method capable of offloading converter/controller-specific tasks to a system microprocessor
Systems are provided for the offloading of protocol control and conversion information within microprocessor-based systems. A converter controller comprises a first interface and protocol, as well...
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6941406 |
System having interfaces and switch that separates coherent and packet traffic
An apparatus includes one or more interface circuits, an interconnect, a memory controller, a memory bridge, a packet DMA circuit, and a switch. The memory controller, the memory bridge, and the...
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6941404 |
Data transfer device, transaction system and method for exchanging control and I/O data with a data processing system
A data transfer device, having first data interface means for exchanging data with a data processing system, second data interface means for exchanging data with a user of the data transfer device,...
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6938103 |
Universal serial bus transaction processing tasks scheduling method for computer system, involves assigning transaction to periodic queue head list with faster polling interval
An apparatus and method is provided for scheduling USB transaction processing tasks. A periodic queue head list associated with a USB host controller is configured to be processed once every...
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6938110 |
Virtual processor through USB
The invention relates to a virtual processor through USB (VPTU), which is installed in a peripheral with USB interface specifications and comprises an I/O instruction decoding unit for decoding or...
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6931464 |
Method for connecting gigabit interface converters with serial identification capability into an active two-wire serial bus
A method for connecting an interface to a serial bus is provided comprising the steps of sensing at least one identification line for the interface, identifying an interface type from the at least...
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6931466 |
Reprogrammable input-output pins for forming different chip or board interfaces
Disclosed is a reprogrammable I/O system for a chip or board system that can be reprogrammed to simulate many I/O interfaces in firmware. The reprogrammable I/O system comprises an I/O cluster, an...
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