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7007128 |
Multiprocessor data processing system having a data routing mechanism regulated through control communication
A data interconnect and routing mechanism reduces data communication latency, supports dynamic route determination based upon processor activity level/traffic, and implements an architecture that...
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7003617 |
System and method for managing target resets
A bus reset control module associated with a fibre-SCSI bridge manages target resets sent from a fibre bus to one or more SCSI buses to reduce or eliminate unnecessary bus resets of SCSI buses...
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7003607 |
Managing a controller embedded in a bridge
A method and apparatus is provided for managing a controller embedded in a south bridge. The method includes determining if the south bridge of a processor-based system is configured to operate in...
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7003612 |
PC switching device selectively switching between an input device and a plurality of computers having different electric power control mechanisms
This invention is to provide a PC switching device which can be applied to various kinds of PC's, some of which have an electric power control method different from the others. When a plurality of...
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7003608 |
Method and system for automatic configuration of IDE bus devices
A system and method are disclosed for automatically and correctly configuring IDE bus devices to be either master or slave devices regardless of the devices' location on an IDE cable. A modified...
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7003613 |
System for transferring data using a USB host system with a dedicated processor
This invention is a USB host comprising a first processor implementing a function of a USB system and presenting a high-level pipe view of USB to a second processor. In one embodiment of this...
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7000042 |
Configurable storage array adapted to configure a segmentable bus based on an arrangement of connectors
A configurable storage array includes a backplane, a plurality of storage devices coupled to the backplane, a segmentable bus coupled to the storage devices, a plurality of input/output connectors...
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7000056 |
Method and apparatus for detecting low pin count and serial peripheral interfaces
Apparatus and method for providing a multiplexed bus supporting the coupling of either one of a device having a first bus type interface and a device having a second bus type interface where the...
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7000045 |
Byte-enabled transfer for a data bus having fixed-byte data transfer
A data bus system transfers words and word portions on a data bus between master devices and slave devices. A size bus carries a size code in fixed-byte format that identifies a number of bytes...
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7000055 |
Multi-interface symmetric multiprocessor
A symmetric multiprocessor system includes a first processor and a second processor for executing a multi-threaded process on packets, a first inbound interface and a first outbound interface...
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6996650 |
Method and apparatus for implementing multiple configurable sub-busses of a point-to-point bus
A method and apparatus are provided for implementing multiple configurable sub-busses of a point-to-point bus. Each of a plurality of bus interconnects include a transmit interface and a receive...
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6996652 |
High-speed segmented data bus architecture
A system is provided for driving data signals in an integrated circuit device. The system includes a plurality of functional blocks, each having at least one input/output connection along one side...
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6996653 |
Communication interface method
A communication interface responds to a communication protocol for interfacing a controller and any of a plurality of discrete I/O devices. Each discrete I/O device has a different configuration....
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6996643 |
Method of VME module transfer speed auto-negotiation
In a multi-service platform system ( 103 ), a method of transfer speed ( 119 ) negotiation includes an initiator VME module ( 402 ) communicating a negotiation code ( 406 ) to a responder VME...
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6996613 |
System for storing and transmitting home network system data
The invention specifies a system having a plurality of devices which are connected to one another via an IEEE 1394 interface and one of which contains a control unit which, when operated...
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6996649 |
Decoupling unit for bus systems that blocks abnormal dominant signals from passing between connected bus systems
A decoupling unit for two bus systems connected with each other includes a connecting circuit between two interface circuits. The first interface circuit has ports for one of the two bus systems...
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6996651 |
On chip network with memory device address decoding
A network with memory device address decoding that enables communication among integrated processing elements, including a network, a processing element and a bus gasket. The network transfers...
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6995851 |
Printer apparatus, control method and control program therefor, and computer-readable storage medium containing the control program
A printer apparatus terminates printing and discharges paper when an interface is disconnected during a printing process, whereby the next print data is received and is appropriately printed. In...
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6996644 |
Apparatus and methods for initializing integrated circuit addresses
Multiple ICs communicate with a controller through a shared bus. The ICs are also joined to an output of the controller in a daisy chain configuration. Each IC includes an input for receiving a...
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6993618 |
Dual-mode flash storage exchanger that transfers flash-card data to a removable USB flash key-drive with or without a PC host
A flash-card exchanger has two modes of operation. When a host personal computer (PC) is connected to a Universal-Serial-Bus (USB) connector, the flash-card exchanger operates in a card reader...
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6993612 |
Arbitration method for a source strobed bus
A hub based computer system having a central hub that communicates with a plurality of satellite devices over respective link buses. Each link bus is substantially the same and adheres to a...
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6993617 |
System-on-a-chip having an on-chip processor and an on-chip dynamic random access memory (DRAM)
A system-on-a-chip device is provided, the system-on-a-chip device comprising an on-chip processor and an on-chip dynamic random access memory (DRAM) capable of communicating with the on-chip...
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6993616 |
Read-write interface system and method that accesses a leading bit in advance of a read operation
A read-write interface system and method for a peripheral device includes storing data to be processed by a peripheral device; receiving a set of input data bits; transferring the set of input data...
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6990548 |
Methods and arrangements for configuring a printer over a wireless communication link using a wireless communication device
A portable communication device, such as, a cellular telephone, pager, PDA, etc., is programmed to configure a peripheral device through a communication link. The advanced user interface on the...
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6990537 |
System and method for controlling multi-component communications via a bus by causing components to enter and exit a high-impedance state
A method for controlling communication on a bus connecting a first processor, a second processor, and a device. The method transmits a first control signal from the first processor to the second...
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6988136 |
Unified management system and method for multi-cabinet data storage complexes
A multi-cabinet mass storage system with unified management features. The system includes a first reporting group and a second reporting group each having enclosure with processors, such as an...
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6987428 |
Electromagnetic coupler flexible circuit with a curved coupling portion
An electromagnetic (EM) coupler including a first transmission structure having a first geometry, and a second transmission structure having a second geometry and forming an EM coupler with the...
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6988154 |
Memory interface and method of interfacing between functional entities
A data and signal interface for controlling the transfer of data and signals between a memory array and macro function such as that of a digital signal processor (DSP) core. In one embodiment, the...
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6988160 |
Method and apparatus for efficient messaging between memories across a PCI bus
The method and apparatus presented are targeted to improve the performance of moving data between memory portions connected by a system bus where writes have higher performance than reads, such as...
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6988159 |
Cableless embedded simplex/duplex channel SCSI implementation
A small computer system interface (SCSI) system and methods of configuring/operating the SCSI system without cables. The SCSI system includes a system board, a backplane, and a cableless element...
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6985972 |
Dynamic cache coherency snooper presence with variable snoop latency
A data processing system with a snooper that is capable of dynamically enabling and disabling its snooping capabilities (i.e., snoop detect and response). The snooper is connected to a bus...
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6985988 |
System-on-a-Chip structure having a multiple channel bus bridge
A system-on-a-chip integrated circuit structure includes a bridge having a plurality of channels, a processor local bus connected to the bridge (wherein the bridge includes a first channel...
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6985989 |
Storage apparatus having plural controller including interconnected memories
A disk array controller is made up of multiple disk array control units for implementing the data read/write operation and each having channel IF units, disk IF units, cache memory units and shared...
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6983343 |
Partitioning of storage channels using programmable switches
A data storage system having a first storage channel, a first controller coupled to the first storage channel, a first storage device coupled to the first storage channel, a second storage channel,...
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6983336 |
Dual pointing device used to control a cursor having absolute and relative pointing devices
A personal computer system enables simultaneous use of a relative-coordinate-mode input device and an absolute-coordinate-mode input device, thereby allowing correct input of absolute coordinate...
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6983341 |
Modular peripheral device hub
A hub for expanding peripheral device connectivity in a computer system is provided. The hub includes a hub body which has a front side, a back side, and peripheral surfaces. The peripheral...
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6983342 |
High speed OC-768 configurable link layer chip
An integrated circuit comprising a plurality of link layer controllers. The plurality of link layer controllers may be configured to operate independently in a first mode and cooperatively in a...
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6980314 |
Method and device for improving utilization of a bus
An embodiment of a bus management device permits scheduling of transactions to allow concurrent execution of the transactions. Data bus usage is scheduled by setting shift register bits. Each...
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6981087 |
Multi-master and diverse serial bus in a complex electrical system
A two wire serial bus is connected between different circuit boards in a complex electrical system. The two wire serial bus may be used to receive status information about each of the circuit...
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6978336 |
Method and structure for allocating sites in an expanded SCB array
A parallel SCSI host adapter uses an expanded SCB array for both non-Packetized and Packetized SCSI Protocols. The expanded SCB array is partitioned into a low page and a high page. SCBs for...
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6978337 |
Serial ATA controller having failover function
A select circuit including a first device bridge to communicate a first stream of information between a first Serial ATA bus and a storage device bus. A second device bridge to communicate a second...
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6977925 |
Folded fabric switching architecture
An optimal printed circuit board input/output switching system is provided and includes a printed circuit board having multiple input/output ports with communication channels coupling the...
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6978334 |
Serial bus data control device
A serial bus data control device for communication devices to receive data in a packet format is provided which is capable of obtaining each piece of actual data contained in each of packets needed...
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6978012 |
Echo cancellation using a variable offset comparator
An echo cancellation circuit includes a variable offset comparator whose input is coupled to receive a transmission line analog signal level. The comparator has a substantially variable offset that...
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6977821 |
Backplane apparatus and board for use therewith
A backplane has a plurality of interface slots that each couple to a number of buses. Depending upon the embodiment, these buses include a power distribution bus, a digital ground bus, an earth...
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6976155 |
Method and apparatus for communicating between processing entities in a multi-processor
A method and apparatus for synchronizing and communicating between processing entities, such as cores or threads, in a multiprocessor. Two registers are used as a “hardware mailbox” by two...
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6976114 |
Method and apparatus for simultaneous bidirectional signaling in a bus topology
A method and apparatus for providing bidirectional signaling in a bus topology is provided. The bus topology allows more than two electrical circuits or devices to be coupled together along one or...
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6973516 |
Method and apparatus for a controller capable of supporting multiple protocols
The present invention provides a controller system including a common controller, a first interface, a second interface, and an adapter. The first interface is used to receive and to send data...
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6973526 |
Method and apparatus to permit external access to internal configuration registers
Access to internal configuration registers on a computer system's chipset using an external micro-controller is provided. A SMB configuration read command including a register address may be...
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6973527 |
Electrical circuit for a bus interface and/or a bus bridge for performing a function
An electrical circuit for a bus interface and/or a bus bridge is described. The electrical circuit comprises a global master being coupled with a first bus and at least one function block being...
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